From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753293AbbFSPl4 (ORCPT ); Fri, 19 Jun 2015 11:41:56 -0400 Received: from mail-wg0-f53.google.com ([74.125.82.53]:35394 "EHLO mail-wg0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751605AbbFSPlr (ORCPT ); Fri, 19 Jun 2015 11:41:47 -0400 Date: Fri, 19 Jun 2015 17:44:31 +0200 From: Daniel Vetter To: Mikko Rapeli Cc: linux-kernel@vger.kernel.org, imre.deak@intel.com, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Daniel Vetter , Jani Nikula Subject: Re: [PATCH] drm/i915: enable BIOS hang workaround for Lenovo T60 too Message-ID: <20150619154431.GD25769@phenom.ffwll.local> Mail-Followup-To: Mikko Rapeli , linux-kernel@vger.kernel.org, imre.deak@intel.com, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, Daniel Vetter , Jani Nikula References: <1434694676-2039-1-git-send-email-mikko.rapeli@iki.fi> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1434694676-2039-1-git-send-email-mikko.rapeli@iki.fi> X-Operating-System: Linux phenom 4.0.0-rc3+ User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Jun 19, 2015 at 08:17:55AM +0200, Mikko Rapeli wrote: > When trying to hibernate a Lenovo T60 the half moon led keeps blinking and > devices does not power off since commit da2bc1b9db3. > > T60 chip details: > > 00:02.0 VGA compatible controller: Intel Corporation Mobile 945GM/GMS, 943/940GM > L Express Integrated Graphics Controller (rev 03) (prog-if 00 [VGA controller]) > Subsystem: Lenovo ThinkPad R60/T60/X60 series > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Step > ping- SERR- FastB2B- DisINTx- > Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- SERR- Latency: 0 > Interrupt: pin A routed to IRQ 16 > Region 0: Memory at ee100000 (32-bit, non-prefetchable) [size=512K] > Region 1: I/O ports at 1800 [size=8] > Region 2: Memory at d0000000 (32-bit, prefetchable) [size=256M] > Region 3: Memory at ee200000 (32-bit, non-prefetchable) [size=256K] > Expansion ROM at [disabled] > Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit- > Address: 00000000 Data: 0000 > Capabilities: [d0] Power Management version 2 > Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) > Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- > Kernel driver in use: i915 > > Signed-off-by: Mikko Rapeli > --- > drivers/gpu/drm/i915/i915_drv.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index ec4d932..36e311e 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -641,11 +641,12 @@ static int i915_drm_suspend_late(struct drm_device *drm_dev, bool hibernation) > * the device even though it's already in D3 and hang the machine. So > * leave the device in D0 on those platforms and hope the BIOS will > * power down the device properly. Platforms where this was seen: > - * Lenovo Thinkpad X301, X61s > + * Lenovo Thinkpad X301, X61s, T60 > */ > if (!(hibernation && > drm_dev->pdev->subsystem_vendor == PCI_VENDOR_ID_LENOVO && > - INTEL_INFO(dev_priv)->gen == 4)) > + ((INTEL_INFO(dev_priv)->gen == 3) || > + (INTEL_INFO(dev_priv)->gen == 4))) I wonder whether we shouldn't do this unconditionally for gen4 and earlier for Lenovo ... Anyway this needs Cc: stable@vger.kernel.org and is for Jani to pick up. Thanks for figuring out what's been broken here. -Daniel > pci_set_power_state(drm_dev->pdev, PCI_D3hot); > > return 0; > -- > 2.1.4 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in Please read the FAQ at http://www.tux.org/lkml/ From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH] drm/i915: enable BIOS hang workaround for Lenovo T60 too Date: Fri, 19 Jun 2015 17:44:31 +0200 Message-ID: <20150619154431.GD25769@phenom.ffwll.local> References: <1434694676-2039-1-git-send-email-mikko.rapeli@iki.fi> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail-wi0-f171.google.com (mail-wi0-f171.google.com [209.85.212.171]) by gabe.freedesktop.org (Postfix) with ESMTP id 317F06EEF7 for ; Fri, 19 Jun 2015 08:41:46 -0700 (PDT) Received: by wibdq8 with SMTP id dq8so22326960wib.1 for ; Fri, 19 Jun 2015 08:41:45 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1434694676-2039-1-git-send-email-mikko.rapeli@iki.fi> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Mikko Rapeli Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Daniel Vetter , intel-gfx@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org T24gRnJpLCBKdW4gMTksIDIwMTUgYXQgMDg6MTc6NTVBTSArMDIwMCwgTWlra28gUmFwZWxpIHdy b3RlOgo+IFdoZW4gdHJ5aW5nIHRvIGhpYmVybmF0ZSBhIExlbm92byBUNjAgdGhlIGhhbGYgbW9v biBsZWQga2VlcHMgYmxpbmtpbmcgYW5kCj4gZGV2aWNlcyBkb2VzIG5vdCBwb3dlciBvZmYgc2lu Y2UgY29tbWl0IGRhMmJjMWI5ZGIzLgo+IAo+IFQ2MCBjaGlwIGRldGFpbHM6Cj4gCj4gMDA6MDIu MCBWR0EgY29tcGF0aWJsZSBjb250cm9sbGVyOiBJbnRlbCBDb3Jwb3JhdGlvbiBNb2JpbGUgOTQ1 R00vR01TLCA5NDMvOTQwR00KPiBMIEV4cHJlc3MgSW50ZWdyYXRlZCBHcmFwaGljcyBDb250cm9s bGVyIChyZXYgMDMpIChwcm9nLWlmIDAwIFtWR0EgY29udHJvbGxlcl0pCj4gICAgICAgICBTdWJz eXN0ZW06IExlbm92byBUaGlua1BhZCBSNjAvVDYwL1g2MCBzZXJpZXMKPiAgICAgICAgIENvbnRy b2w6IEkvTysgTWVtKyBCdXNNYXN0ZXIrIFNwZWNDeWNsZS0gTWVtV0lOVi0gVkdBU25vb3AtIFBh ckVyci0gU3RlcAo+IHBpbmctIFNFUlItIEZhc3RCMkItIERpc0lOVHgtCj4gICAgICAgICBTdGF0 dXM6IENhcCsgNjZNSHotIFVERi0gRmFzdEIyQisgUGFyRXJyLSBERVZTRUw9ZmFzdCA+VEFib3J0 LSA8VEFib3J0LQo+IDxNQWJvcnQtID5TRVJSLSA8UEVSUi0gSU5UeC0KPiAgICAgICAgIExhdGVu Y3k6IDAKPiAgICAgICAgIEludGVycnVwdDogcGluIEEgcm91dGVkIHRvIElSUSAxNgo+ICAgICAg ICAgUmVnaW9uIDA6IE1lbW9yeSBhdCBlZTEwMDAwMCAoMzItYml0LCBub24tcHJlZmV0Y2hhYmxl KSBbc2l6ZT01MTJLXQo+ICAgICAgICAgUmVnaW9uIDE6IEkvTyBwb3J0cyBhdCAxODAwIFtzaXpl PThdCj4gICAgICAgICBSZWdpb24gMjogTWVtb3J5IGF0IGQwMDAwMDAwICgzMi1iaXQsIHByZWZl dGNoYWJsZSkgW3NpemU9MjU2TV0KPiAgICAgICAgIFJlZ2lvbiAzOiBNZW1vcnkgYXQgZWUyMDAw MDAgKDMyLWJpdCwgbm9uLXByZWZldGNoYWJsZSkgW3NpemU9MjU2S10KPiAgICAgICAgIEV4cGFu c2lvbiBST00gYXQgPHVuYXNzaWduZWQ+IFtkaXNhYmxlZF0KPiAgICAgICAgIENhcGFiaWxpdGll czogWzkwXSBNU0k6IEVuYWJsZS0gQ291bnQ9MS8xIE1hc2thYmxlLSA2NGJpdC0KPiAgICAgICAg ICAgICAgICAgQWRkcmVzczogMDAwMDAwMDAgIERhdGE6IDAwMDAKPiAgICAgICAgIENhcGFiaWxp dGllczogW2QwXSBQb3dlciBNYW5hZ2VtZW50IHZlcnNpb24gMgo+ICAgICAgICAgICAgICAgICBG bGFnczogUE1FQ2xrLSBEU0krIEQxLSBEMi0gQXV4Q3VycmVudD0wbUEgUE1FKEQwLSxEMS0sRDIt LEQzaG90LSxEM2NvbGQtKQo+ICAgICAgICAgICAgICAgICBTdGF0dXM6IEQwIE5vU29mdFJzdC0g UE1FLUVuYWJsZS0gRFNlbD0wIERTY2FsZT0wIFBNRS0KPiAgICAgICAgIEtlcm5lbCBkcml2ZXIg aW4gdXNlOiBpOTE1Cj4gCj4gU2lnbmVkLW9mZi1ieTogTWlra28gUmFwZWxpIDxtaWtrby5yYXBl bGlAaWtpLmZpPgo+IC0tLQo+ICBkcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X2Rydi5jIHwgNSAr KystLQo+ICAxIGZpbGUgY2hhbmdlZCwgMyBpbnNlcnRpb25zKCspLCAyIGRlbGV0aW9ucygtKQo+ IAo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X2Rydi5jIGIvZHJpdmVy cy9ncHUvZHJtL2k5MTUvaTkxNV9kcnYuYwo+IGluZGV4IGVjNGQ5MzIuLjM2ZTMxMWUgMTAwNjQ0 Cj4gLS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9kcnYuYwo+ICsrKyBiL2RyaXZlcnMv Z3B1L2RybS9pOTE1L2k5MTVfZHJ2LmMKPiBAQCAtNjQxLDExICs2NDEsMTIgQEAgc3RhdGljIGlu dCBpOTE1X2RybV9zdXNwZW5kX2xhdGUoc3RydWN0IGRybV9kZXZpY2UgKmRybV9kZXYsIGJvb2wg aGliZXJuYXRpb24pCj4gIAkgKiB0aGUgZGV2aWNlIGV2ZW4gdGhvdWdoIGl0J3MgYWxyZWFkeSBp biBEMyBhbmQgaGFuZyB0aGUgbWFjaGluZS4gU28KPiAgCSAqIGxlYXZlIHRoZSBkZXZpY2UgaW4g RDAgb24gdGhvc2UgcGxhdGZvcm1zIGFuZCBob3BlIHRoZSBCSU9TIHdpbGwKPiAgCSAqIHBvd2Vy IGRvd24gdGhlIGRldmljZSBwcm9wZXJseS4gUGxhdGZvcm1zIHdoZXJlIHRoaXMgd2FzIHNlZW46 Cj4gLQkgKiBMZW5vdm8gVGhpbmtwYWQgWDMwMSwgWDYxcwo+ICsJICogTGVub3ZvIFRoaW5rcGFk IFgzMDEsIFg2MXMsIFQ2MAo+ICAJICovCj4gIAlpZiAoIShoaWJlcm5hdGlvbiAmJgo+ICAJICAg ICAgZHJtX2Rldi0+cGRldi0+c3Vic3lzdGVtX3ZlbmRvciA9PSBQQ0lfVkVORE9SX0lEX0xFTk9W TyAmJgo+IC0JICAgICAgSU5URUxfSU5GTyhkZXZfcHJpdiktPmdlbiA9PSA0KSkKPiArCSAgICAg ICgoSU5URUxfSU5GTyhkZXZfcHJpdiktPmdlbiA9PSAzKSB8fAo+ICsJICAgICAgIChJTlRFTF9J TkZPKGRldl9wcml2KS0+Z2VuID09IDQpKSkKCkkgd29uZGVyIHdoZXRoZXIgd2Ugc2hvdWxkbid0 IGRvIHRoaXMgdW5jb25kaXRpb25hbGx5IGZvciBnZW40IGFuZCBlYXJsaWVyCmZvciBMZW5vdm8g Li4uIEFueXdheSB0aGlzIG5lZWRzIENjOiBzdGFibGVAdmdlci5rZXJuZWwub3JnIGFuZCBpcyBm b3IKSmFuaSB0byBwaWNrIHVwLgoKVGhhbmtzIGZvciBmaWd1cmluZyBvdXQgd2hhdCdzIGJlZW4g YnJva2VuIGhlcmUuCi1EYW5pZWwKCj4gIAkJcGNpX3NldF9wb3dlcl9zdGF0ZShkcm1fZGV2LT5w ZGV2LCBQQ0lfRDNob3QpOwo+ICAKPiAgCXJldHVybiAwOwo+IC0tIAo+IDIuMS40Cj4gCj4gX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KPiBkcmktZGV2ZWwg bWFpbGluZyBsaXN0Cj4gZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwo+IGh0dHA6Ly9s aXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwKCi0tIApEYW5p ZWwgVmV0dGVyClNvZnR3YXJlIEVuZ2luZWVyLCBJbnRlbCBDb3Jwb3JhdGlvbgpodHRwOi8vYmxv Zy5mZndsbC5jaApfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f XwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcK aHR0cDovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZlbAo=