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* [PATCH] NET: Add ezchip ethernet driver
@ 2015-06-09 12:44 Noam Camus
  2015-06-09 14:11 ` Alexey Brodkin
                   ` (2 more replies)
  0 siblings, 3 replies; 28+ messages in thread
From: Noam Camus @ 2015-06-09 12:44 UTC (permalink / raw)
  To: netdev, linux-kernel
  Cc: Alexey.Brodkin, vgupta, giladb, cmetcalf, Tal Zilcer, Noam Camus

From: Tal Zilcer <talz@ezchip.com>

Simple LAN device without multicast support.
Device performance is not high and may be used for
debug or management purposes.
Device supports interrupts for RX and TX end.
Device does not support NAPI and also does not support DMA.
It is used in EZchip NPS devices.

Signed-off-by: Noam Camus <noamc@ezchip.com>
---
 .../devicetree/bindings/net/ezchip_enet.txt        |   15 +
 drivers/net/ethernet/Kconfig                       |    1 +
 drivers/net/ethernet/Makefile                      |    1 +
 drivers/net/ethernet/ezchip/Kconfig                |   30 +
 drivers/net/ethernet/ezchip/Makefile               |    1 +
 drivers/net/ethernet/ezchip/nps_enet.c             |  577 ++++++++++++++++++++
 drivers/net/ethernet/ezchip/nps_enet.h             |  311 +++++++++++
 7 files changed, 936 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/ezchip_enet.txt
 create mode 100644 drivers/net/ethernet/ezchip/Kconfig
 create mode 100644 drivers/net/ethernet/ezchip/Makefile
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.c
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.h

diff --git a/Documentation/devicetree/bindings/net/ezchip_enet.txt b/Documentation/devicetree/bindings/net/ezchip_enet.txt
new file mode 100644
index 0000000..d2bf9ab
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ezchip_enet.txt
@@ -0,0 +1,15 @@
+* EZchip NPS ENET 10/100 Ethernet driver (ENET)
+
+Required properties:
+- compatible: Should be "ezchip,nps-enet"
+- reg: Address and length of the register set for the device
+- interrupts: Should contain the ENET interrupt
+
+Examples:
+
+	ethernet@f0003000 {
+		compatible = "ezchip,nps-enet";
+		reg = <0xf0003000 0x44>;
+		interrupts = <7>;
+		mac-address = [ 00 11 22 33 44 55 ];
+	};
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index eadcb05..1a6b1ba 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -66,6 +66,7 @@ config DNET
 source "drivers/net/ethernet/dec/Kconfig"
 source "drivers/net/ethernet/dlink/Kconfig"
 source "drivers/net/ethernet/emulex/Kconfig"
+source "drivers/net/ethernet/ezchip/Kconfig"
 source "drivers/net/ethernet/neterion/Kconfig"
 source "drivers/net/ethernet/faraday/Kconfig"
 source "drivers/net/ethernet/freescale/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 1367afc..489f9cc 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_DNET) += dnet.o
 obj-$(CONFIG_NET_VENDOR_DEC) += dec/
 obj-$(CONFIG_NET_VENDOR_DLINK) += dlink/
 obj-$(CONFIG_NET_VENDOR_EMULEX) += emulex/
+obj-$(CONFIG_NET_VENDOR_EZCHIP) += ezchip/
 obj-$(CONFIG_NET_VENDOR_EXAR) += neterion/
 obj-$(CONFIG_NET_VENDOR_FARADAY) += faraday/
 obj-$(CONFIG_NET_VENDOR_FREESCALE) += freescale/
diff --git a/drivers/net/ethernet/ezchip/Kconfig b/drivers/net/ethernet/ezchip/Kconfig
new file mode 100644
index 0000000..a567bcc
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Kconfig
@@ -0,0 +1,30 @@
+#
+# EZchip network device configuration
+#
+
+config NET_VENDOR_EZCHIP
+	bool "EZchip devices"
+	default y
+	---help---
+	  If you have a network (Ethernet) device belonging to this class, say Y
+	  and read the Ethernet-HOWTO, available from
+	  <http://www.tldp.org/docs.html#howto>.
+
+	  Note that the answer to this question doesn't directly affect the
+	  kernel: saying N will just cause the configurator to skip all
+	  the questions about EZchip devices. If you say Y, you will be asked for
+	  your specific device in the following questions.
+
+if NET_VENDOR_EZCHIP
+
+config EZCHIP_NPS_LAN
+	tristate "EZchip NPS LAN support"
+	default y
+	---help---
+	  Simple LAN device without multicast support.
+	  Device performance is not high and may be used for
+	  debug or management purposes.
+	  Device supports interrupts for RX and TX(end).
+	  Device does not support NAPI and also does not support DMA.
+
+endif
diff --git a/drivers/net/ethernet/ezchip/Makefile b/drivers/net/ethernet/ezchip/Makefile
new file mode 100644
index 0000000..806e13d
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_EZCHIP_NPS_LAN) += nps_enet.o
diff --git a/drivers/net/ethernet/ezchip/nps_enet.c b/drivers/net/ethernet/ezchip/nps_enet.c
new file mode 100644
index 0000000..cc5b1a0
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.c
@@ -0,0 +1,577 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#include <linux/module.h>
+#include <linux/etherdevice.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_net.h>
+#include <linux/of_platform.h>
+#include "nps_enet.h"
+
+#define DRV_NAME    "nps_enet"
+
+#define NPS_ENET_WORDS_NUM(length)	((length + 3) >> 2)
+
+static void nps_enet_clean_rx_fifo(struct net_device *netdev, int frame_len)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	int i, len = NPS_ENET_WORDS_NUM(frame_len);
+
+	/* Empty Rx FIFO buffer by reading all words */
+	for (i = 0; i < len; i++)
+		nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_BUF);
+}
+
+static void nps_enet_read_rx_fifo(struct net_device *netdev,
+				  unsigned char *dst, int length)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	int i, len = (length >> 2);
+	int last = length & 3;
+	unsigned int *reg = (unsigned int *)dst;
+	bool dst_is_align = !((unsigned int)dst & 0x3);
+
+	/* In case dst is not aligned we need an intermediate buffer */
+	if (dst_is_align)
+		for (i = 0; i < len; i++, reg++)
+			*reg = nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_BUF);
+	else { /* !dst_is_align */
+		unsigned int buf;
+
+		for (i = 0; i < len; i++, reg++) {
+			buf = nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_BUF);
+			memcpy(reg, &buf, sizeof(buf));
+		}
+	}
+
+	/* copy last bytes (if any) */
+	if (last) {
+		unsigned int buf;
+
+		buf = nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_BUF);
+		memcpy(reg, &buf, last);
+	}
+}
+
+static void nps_enet_rx_irq_handler(struct net_device *netdev,
+				    struct nps_enet_rx_ctl rx_ctrl)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct sk_buff *skb;
+	int frame_len = rx_ctrl.nr;
+
+	/* Check Rx error */
+	if (rx_ctrl.er) {
+		netdev->stats.rx_errors++;
+		goto rx_irq_clean;
+	}
+
+	/* Check Rx CRC error */
+	if (rx_ctrl.crc) {
+		netdev->stats.rx_crc_errors++;
+		netdev->stats.rx_dropped++;
+		goto rx_irq_clean;
+	}
+
+	/* Check Frame length Min 64b */
+	if (unlikely(frame_len < ETH_ZLEN)) {
+		netdev->stats.rx_length_errors++;
+		netdev->stats.rx_dropped++;
+		goto rx_irq_clean;
+	}
+
+	/* Skb allocation */
+	skb = netdev_alloc_skb_ip_align(netdev, frame_len);
+	if (unlikely(!skb)) {
+		netdev->stats.rx_errors++;
+		netdev->stats.rx_dropped++;
+		goto rx_irq_clean;
+	}
+
+	/* Copy frame from Rx fifo into the skb */
+	nps_enet_read_rx_fifo(netdev, skb->data, frame_len);
+
+	skb_put(skb, frame_len);
+	skb->dev = netdev;
+	skb->protocol = eth_type_trans(skb, netdev);
+	skb->ip_summed = CHECKSUM_UNNECESSARY;
+
+	netdev->stats.rx_packets++;
+	netdev->stats.rx_bytes += frame_len;
+
+	netif_rx(skb);
+	goto rx_irq_frame_done;
+
+rx_irq_clean:
+	/* Clean Rx fifo */
+	nps_enet_clean_rx_fifo(netdev, frame_len);
+
+rx_irq_frame_done:
+	/* Ack Rx ctrl register */
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_RX_CTL, 0);
+}
+
+static void nps_enet_tx_irq_handler(struct net_device *netdev,
+				    struct nps_enet_tx_ctl tx_ctrl)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+
+	/* Check Tx transmit error */
+	if (unlikely(tx_ctrl.et)) {
+		netdev->stats.tx_errors++;
+	} else {
+		netdev->stats.tx_packets++;
+		netdev->stats.tx_bytes += tx_ctrl.nt;
+	}
+
+	/* Ack Tx ctrl register */
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_TX_CTL, 0);
+
+	/* In nps_enet_start_xmit we disabled sending frames*/
+	netif_wake_queue(netdev);
+}
+
+/**
+ * nps_enet_irq_handler - Global interrupt handler for ENET.
+ * @irq:                irq number.
+ * @dev_instance:       device instance.
+ *
+ * returns: IRQ_HANDLED for all cases.
+ *
+ * EZchip ENET has 2 interrupt causes, and depending on bits raised in
+ * CTRL register we may tell what is a reason for interrupt to fire.
+ * We got one for RX and the other for TX (end).
+ */
+static irqreturn_t nps_enet_irq_handler(int irq, void *dev_instance)
+{
+	struct net_device *netdev = dev_instance;
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct nps_enet_rx_ctl rx_ctrl;
+	struct nps_enet_tx_ctl tx_ctrl;
+
+	/* Check for Rx ready */
+	rx_ctrl.value = nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_CTL);
+	if (rx_ctrl.cr)
+		nps_enet_rx_irq_handler(netdev, rx_ctrl);
+
+	/* Check for Tx done */
+	tx_ctrl.value = nps_enet_reg_get(net_priv, NPS_ENET_REG_TX_CTL);
+	if (net_priv->tx_packet_sent && !tx_ctrl.ct) {
+		nps_enet_tx_irq_handler(netdev, tx_ctrl);
+		net_priv->tx_packet_sent = false;
+	}
+
+	return IRQ_HANDLED;
+}
+
+static void nps_enet_set_hw_mac_address(struct net_device *netdev)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct nps_enet_ge_mac_cfg_1 ge_mac_cfg_1;
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &net_priv->ge_mac_cfg_2;
+
+	/* set MAC address in HW */
+	ge_mac_cfg_1.octet_0 = netdev->dev_addr[0];
+	ge_mac_cfg_1.octet_1 = netdev->dev_addr[1];
+	ge_mac_cfg_1.octet_2 = netdev->dev_addr[2];
+	ge_mac_cfg_1.octet_3 = netdev->dev_addr[3];
+	ge_mac_cfg_2->octet_4 = netdev->dev_addr[4];
+	ge_mac_cfg_2->octet_5 = netdev->dev_addr[5];
+
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_1,
+			 ge_mac_cfg_1.value);
+
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+}
+
+static void nps_enet_hw_reset(struct net_device *netdev)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct nps_enet_ge_rst ge_rst = {.value = 0};
+	struct nps_enet_phase_fifo_ctl phase_fifo_ctl = {.value = 0};
+
+	/* Pcs reset sequence*/
+	ge_rst.gmac_0 = NPS_ENET_ENABLE;
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+	usleep_range(10, 20);
+	ge_rst.value = 0;
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+
+	/* Tx fifo reset sequence */
+	phase_fifo_ctl.rst = NPS_ENET_ENABLE;
+	phase_fifo_ctl.init = NPS_ENET_ENABLE;
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+	usleep_range(10, 20);
+	phase_fifo_ctl.value = 0;
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+}
+
+static void nps_enet_hw_enable_control(struct net_device *netdev)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct nps_enet_ge_mac_cfg_0 ge_mac_cfg_0 = { .value = 0 };
+	struct nps_enet_buf_int_enable buf_int_enable = { .value = 0 };
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &net_priv->ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 *ge_mac_cfg_3 = &net_priv->ge_mac_cfg_3;
+	int max_frame_length;
+
+	/* Enable Rx and Tx statistics */
+	ge_mac_cfg_2->stat_en = NPS_ENET_GE_MAC_CFG_2_STAT_EN;
+
+	/* Discard packets with different MAC address */
+	ge_mac_cfg_2->disc_da = NPS_ENET_ENABLE;
+
+	/* Discard multicast packets */
+	ge_mac_cfg_2->disc_mc = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+
+	/* Discard Packets bigger than max frame length */
+	max_frame_length = ETH_HLEN + netdev->mtu + ETH_FCS_LEN;
+	if (max_frame_length <= NPS_ENET_MAX_FRAME_LENGTH) {
+		ge_mac_cfg_3->max_len = max_frame_length;
+		nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_3,
+				 ge_mac_cfg_3->value);
+	}
+
+	/* Enable interrupts */
+	buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
+	buf_int_enable.tx_done = NPS_ENET_ENABLE;
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_BUF_INT_ENABLE,
+			 buf_int_enable.value);
+
+	/* Write device MAC address to HW */
+	nps_enet_set_hw_mac_address(netdev);
+
+	/* Rx and Tx HW features */
+	ge_mac_cfg_0.tx_pad_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_crc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_crc_strip = NPS_ENET_ENABLE;
+
+	/* IFG configuration */
+	ge_mac_cfg_0.rx_ifg = NPS_ENET_GE_MAC_CFG_0_RX_IFG;
+	ge_mac_cfg_0.tx_ifg = NPS_ENET_GE_MAC_CFG_0_TX_IFG;
+
+	/* preamble configuration */
+	ge_mac_cfg_0.rx_pr_check_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_pr_len = NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN;
+
+	/* enable flow control frames */
+	ge_mac_cfg_0.tx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_fc_retr = NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR;
+
+	/* Enable Rx and Tx */
+	ge_mac_cfg_0.rx_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_en = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_0,
+			 ge_mac_cfg_0.value);
+}
+
+static void nps_enet_hw_disable_control(struct net_device *netdev)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+
+	/* Disable interrupts */
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
+
+	/* Disable Rx and Tx */
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_0, 0);
+}
+
+static void nps_enet_send_frame(struct net_device *netdev,
+				struct sk_buff *skb)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct nps_enet_tx_ctl tx_ctrl = { .value = 0 };
+	short length = skb->len;
+	int i, len = NPS_ENET_WORDS_NUM(length);
+	unsigned int *src = (unsigned int *)virt_to_phys(skb->data);
+	bool src_is_align = !((unsigned int)src & 0x3);
+
+	/* In case src is not aligned we need an intermediate buffer */
+	if (src_is_align)
+		for (i = 0; i < len; i++, src++)
+			nps_enet_reg_set(net_priv, NPS_ENET_REG_TX_BUF, *src);
+	else { /* !src_is_align */
+		for (i = 0; i < len; i++, src++) {
+			unsigned int buf;
+
+			memcpy(&buf, src, sizeof(buf));
+			nps_enet_reg_set(net_priv, NPS_ENET_REG_TX_BUF, buf);
+		}
+	}
+	/* Write the length of the Frame */
+	tx_ctrl.nt = length;
+
+	/* Indicate SW is done */
+	net_priv->tx_packet_sent = true;
+	tx_ctrl.ct = NPS_ENET_ENABLE;
+
+	/* Send Frame */
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_TX_CTL, tx_ctrl.value);
+}
+
+/**
+ * nps_enet_set_mac_address - Set the MAC address for this device.
+ * @ndev:       Pointer to net_device structure.
+ * @p:          6 byte Address to be written as MAC address.
+ *
+ * This function copies the HW address from the sockaddr structure to the
+ * net_device structure and updates the address in HW.
+ *
+ * returns:     -EBUSY if the net device is busy or 0 if the address is set
+ *              successfully.
+ */
+static int nps_enet_set_mac_address(struct net_device *ndev, void *p)
+{
+	struct sockaddr *addr = p;
+	int res;
+
+	if (netif_running(ndev))
+		return -EBUSY;
+
+	res = eth_mac_addr(ndev, p);
+	if (!res) {
+		ether_addr_copy(ndev->dev_addr, addr->sa_data);
+		nps_enet_set_hw_mac_address(ndev);
+	}
+
+	return res;
+}
+
+/**
+ * nps_enet_open - Open the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * returns: 0, on success or non-zero error value on failure.
+ *
+ * This function enables an IRQs for the ENET device and starts the Tx queue.
+ */
+static int nps_enet_open(struct net_device *ndev)
+{
+	int err;
+	struct nps_enet_priv *net_priv = netdev_priv(ndev);
+
+	/* Reset private variables */
+	net_priv->tx_packet_sent = false;
+	net_priv->ge_mac_cfg_2.value = 0;
+	net_priv->ge_mac_cfg_3.value = 0;
+
+	/* ge_mac_cfg_3 default values */
+	net_priv->ge_mac_cfg_3.rx_ifg_th = NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH;
+	net_priv->ge_mac_cfg_3.max_len = NPS_ENET_GE_MAC_CFG_3_MAX_LEN;
+
+	/* Disable HW device */
+	nps_enet_hw_disable_control(ndev);
+
+	/* irq Rx allocation */
+	err = request_irq(net_priv->irq, nps_enet_irq_handler,
+			  0, "enet-rx-tx", ndev);
+	if (err)
+		return err;
+
+	/* Enable HW device */
+	nps_enet_hw_reset(ndev);
+	nps_enet_hw_enable_control(ndev);
+
+	netif_start_queue(ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_stop - Close the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function stops the Tx queue, disables interrupts for the ENET device.
+ */
+static int nps_enet_stop(struct net_device *ndev)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(ndev);
+
+	netif_stop_queue(ndev);
+
+	nps_enet_hw_disable_control(ndev);
+
+	free_irq(net_priv->irq, ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_start_xmit - Starts the data transmission.
+ * @skb:        sk_buff pointer that contains data to be Transmitted.
+ * @ndev:       Pointer to net_device structure.
+ *
+ * returns: NETDEV_TX_OK, on success
+ *              NETDEV_TX_BUSY, if any of the descriptors are not free.
+ *
+ * This function is invoked from upper layers to initiate transmission.
+ */
+static netdev_tx_t nps_enet_start_xmit(struct sk_buff *skb,
+				       struct net_device *ndev)
+{
+	/* This driver handles one frame at a time  */
+	netif_stop_queue(ndev);
+
+	nps_enet_send_frame(ndev, skb);
+
+	dev_kfree_skb(skb);
+
+	return NETDEV_TX_OK;
+}
+
+/**
+ * nps_enet_get_stats - Get system network statistics.
+ * @ndev:       Pointer to net_device structure.
+ *
+ * Returns the address of the device statistics structure.
+ * Statistics are updated in interrupt handler.
+ */
+static struct net_device_stats *nps_enet_get_stats(struct net_device *ndev)
+{
+	return &ndev->stats;
+}
+
+#ifdef CONFIG_NET_POLL_CONTROLLER
+static void nps_enet_poll_controller(struct net_device *ndev)
+{
+	disable_irq(ndev->irq);
+	nps_enet_board_irq_handler(ndev->irq, ndev);
+	enable_irq(ndev->irq);
+}
+#endif
+
+static const struct net_device_ops nps_netdev_ops = {
+	.ndo_open		= nps_enet_open,
+	.ndo_stop		= nps_enet_stop,
+	.ndo_start_xmit		= nps_enet_start_xmit,
+	.ndo_get_stats		= nps_enet_get_stats,
+	.ndo_set_mac_address	= nps_enet_set_mac_address,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+	.ndo_poll_controller	= nps_enet_poll_controller,
+#endif
+};
+
+static int nps_enet_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct net_device *netdev;
+	struct nps_enet_priv *net_priv;
+	int err = 0;
+	const char *mac_addr;
+	struct resource res_regs;
+
+	if (!dev->of_node)
+		return -ENODEV;
+
+	netdev = alloc_etherdev(sizeof(struct nps_enet_priv));
+	if (!netdev)
+		return -ENOMEM;
+
+	platform_set_drvdata(pdev, netdev);
+	SET_NETDEV_DEV(netdev, dev);
+	net_priv = netdev_priv(netdev);
+
+	/* Get ENET registers base address from device tree */
+	err = of_address_to_resource(dev->of_node, 0, &res_regs);
+	if (err) {
+		dev_err(dev, "failed to retrieve registers base from device tree\n");
+		err = -ENODEV;
+		goto out_netdev;
+	}
+
+	/* The EZ NET specific entries in the device structure. */
+	netdev->netdev_ops = &nps_netdev_ops;
+	netdev->watchdog_timeo = (400 * HZ / 1000);
+	netdev->flags &= ~IFF_MULTICAST;
+
+	net_priv->regs_base = devm_ioremap_resource(dev, &res_regs);
+	if (IS_ERR(net_priv->regs_base)) {
+		err = PTR_ERR(net_priv->regs_base);
+		goto out_netdev;
+	}
+	dev_dbg(dev, "Registers base address is 0x%p\n", net_priv->regs_base);
+
+	/* set kernel MAC address to dev */
+	mac_addr = of_get_mac_address(dev->of_node);
+	if (mac_addr)
+		ether_addr_copy(netdev->dev_addr, mac_addr);
+	else
+		eth_hw_addr_random(netdev);
+
+	/* Get IRQ number from device tree */
+	net_priv->irq = irq_of_parse_and_map(dev->of_node, 0);
+	if (!net_priv->irq) {
+		dev_err(dev, "failed to retrieve <irq Rx-Tx> value from device tree\n");
+		err = -ENODEV;
+		goto out_netdev;
+	}
+
+	/* Register the driver. Should be the last thing in probe */
+	err = register_netdev(netdev);
+	if (err) {
+		dev_err(dev, "Failed to register netdev for %s, err = 0x%08x\n",
+			netdev->name, (int)err);
+		err = -ENODEV;
+		goto out_netdev;
+	}
+
+	dev_info(dev, "(rx/tx=%d)\n", net_priv->irq);
+
+out_netdev:
+	if (err)
+		free_netdev(netdev);
+
+	return 0;
+}
+
+static int nps_enet_remove(struct platform_device *pdev)
+{
+	struct net_device *netdev = platform_get_drvdata(pdev);
+
+	unregister_netdev(netdev);
+
+	free_netdev(netdev);
+
+	return 0;
+}
+
+static const struct of_device_id nps_enet_dt_ids[] = {
+	{ .compatible = "ezchip,nps-enet" },
+	{ /* Sentinel */ }
+};
+
+static struct platform_driver nps_enet_driver = {
+	.probe = nps_enet_probe,
+	.remove = nps_enet_remove,
+	.driver = {
+		.name = DRV_NAME,
+		.of_match_table  = nps_enet_dt_ids,
+	},
+};
+
+module_platform_driver(nps_enet_driver);
+
+MODULE_AUTHOR("EZchip Semiconductor");
+MODULE_LICENSE("GPL");
diff --git a/drivers/net/ethernet/ezchip/nps_enet.h b/drivers/net/ethernet/ezchip/nps_enet.h
new file mode 100644
index 0000000..8b8b8a6
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.h
@@ -0,0 +1,311 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#ifndef _NPS_ENET_H
+#define _NPS_ENET_H
+
+/* default values */
+#define NPS_ENET_MAX_FRAME_LENGTH		0x3FFF
+#define NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR	0x7
+#define NPS_ENET_GE_MAC_CFG_0_RX_IFG		0x5
+#define NPS_ENET_GE_MAC_CFG_0_TX_IFG		0xC
+#define NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN		0x7
+#define NPS_ENET_GE_MAC_CFG_2_STAT_EN		0x3
+#define NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH		0x14
+#define NPS_ENET_GE_MAC_CFG_3_MAX_LEN		0x3FFC
+#define NPS_ENET_ENABLE				1
+#define NPS_ENET_DISABLE			0
+
+/* register definitions  */
+#define NPS_ENET_REG_TX_CTL		0x800
+#define NPS_ENET_REG_TX_BUF		0x808
+#define NPS_ENET_REG_RX_CTL		0x810
+#define NPS_ENET_REG_RX_BUF		0x818
+#define NPS_ENET_REG_BUF_INT_ENABLE	0x8C0
+#define NPS_ENET_REG_GE_MAC_CFG_0	0x1000
+#define NPS_ENET_REG_GE_MAC_CFG_1	0x1004
+#define NPS_ENET_REG_GE_MAC_CFG_2	0x1008
+#define NPS_ENET_REG_GE_MAC_CFG_3	0x100C
+#define NPS_ENET_REG_GE_RST		0x1400
+#define NPS_ENET_REG_PHASE_FIFO_CTL	0x1404
+
+/* Tx control register */
+struct nps_enet_tx_ctl {
+	union {
+		/* ct: SW sets to indicate frame ready in Tx buffer for
+		 *     transmission. HW resets to when transmission done
+		 * et: Transmit error
+		 * nt: Length in bytes of Tx frame loaded to Tx buffer
+		 */
+		struct {
+			unsigned int
+			__reserved_1:16,
+			ct:1,
+			et:1,
+			__reserved_2:3,
+			nt:11;
+		};
+
+		unsigned int value;
+	};
+};
+
+/* Rx control register */
+struct nps_enet_rx_ctl {
+	union {
+		/* cr:  HW sets to indicate frame ready in Rx buffer.
+		 *      SW resets to indicate host read received frame
+		 *      and new frames can be written to Rx buffer
+		 * er:  Rx error indication
+		 * crc: Rx CRC error indication
+		 * nr:  Length in bytes of Rx frame loaded by MAC to Rx buffer
+		 */
+		struct {
+			unsigned int
+			__reserved_1:16,
+			cr:1,
+			er:1,
+			crc:1,
+			__reserved_2:2,
+			nr:11;
+		};
+
+		unsigned int value;
+	};
+};
+
+/* Interrupt enable for data buffer events register */
+struct nps_enet_buf_int_enable {
+	union {
+		/* tx_done: Interrupt generation in the case when new frame
+		 *          is ready in Rx buffer
+		 * rx_rdy:  Interrupt generation in the case when current frame
+		 *          was read from TX buffer
+		 */
+		struct {
+			unsigned int
+			__reserved:30,
+			tx_done:1,
+			rx_rdy:1;
+		};
+
+		unsigned int value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 0 register */
+struct nps_enet_ge_mac_cfg_0 {
+	union {
+		/* tx_pr_len:          Transmit preamble length in bytes
+		 * tx_ifg_nib:         Tx idle pattern
+		 * nib_mode:           Nibble (4-bit) Mode
+		 * rx_pr_check_en:     Receive preamble Check Enable
+		 * tx_ifg:             Transmit inter-Frame Gap
+		 * rx_ifg:             Receive inter-Frame Gap
+		 * tx_fc_retr:         Transmit Flow Control Retransmit Mode
+		 * rx_length_check_en: Receive Length Check Enable
+		 * rx_crc_ignore:      Results of the CRC check are ignored
+		 * rx_crc_strip:       MAC strips the CRC from received frames
+		 * rx_fc_en:           Receive Flow Control Enable
+		 * tx_crc_en:          Transmit CRC Enabled
+		 * tx_pad_en:          Transmit Padding Enable
+		 * tx_cf_en:           Transmit Flow Control Enable
+		 * tx_en:              Transmit Enable
+		 * rx_en:              Receive Enable
+		 */
+		struct {
+			unsigned int
+			tx_pr_len:4,
+			tx_ifg_nib:4,
+			nib_mode:1,
+			rx_pr_check_en:1,
+			tx_ifg:6,
+			rx_ifg:4,
+			tx_fc_retr:3,
+			rx_length_check_en:1,
+			rx_crc_ignore:1,
+			rx_crc_strip:1,
+			rx_fc_en:1,
+			tx_crc_en:1,
+			tx_pad_en:1,
+			tx_fc_en:1,
+			tx_en:1,
+			rx_en:1;
+		};
+
+		unsigned int value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 1 register */
+struct nps_enet_ge_mac_cfg_1 {
+	union {
+		/* octet_3: MAC address octet 3
+		 * octet_2: MAC address octet 2
+		 * octet_1: MAC address octet 1
+		 * octet_0: MAC address octet 0
+		 */
+		struct {
+			unsigned int
+			octet_3:8,
+			octet_2:8,
+			octet_1:8,
+			octet_0:8;
+		};
+
+		unsigned int value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 2 register */
+struct nps_enet_ge_mac_cfg_2 {
+	union {
+		/* transmit_flush_en: MAC flush enable
+		 * stat_en:           RMON statistics interface enable
+		 * disc_da:           Discard frames with DA different
+		 *                    from MAC address
+		 * disc_bc:           Discard broadcast frames
+		 * disc_mc:           Discard multicast frames
+		 * octet_5:           MAC address octet 5
+		 * octet_4:           MAC address octet 4
+		 */
+		struct {
+			unsigned int
+			transmit_flush_en:1,
+			__reserved_1:5,
+			stat_en:2,
+			__reserved_2:1,
+			disc_da:1,
+			disc_bc:1,
+			disc_mc:1,
+			__reserved_3:4,
+			octet_5:8,
+			octet_4:8;
+		};
+
+		unsigned int value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 3 register */
+struct nps_enet_ge_mac_cfg_3 {
+	union {
+		/* ext_oob_cbfc_sel:  Selects one of the 4 profiles for
+		 *                    extended OOB in-flow-control indication
+		 * max_len:           Maximum receive frame length in bytes
+		 * tx_cbfc_en:        Enable transmission of class-based
+		 *                    flow control packets
+		 * rx_ifg_th:         Threshold for IFG status reporting via OOB
+		 * cf_timeout:        Configurable time to decrement FC counters
+		 * cf_drop:           Drop control frames
+		 * redirect_cbfc_sel: Selects one of CBFC redirect profiles
+		 * rx_cbfc_redir_en:  Enable Rx class-based flow
+		 *                    control redirect
+		 * rx_cbfc_en:        Enable Rx class-based flow control
+		 * tm_hd_mode:        TM header mode
+		 */
+		struct {
+			unsigned int
+			ext_oob_cbfc_sel:2,
+			max_len:14,
+			tx_cbfc_en:1,
+			rx_ifg_th:5,
+			cf_timeout:4,
+			cf_drop:1,
+			redirect_cbfc_sel:2,
+			rx_cbfc_redir_en:1,
+			rx_cbfc_en:1,
+			tm_hd_mode:1;
+		};
+
+		unsigned int value;
+	};
+};
+
+/* GE MAC, PCS reset control register */
+struct nps_enet_ge_rst {
+	union {
+		/* gmac_0: GE MAC reset
+		 * spcs_0: SGMII PCS reset
+		 */
+		struct {
+			unsigned int
+			__reserved_1:23,
+			gmac_0:1,
+			__reserved_2:7,
+			spcs_0:1;
+		};
+
+		unsigned int value;
+	};
+};
+
+/* Tx phase sync FIFO control register */
+struct nps_enet_phase_fifo_ctl {
+	union {
+		/* init: initialize serdes TX phase sync FIFO pointers
+		 * rst:  reset serdes TX phase sync FIFO
+		 */
+		struct {
+			unsigned int
+			__reserved:30,
+			init:1,
+			rst:1;
+		};
+
+		unsigned int value;
+	};
+};
+
+/**
+ * struct nps_enet_priv - Storage of ENET's private information.
+ * @regs:       Base address of ENET memory-mapped control registers.
+ * @irq:        For RX/TX IRQ number.
+ * @tx_packet_sent: SW indication if frame is being sent
+ */
+struct nps_enet_priv {
+	void	__iomem *regs_base;
+	int	irq;
+	bool	tx_packet_sent;
+	struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 ge_mac_cfg_3;
+};
+
+/**
+ * nps_reg_set - Sets ENET register with provided value.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ * @value:      Value to set in register.
+ */
+static inline void nps_enet_reg_set(struct nps_enet_priv *priv,
+				    int reg, int value)
+{
+	iowrite32be(value, priv->regs_base + reg);
+}
+
+/**
+ * nps_reg_get - Gets value of specified ENET register.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ *
+ * returns:     Value of requested register.
+ */
+static inline unsigned int nps_enet_reg_get(struct nps_enet_priv *priv, int reg)
+{
+	return ioread32be(priv->regs_base + reg);
+}
+
+#endif /* _NPS_ENET_H */
-- 
1.7.1


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* Re: [PATCH] NET: Add ezchip ethernet driver
  2015-06-09 12:44 [PATCH] NET: Add ezchip ethernet driver Noam Camus
@ 2015-06-09 14:11 ` Alexey Brodkin
  2015-06-10  7:54 ` Paul Bolle
  2015-06-11  8:33 ` [PATCH v2] " Noam Camus
  2 siblings, 0 replies; 28+ messages in thread
From: Alexey Brodkin @ 2015-06-09 14:11 UTC (permalink / raw)
  To: noamc; +Cc: netdev, linux-kernel, cmetcalf, Vineet.Gupta1, talz, giladb

Hi Noam, Tal,

On Tue, 2015-06-09 at 15:44 +0300, Noam Camus wrote:
> From: Tal Zilcer <talz@ezchip.com>
> 
> Simple LAN device without multicast support.
> Device performance is not high and may be used for
> debug or management purposes.
> Device supports interrupts for RX and TX end.
> Device does not support NAPI and also does not support DMA.
> It is used in EZchip NPS devices.
> 
> Signed-off-by: Noam Camus <noamc@ezchip.com>

Probably it's good to add Tal in "Signed-off-by" here as well.

[snip]

> +static void nps_enet_read_rx_fifo(struct net_device *netdev,
> +                               unsigned char *dst, int length)
> +{
> +     struct nps_enet_priv *net_priv = netdev_priv(netdev);
> +     int i, len = (length >> 2);

I'd say brackets are not really required here, why not just "int i, len
= length >> 2;"?

> +     int last = length & 3;

Shouldn't it be "int last = length & (sizeof(int) - 1);"? Well,
assuming we're talking 4-byte words here.

> +     unsigned int *reg = (unsigned int *)dst;
> +     bool dst_is_align = !((unsigned int)dst & 0x3);
> +
> +     /* In case dst is not aligned we need an intermediate buffer 
> */
> +     if (dst_is_align)
> +             for (i = 0; i < len; i++, reg++)
> +                     *reg = nps_enet_reg_get(net_priv, 
> NPS_ENET_REG_RX_BUF);
> +     else { /* !dst_is_align */
> +             unsigned int buf;
> +
> +             for (i = 0; i < len; i++, reg++) {

I would move definition of "buf" right here in the "for" loop because
it is not used outside this "for", right?

> +                     buf = nps_enet_reg_get(net_priv, 
> NPS_ENET_REG_RX_BUF);
> +                     memcpy(reg, &buf, sizeof(buf));

Here I think it might be useful to add a comment saying why memcpy() is
used here, like to accommodate word-unaligned address of "reg" we have
to do memcpy() instead of simple "=".

> +             }
> +     }
> +
> +     /* copy last bytes (if any) */
> +     if (last) {
> +             unsigned int buf;
> +
> +             buf = nps_enet_reg_get(net_priv, 
> NPS_ENET_REG_RX_BUF);

Here as well no need for separate lines for "buf" declaration and real
usage, let's have more compact "unsigned int buf =
nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_BUF);".

Also what might be good is to make "buf" of explicit storage type. Now
it's just "int" but once you move to 64-bit CPU core length of "int"
will change. So "u32" IMHO is a better option here - that's actually
applicable through all the driver, so please re-visit this topic.

> +             memcpy(reg, &buf, last);

BTW it might also be nice to add a check for "last" value so it never
gets larger than both "reg" and "buf" size.

> +     }
> +}
> +
> +static void nps_enet_rx_irq_handler(struct net_device *netdev,
> +                                 struct nps_enet_rx_ctl rx_ctrl)
> +{
> +     struct nps_enet_priv *net_priv = netdev_priv(netdev);
> +     struct sk_buff *skb;
> +     int frame_len = rx_ctrl.nr;
> +
> +     /* Check Rx error */
> +     if (rx_ctrl.er) {
> +             netdev->stats.rx_errors++;
> +             goto rx_irq_clean;

Why do you go straight to "rx_irq_clean" here and in branches below?
Isn't it possible to have simultaneously set following flags
"rx_ctrl.er", "rx_ctrl.crc" plus "frame_len < ETH_ZLEN" etc?

> +     }
> +
> +     /* Check Rx CRC error */
> +     if (rx_ctrl.crc) {
> +             netdev->stats.rx_crc_errors++;
> +             netdev->stats.rx_dropped++;
> +             goto rx_irq_clean;
> +     }

[snip]

> +/**
> + * nps_enet_irq_handler - Global interrupt handler for ENET.
> + * @irq:                irq number.
> + * @dev_instance:       device instance.
> + *
> + * returns: IRQ_HANDLED for all cases.
> + *
> + * EZchip ENET has 2 interrupt causes, and depending on bits raised 
> in
> + * CTRL register we may tell what is a reason for interrupt to fire.
> + * We got one for RX and the other for TX (end).
> + */
> +static irqreturn_t nps_enet_irq_handler(int irq, void *dev_instance)
> +{
> +     struct net_device *netdev = dev_instance;
> +     struct nps_enet_priv *net_priv = netdev_priv(netdev);
> +     struct nps_enet_rx_ctl rx_ctrl;
> +     struct nps_enet_tx_ctl tx_ctrl;

Both "rx_ctrl" and "tx_ctrl" could be put in one line.

[snip]

> +static void nps_enet_hw_reset(struct net_device *netdev)
> +{
> +     struct nps_enet_priv *net_priv = netdev_priv(netdev);
> +     struct nps_enet_ge_rst ge_rst = {.value = 0};
> +     struct nps_enet_phase_fifo_ctl phase_fifo_ctl = {.value = 
> 0};
> +
> +     /* Pcs reset sequence*/
> +     ge_rst.gmac_0 = NPS_ENET_ENABLE;
> +     nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_RST, 
> ge_rst.value);
> +     usleep_range(10, 20);

I'm wondering if there's a possibility to read back for example the
same bit we set and once it gets reset by hardware we then know for
sure that hardware exited reset state? If there's such a possibility we
may just busywait for it... well probably with known timeout to report
a problem if hardware still in reset state.

Otherwise you cannot be sure hardware is ready to operate really.

Probably I'm nitpicking here but in general driver looks good to me so
feel free to add:

Acked-by: Alexey Brodkin <abrodkin@synopsys.com>

-Alexey

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH] NET: Add ezchip ethernet driver
  2015-06-09 12:44 [PATCH] NET: Add ezchip ethernet driver Noam Camus
  2015-06-09 14:11 ` Alexey Brodkin
@ 2015-06-10  7:54 ` Paul Bolle
  2015-06-11  8:33 ` [PATCH v2] " Noam Camus
  2 siblings, 0 replies; 28+ messages in thread
From: Paul Bolle @ 2015-06-10  7:54 UTC (permalink / raw)
  To: Noam Camus
  Cc: netdev, linux-kernel, Alexey.Brodkin, vgupta, giladb, cmetcalf,
	Tal Zilcer

Just a nit and a question.

On Tue, 2015-06-09 at 15:44 +0300, Noam Camus wrote:
> --- /dev/null
> +++ b/drivers/net/ethernet/ezchip/Kconfig

> +config NET_VENDOR_EZCHIP
> +	bool "EZchip devices"
> +	default y
> +	---help---
> +	  If you have a network (Ethernet) device belonging to this class, say Y
> +	  and read the Ethernet-HOWTO, available from
> +	  <http://www.tldp.org/docs.html#howto>.
> +
> +	  Note that the answer to this question doesn't directly affect the
> +	  kernel: saying N will just cause the configurator to skip all
> +	  the questions about EZchip devices. If you say Y, you will be asked for
> +	  your specific device in the following questions.
> +
> +if NET_VENDOR_EZCHIP
> +
> +config EZCHIP_NPS_LAN
> +	tristate "EZchip NPS LAN support"
> +	default y

It's not common for drivers to default to 'y'. Any specific reason to do
so here?

> +	---help---
> +	  Simple LAN device without multicast support.
> +	  Device performance is not high and may be used for
> +	  debug or management purposes.
> +	  Device supports interrupts for RX and TX(end).
> +	  Device does not support NAPI and also does not support DMA.
> +
> +endif

> --- /dev/null
> +++ b/drivers/net/ethernet/ezchip/nps_enet.c

> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + * The full GNU General Public License is included in this distribution in
> + * the file called "COPYING".

This states the license is GPL v2.

> +MODULE_LICENSE("GPL");

And, according to include/linux/module.h, this states the license is GPL
v2 or later. So I think that either the comment at the top of this file
or the ident used in the MODULE_LICENSE() macro needs to change.


Paul Bolle


^ permalink raw reply	[flat|nested] 28+ messages in thread

* [PATCH v2] NET: Add ezchip ethernet driver
  2015-06-09 12:44 [PATCH] NET: Add ezchip ethernet driver Noam Camus
  2015-06-09 14:11 ` Alexey Brodkin
  2015-06-10  7:54 ` Paul Bolle
@ 2015-06-11  8:33 ` Noam Camus
  2015-06-11 17:41   ` [PATCH v3] " Noam Camus
  2015-06-11 22:43   ` [PATCH v2] " David Miller
  2 siblings, 2 replies; 28+ messages in thread
From: Noam Camus @ 2015-06-11  8:33 UTC (permalink / raw)
  To: netdev, linux-kernel
  Cc: Alexey.Brodkin, vgupta, giladb, cmetcalf, Tal Zilcer, Noam Camus

From: Tal Zilcer <talz@ezchip.com>

Simple LAN device without multicast support.
Device performance is not high and may be used for
debug or management purposes.
Device supports interrupts for RX and TX end.
Device does not support NAPI and also does not support DMA.
It is used in EZchip NPS devices.

Signed-off-by: Noam Camus <noamc@ezchip.com>
Signed-off-by: Tal Zilcer <talz@ezchip.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
---
 .../devicetree/bindings/net/ezchip_enet.txt        |   15 +
 drivers/net/ethernet/Kconfig                       |    1 +
 drivers/net/ethernet/Makefile                      |    1 +
 drivers/net/ethernet/ezchip/Kconfig                |   29 +
 drivers/net/ethernet/ezchip/Makefile               |    1 +
 drivers/net/ethernet/ezchip/nps_enet.c             |  597 ++++++++++++++++++++
 drivers/net/ethernet/ezchip/nps_enet.h             |  311 ++++++++++
 7 files changed, 955 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/ezchip_enet.txt
 create mode 100644 drivers/net/ethernet/ezchip/Kconfig
 create mode 100644 drivers/net/ethernet/ezchip/Makefile
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.c
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.h

diff --git a/Documentation/devicetree/bindings/net/ezchip_enet.txt b/Documentation/devicetree/bindings/net/ezchip_enet.txt
new file mode 100644
index 0000000..d2bf9ab
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ezchip_enet.txt
@@ -0,0 +1,15 @@
+* EZchip NPS ENET 10/100 Ethernet driver (ENET)
+
+Required properties:
+- compatible: Should be "ezchip,nps-enet"
+- reg: Address and length of the register set for the device
+- interrupts: Should contain the ENET interrupt
+
+Examples:
+
+	ethernet@f0003000 {
+		compatible = "ezchip,nps-enet";
+		reg = <0xf0003000 0x44>;
+		interrupts = <7>;
+		mac-address = [ 00 11 22 33 44 55 ];
+	};
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index eadcb05..1a6b1ba 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -66,6 +66,7 @@ config DNET
 source "drivers/net/ethernet/dec/Kconfig"
 source "drivers/net/ethernet/dlink/Kconfig"
 source "drivers/net/ethernet/emulex/Kconfig"
+source "drivers/net/ethernet/ezchip/Kconfig"
 source "drivers/net/ethernet/neterion/Kconfig"
 source "drivers/net/ethernet/faraday/Kconfig"
 source "drivers/net/ethernet/freescale/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 1367afc..489f9cc 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_DNET) += dnet.o
 obj-$(CONFIG_NET_VENDOR_DEC) += dec/
 obj-$(CONFIG_NET_VENDOR_DLINK) += dlink/
 obj-$(CONFIG_NET_VENDOR_EMULEX) += emulex/
+obj-$(CONFIG_NET_VENDOR_EZCHIP) += ezchip/
 obj-$(CONFIG_NET_VENDOR_EXAR) += neterion/
 obj-$(CONFIG_NET_VENDOR_FARADAY) += faraday/
 obj-$(CONFIG_NET_VENDOR_FREESCALE) += freescale/
diff --git a/drivers/net/ethernet/ezchip/Kconfig b/drivers/net/ethernet/ezchip/Kconfig
new file mode 100644
index 0000000..e830d2e
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Kconfig
@@ -0,0 +1,29 @@
+#
+# EZchip network device configuration
+#
+
+config NET_VENDOR_EZCHIP
+	bool "EZchip devices"
+	default y
+	---help---
+	  If you have a network (Ethernet) device belonging to this class, say Y
+	  and read the Ethernet-HOWTO, available from
+	  <http://www.tldp.org/docs.html#howto>.
+
+	  Note that the answer to this question doesn't directly affect the
+	  kernel: saying N will just cause the configurator to skip all
+	  the questions about EZchip devices. If you say Y, you will be asked for
+	  your specific device in the following questions.
+
+if NET_VENDOR_EZCHIP
+
+config EZCHIP_NPS_LAN
+	tristate "EZchip NPS LAN support"
+	---help---
+	  Simple LAN device without multicast support.
+	  Device performance is not high and may be used for
+	  debug or management purposes.
+	  Device supports interrupts for RX and TX(end).
+	  Device does not support NAPI and also does not support DMA.
+
+endif
diff --git a/drivers/net/ethernet/ezchip/Makefile b/drivers/net/ethernet/ezchip/Makefile
new file mode 100644
index 0000000..806e13d
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_EZCHIP_NPS_LAN) += nps_enet.o
diff --git a/drivers/net/ethernet/ezchip/nps_enet.c b/drivers/net/ethernet/ezchip/nps_enet.c
new file mode 100644
index 0000000..00f115a
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.c
@@ -0,0 +1,597 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#include <linux/module.h>
+#include <linux/etherdevice.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_net.h>
+#include <linux/of_platform.h>
+#include "nps_enet.h"
+
+#define DRV_NAME			"nps_enet"
+
+#define NPS_ENET_INT_MASK		(sizeof(u32) - 1)
+#define NPS_ENET_INT_OFFSET		2
+#define NPS_ENET_WORDS_NUM(length)	((length + NPS_ENET_INT_MASK) >> 2)
+
+static void nps_enet_clean_rx_fifo(struct net_device *netdev, s32 frame_len)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	s32 i, len = NPS_ENET_WORDS_NUM(frame_len);
+
+	/* Empty Rx FIFO buffer by reading all words */
+	for (i = 0; i < len; i++)
+		nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_BUF);
+}
+
+static void nps_enet_read_rx_fifo(struct net_device *netdev,
+				  unsigned char *dst, s32 length)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	s32 i, len = length >> NPS_ENET_INT_OFFSET;
+	s32 last = length & NPS_ENET_INT_MASK;
+	u32 *reg = (u32 *)dst;
+	bool dst_is_aligned = !((u32)dst & NPS_ENET_INT_MASK);
+
+	/* In case dst is not aligned we need an intermediate buffer */
+	if (dst_is_aligned)
+		for (i = 0; i < len; i++, reg++)
+			*reg = nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_BUF);
+	else { /* !dst_is_aligned */
+		for (i = 0; i < len; i++, reg++) {
+			u32 buf =
+				nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_BUF);
+
+			/* to accommodate word-unaligned address of "reg"
+			 * we have to do memcpy() instead of simple "="
+			 */
+			memcpy(reg, &buf, sizeof(buf));
+		}
+	}
+
+	/* copy last bytes (if any) */
+	if (last) {
+		u32 buf = nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_BUF);
+
+		memcpy(reg, &buf, last);
+	}
+}
+
+static void nps_enet_rx_irq_handler(struct net_device *netdev,
+				    struct nps_enet_rx_ctl rx_ctrl)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct sk_buff *skb;
+	s32 frame_len = rx_ctrl.nr, err = 0 ;
+
+	/* Check Rx error */
+	if (rx_ctrl.er) {
+		netdev->stats.rx_errors++;
+		err = 1;
+	}
+
+	/* Check Rx CRC error */
+	if (rx_ctrl.crc) {
+		netdev->stats.rx_crc_errors++;
+		netdev->stats.rx_dropped++;
+		err = 1;
+	}
+
+	/* Check Frame length Min 64b */
+	if (unlikely(frame_len < ETH_ZLEN)) {
+		netdev->stats.rx_length_errors++;
+		netdev->stats.rx_dropped++;
+		err = 1;
+	}
+
+	if (err)
+		goto rx_irq_clean;
+
+	/* Skb allocation */
+	skb = netdev_alloc_skb_ip_align(netdev, frame_len);
+	if (unlikely(!skb)) {
+		netdev->stats.rx_errors++;
+		netdev->stats.rx_dropped++;
+		goto rx_irq_clean;
+	}
+
+	/* Copy frame from Rx fifo into the skb */
+	nps_enet_read_rx_fifo(netdev, skb->data, frame_len);
+
+	skb_put(skb, frame_len);
+	skb->dev = netdev;
+	skb->protocol = eth_type_trans(skb, netdev);
+	skb->ip_summed = CHECKSUM_UNNECESSARY;
+
+	netdev->stats.rx_packets++;
+	netdev->stats.rx_bytes += frame_len;
+
+	netif_rx(skb);
+	goto rx_irq_frame_done;
+
+rx_irq_clean:
+	/* Clean Rx fifo */
+	nps_enet_clean_rx_fifo(netdev, frame_len);
+
+rx_irq_frame_done:
+	/* Ack Rx ctrl register */
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_RX_CTL, 0);
+}
+
+static void nps_enet_tx_irq_handler(struct net_device *netdev,
+				    struct nps_enet_tx_ctl tx_ctrl)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+
+	/* Check Tx transmit error */
+	if (unlikely(tx_ctrl.et)) {
+		netdev->stats.tx_errors++;
+	} else {
+		netdev->stats.tx_packets++;
+		netdev->stats.tx_bytes += tx_ctrl.nt;
+	}
+
+	/* Ack Tx ctrl register */
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_TX_CTL, 0);
+
+	/* In nps_enet_start_xmit we disabled sending frames*/
+	netif_wake_queue(netdev);
+}
+
+/**
+ * nps_enet_irq_handler - Global interrupt handler for ENET.
+ * @irq:                irq number.
+ * @dev_instance:       device instance.
+ *
+ * returns: IRQ_HANDLED for all cases.
+ *
+ * EZchip ENET has 2 interrupt causes, and depending on bits raised in
+ * CTRL register we may tell what is a reason for interrupt to fire.
+ * We got one for RX and the other for TX (end).
+ */
+static irqreturn_t nps_enet_irq_handler(s32 irq, void *dev_instance)
+{
+	struct net_device *netdev = dev_instance;
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct nps_enet_rx_ctl rx_ctrl;
+	struct nps_enet_tx_ctl tx_ctrl;
+
+	/* Check for Rx ready */
+	rx_ctrl.value = nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_CTL);
+	if (rx_ctrl.cr)
+		nps_enet_rx_irq_handler(netdev, rx_ctrl);
+
+	/* Check for Tx done */
+	tx_ctrl.value = nps_enet_reg_get(net_priv, NPS_ENET_REG_TX_CTL);
+	if (net_priv->tx_packet_sent && !tx_ctrl.ct) {
+		nps_enet_tx_irq_handler(netdev, tx_ctrl);
+		net_priv->tx_packet_sent = false;
+	}
+
+	return IRQ_HANDLED;
+}
+
+static void nps_enet_set_hw_mac_address(struct net_device *netdev)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct nps_enet_ge_mac_cfg_1 ge_mac_cfg_1;
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &net_priv->ge_mac_cfg_2;
+
+	/* set MAC address in HW */
+	ge_mac_cfg_1.octet_0 = netdev->dev_addr[0];
+	ge_mac_cfg_1.octet_1 = netdev->dev_addr[1];
+	ge_mac_cfg_1.octet_2 = netdev->dev_addr[2];
+	ge_mac_cfg_1.octet_3 = netdev->dev_addr[3];
+	ge_mac_cfg_2->octet_4 = netdev->dev_addr[4];
+	ge_mac_cfg_2->octet_5 = netdev->dev_addr[5];
+
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_1,
+			 ge_mac_cfg_1.value);
+
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+}
+
+/**
+ * nps_enet_hw_reset - Reset the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function reset the PCS and TX fifo.
+ * The programming model is to set the relevant reset bits
+ * wait for some time for this to propagate and then unset
+ * the reset bits. This way we ensure that reset procedure
+ * is done successfully by device.
+ */
+static void nps_enet_hw_reset(struct net_device *ndev)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(ndev);
+	struct nps_enet_ge_rst ge_rst = {.value = 0};
+	struct nps_enet_phase_fifo_ctl phase_fifo_ctl = {.value = 0};
+
+	/* Pcs reset sequence*/
+	ge_rst.gmac_0 = NPS_ENET_ENABLE;
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+	usleep_range(10, 20);
+	ge_rst.value = 0;
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+
+	/* Tx fifo reset sequence */
+	phase_fifo_ctl.rst = NPS_ENET_ENABLE;
+	phase_fifo_ctl.init = NPS_ENET_ENABLE;
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+	usleep_range(10, 20);
+	phase_fifo_ctl.value = 0;
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+}
+
+static void nps_enet_hw_enable_control(struct net_device *netdev)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct nps_enet_ge_mac_cfg_0 ge_mac_cfg_0 = { .value = 0 };
+	struct nps_enet_buf_int_enable buf_int_enable = { .value = 0 };
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &net_priv->ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 *ge_mac_cfg_3 = &net_priv->ge_mac_cfg_3;
+	s32 max_frame_length;
+
+	/* Enable Rx and Tx statistics */
+	ge_mac_cfg_2->stat_en = NPS_ENET_GE_MAC_CFG_2_STAT_EN;
+
+	/* Discard packets with different MAC address */
+	ge_mac_cfg_2->disc_da = NPS_ENET_ENABLE;
+
+	/* Discard multicast packets */
+	ge_mac_cfg_2->disc_mc = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+
+	/* Discard Packets bigger than max frame length */
+	max_frame_length = ETH_HLEN + netdev->mtu + ETH_FCS_LEN;
+	if (max_frame_length <= NPS_ENET_MAX_FRAME_LENGTH) {
+		ge_mac_cfg_3->max_len = max_frame_length;
+		nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_3,
+				 ge_mac_cfg_3->value);
+	}
+
+	/* Enable interrupts */
+	buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
+	buf_int_enable.tx_done = NPS_ENET_ENABLE;
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_BUF_INT_ENABLE,
+			 buf_int_enable.value);
+
+	/* Write device MAC address to HW */
+	nps_enet_set_hw_mac_address(netdev);
+
+	/* Rx and Tx HW features */
+	ge_mac_cfg_0.tx_pad_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_crc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_crc_strip = NPS_ENET_ENABLE;
+
+	/* IFG configuration */
+	ge_mac_cfg_0.rx_ifg = NPS_ENET_GE_MAC_CFG_0_RX_IFG;
+	ge_mac_cfg_0.tx_ifg = NPS_ENET_GE_MAC_CFG_0_TX_IFG;
+
+	/* preamble configuration */
+	ge_mac_cfg_0.rx_pr_check_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_pr_len = NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN;
+
+	/* enable flow control frames */
+	ge_mac_cfg_0.tx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_fc_retr = NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR;
+
+	/* Enable Rx and Tx */
+	ge_mac_cfg_0.rx_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_en = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_0,
+			 ge_mac_cfg_0.value);
+}
+
+static void nps_enet_hw_disable_control(struct net_device *netdev)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+
+	/* Disable interrupts */
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
+
+	/* Disable Rx and Tx */
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_0, 0);
+}
+
+static void nps_enet_send_frame(struct net_device *netdev,
+				struct sk_buff *skb)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct nps_enet_tx_ctl tx_ctrl = { .value = 0 };
+	short length = skb->len;
+	s32 i, len = NPS_ENET_WORDS_NUM(length);
+	u32 *src = (u32 *)virt_to_phys(skb->data);
+	bool src_is_aligned = !((u32)src & NPS_ENET_INT_MASK);
+
+	/* In case src is not aligned we need an intermediate buffer */
+	if (src_is_aligned)
+		for (i = 0; i < len; i++, src++)
+			nps_enet_reg_set(net_priv, NPS_ENET_REG_TX_BUF, *src);
+	else { /* !src_is_aligned */
+		for (i = 0; i < len; i++, src++) {
+			u32 buf;
+
+			/* to accommodate word-unaligned address of "src"
+			 * we have to do memcpy() instead of simple "="
+			 */
+			memcpy(&buf, src, sizeof(buf));
+			nps_enet_reg_set(net_priv, NPS_ENET_REG_TX_BUF, buf);
+		}
+	}
+	/* Write the length of the Frame */
+	tx_ctrl.nt = length;
+
+	/* Indicate SW is done */
+	net_priv->tx_packet_sent = true;
+	tx_ctrl.ct = NPS_ENET_ENABLE;
+
+	/* Send Frame */
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_TX_CTL, tx_ctrl.value);
+}
+
+/**
+ * nps_enet_set_mac_address - Set the MAC address for this device.
+ * @ndev:       Pointer to net_device structure.
+ * @p:          6 byte Address to be written as MAC address.
+ *
+ * This function copies the HW address from the sockaddr structure to the
+ * net_device structure and updates the address in HW.
+ *
+ * returns:     -EBUSY if the net device is busy or 0 if the address is set
+ *              successfully.
+ */
+static s32 nps_enet_set_mac_address(struct net_device *ndev, void *p)
+{
+	struct sockaddr *addr = p;
+	s32 res;
+
+	if (netif_running(ndev))
+		return -EBUSY;
+
+	res = eth_mac_addr(ndev, p);
+	if (!res) {
+		ether_addr_copy(ndev->dev_addr, addr->sa_data);
+		nps_enet_set_hw_mac_address(ndev);
+	}
+
+	return res;
+}
+
+/**
+ * nps_enet_open - Open the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * returns: 0, on success or non-zero error value on failure.
+ *
+ * This function enables an IRQs for the ENET device and starts the Tx queue.
+ */
+static s32 nps_enet_open(struct net_device *ndev)
+{
+	s32 err;
+	struct nps_enet_priv *net_priv = netdev_priv(ndev);
+
+	/* Reset private variables */
+	net_priv->tx_packet_sent = false;
+	net_priv->ge_mac_cfg_2.value = 0;
+	net_priv->ge_mac_cfg_3.value = 0;
+
+	/* ge_mac_cfg_3 default values */
+	net_priv->ge_mac_cfg_3.rx_ifg_th = NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH;
+	net_priv->ge_mac_cfg_3.max_len = NPS_ENET_GE_MAC_CFG_3_MAX_LEN;
+
+	/* Disable HW device */
+	nps_enet_hw_disable_control(ndev);
+
+	/* irq Rx allocation */
+	err = request_irq(net_priv->irq, nps_enet_irq_handler,
+			  0, "enet-rx-tx", ndev);
+	if (err)
+		return err;
+
+	/* Enable HW device */
+	nps_enet_hw_reset(ndev);
+	nps_enet_hw_enable_control(ndev);
+
+	netif_start_queue(ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_stop - Close the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function stops the Tx queue, disables interrupts for the ENET device.
+ */
+static s32 nps_enet_stop(struct net_device *ndev)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(ndev);
+
+	netif_stop_queue(ndev);
+
+	nps_enet_hw_disable_control(ndev);
+
+	free_irq(net_priv->irq, ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_start_xmit - Starts the data transmission.
+ * @skb:        sk_buff pointer that contains data to be Transmitted.
+ * @ndev:       Pointer to net_device structure.
+ *
+ * returns: NETDEV_TX_OK, on success
+ *              NETDEV_TX_BUSY, if any of the descriptors are not free.
+ *
+ * This function is invoked from upper layers to initiate transmission.
+ */
+static netdev_tx_t nps_enet_start_xmit(struct sk_buff *skb,
+				       struct net_device *ndev)
+{
+	/* This driver handles one frame at a time  */
+	netif_stop_queue(ndev);
+
+	nps_enet_send_frame(ndev, skb);
+
+	dev_kfree_skb(skb);
+
+	return NETDEV_TX_OK;
+}
+
+/**
+ * nps_enet_get_stats - Get system network statistics.
+ * @ndev:       Pointer to net_device structure.
+ *
+ * Returns the address of the device statistics structure.
+ * Statistics are updated in interrupt handler.
+ */
+static struct net_device_stats *nps_enet_get_stats(struct net_device *ndev)
+{
+	return &ndev->stats;
+}
+
+#ifdef CONFIG_NET_POLL_CONTROLLER
+static void nps_enet_poll_controller(struct net_device *ndev)
+{
+	disable_irq(ndev->irq);
+	nps_enet_board_irq_handler(ndev->irq, ndev);
+	enable_irq(ndev->irq);
+}
+#endif
+
+static const struct net_device_ops nps_netdev_ops = {
+	.ndo_open		= nps_enet_open,
+	.ndo_stop		= nps_enet_stop,
+	.ndo_start_xmit		= nps_enet_start_xmit,
+	.ndo_get_stats		= nps_enet_get_stats,
+	.ndo_set_mac_address	= nps_enet_set_mac_address,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+	.ndo_poll_controller	= nps_enet_poll_controller,
+#endif
+};
+
+static s32 nps_enet_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct net_device *netdev;
+	struct nps_enet_priv *net_priv;
+	s32 err = 0;
+	const char *mac_addr;
+	struct resource res_regs;
+
+	if (!dev->of_node)
+		return -ENODEV;
+
+	netdev = alloc_etherdev(sizeof(struct nps_enet_priv));
+	if (!netdev)
+		return -ENOMEM;
+
+	platform_set_drvdata(pdev, netdev);
+	SET_NETDEV_DEV(netdev, dev);
+	net_priv = netdev_priv(netdev);
+
+	/* Get ENET registers base address from device tree */
+	err = of_address_to_resource(dev->of_node, 0, &res_regs);
+	if (err) {
+		dev_err(dev, "failed to retrieve registers base from device tree\n");
+		err = -ENODEV;
+		goto out_netdev;
+	}
+
+	/* The EZ NET specific entries in the device structure. */
+	netdev->netdev_ops = &nps_netdev_ops;
+	netdev->watchdog_timeo = (400 * HZ / 1000);
+	netdev->flags &= ~IFF_MULTICAST;
+
+	net_priv->regs_base = devm_ioremap_resource(dev, &res_regs);
+	if (IS_ERR(net_priv->regs_base)) {
+		err = PTR_ERR(net_priv->regs_base);
+		goto out_netdev;
+	}
+	dev_dbg(dev, "Registers base address is 0x%p\n", net_priv->regs_base);
+
+	/* set kernel MAC address to dev */
+	mac_addr = of_get_mac_address(dev->of_node);
+	if (mac_addr)
+		ether_addr_copy(netdev->dev_addr, mac_addr);
+	else
+		eth_hw_addr_random(netdev);
+
+	/* Get IRQ number from device tree */
+	net_priv->irq = irq_of_parse_and_map(dev->of_node, 0);
+	if (!net_priv->irq) {
+		dev_err(dev, "failed to retrieve <irq Rx-Tx> value from device tree\n");
+		err = -ENODEV;
+		goto out_netdev;
+	}
+
+	/* Register the driver. Should be the last thing in probe */
+	err = register_netdev(netdev);
+	if (err) {
+		dev_err(dev, "Failed to register netdev for %s, err = 0x%08x\n",
+			netdev->name, (s32)err);
+		err = -ENODEV;
+		goto out_netdev;
+	}
+
+	dev_info(dev, "(rx/tx=%d)\n", net_priv->irq);
+
+out_netdev:
+	if (err)
+		free_netdev(netdev);
+
+	return 0;
+}
+
+static s32 nps_enet_remove(struct platform_device *pdev)
+{
+	struct net_device *netdev = platform_get_drvdata(pdev);
+
+	unregister_netdev(netdev);
+
+	free_netdev(netdev);
+
+	return 0;
+}
+
+static const struct of_device_id nps_enet_dt_ids[] = {
+	{ .compatible = "ezchip,nps-enet" },
+	{ /* Sentinel */ }
+};
+
+static struct platform_driver nps_enet_driver = {
+	.probe = nps_enet_probe,
+	.remove = nps_enet_remove,
+	.driver = {
+		.name = DRV_NAME,
+		.of_match_table  = nps_enet_dt_ids,
+	},
+};
+
+module_platform_driver(nps_enet_driver);
+
+MODULE_AUTHOR("EZchip Semiconductor");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/net/ethernet/ezchip/nps_enet.h b/drivers/net/ethernet/ezchip/nps_enet.h
new file mode 100644
index 0000000..07ce7ad
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.h
@@ -0,0 +1,311 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#ifndef _NPS_ENET_H
+#define _NPS_ENET_H
+
+/* default values */
+#define NPS_ENET_MAX_FRAME_LENGTH		0x3FFF
+#define NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR	0x7
+#define NPS_ENET_GE_MAC_CFG_0_RX_IFG		0x5
+#define NPS_ENET_GE_MAC_CFG_0_TX_IFG		0xC
+#define NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN		0x7
+#define NPS_ENET_GE_MAC_CFG_2_STAT_EN		0x3
+#define NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH		0x14
+#define NPS_ENET_GE_MAC_CFG_3_MAX_LEN		0x3FFC
+#define NPS_ENET_ENABLE				1
+#define NPS_ENET_DISABLE			0
+
+/* register definitions  */
+#define NPS_ENET_REG_TX_CTL		0x800
+#define NPS_ENET_REG_TX_BUF		0x808
+#define NPS_ENET_REG_RX_CTL		0x810
+#define NPS_ENET_REG_RX_BUF		0x818
+#define NPS_ENET_REG_BUF_INT_ENABLE	0x8C0
+#define NPS_ENET_REG_GE_MAC_CFG_0	0x1000
+#define NPS_ENET_REG_GE_MAC_CFG_1	0x1004
+#define NPS_ENET_REG_GE_MAC_CFG_2	0x1008
+#define NPS_ENET_REG_GE_MAC_CFG_3	0x100C
+#define NPS_ENET_REG_GE_RST		0x1400
+#define NPS_ENET_REG_PHASE_FIFO_CTL	0x1404
+
+/* Tx control register */
+struct nps_enet_tx_ctl {
+	union {
+		/* ct: SW sets to indicate frame ready in Tx buffer for
+		 *     transmission. HW resets to when transmission done
+		 * et: Transmit error
+		 * nt: Length in bytes of Tx frame loaded to Tx buffer
+		 */
+		struct {
+			u32
+			__reserved_1:16,
+			ct:1,
+			et:1,
+			__reserved_2:3,
+			nt:11;
+		};
+
+		u32 value;
+	};
+};
+
+/* Rx control register */
+struct nps_enet_rx_ctl {
+	union {
+		/* cr:  HW sets to indicate frame ready in Rx buffer.
+		 *      SW resets to indicate host read received frame
+		 *      and new frames can be written to Rx buffer
+		 * er:  Rx error indication
+		 * crc: Rx CRC error indication
+		 * nr:  Length in bytes of Rx frame loaded by MAC to Rx buffer
+		 */
+		struct {
+			u32
+			__reserved_1:16,
+			cr:1,
+			er:1,
+			crc:1,
+			__reserved_2:2,
+			nr:11;
+		};
+
+		u32 value;
+	};
+};
+
+/* Interrupt enable for data buffer events register */
+struct nps_enet_buf_int_enable {
+	union {
+		/* tx_done: Interrupt generation in the case when new frame
+		 *          is ready in Rx buffer
+		 * rx_rdy:  Interrupt generation in the case when current frame
+		 *          was read from TX buffer
+		 */
+		struct {
+			u32
+			__reserved:30,
+			tx_done:1,
+			rx_rdy:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 0 register */
+struct nps_enet_ge_mac_cfg_0 {
+	union {
+		/* tx_pr_len:          Transmit preamble length in bytes
+		 * tx_ifg_nib:         Tx idle pattern
+		 * nib_mode:           Nibble (4-bit) Mode
+		 * rx_pr_check_en:     Receive preamble Check Enable
+		 * tx_ifg:             Transmit inter-Frame Gap
+		 * rx_ifg:             Receive inter-Frame Gap
+		 * tx_fc_retr:         Transmit Flow Control Retransmit Mode
+		 * rx_length_check_en: Receive Length Check Enable
+		 * rx_crc_ignore:      Results of the CRC check are ignored
+		 * rx_crc_strip:       MAC strips the CRC from received frames
+		 * rx_fc_en:           Receive Flow Control Enable
+		 * tx_crc_en:          Transmit CRC Enabled
+		 * tx_pad_en:          Transmit Padding Enable
+		 * tx_cf_en:           Transmit Flow Control Enable
+		 * tx_en:              Transmit Enable
+		 * rx_en:              Receive Enable
+		 */
+		struct {
+			u32
+			tx_pr_len:4,
+			tx_ifg_nib:4,
+			nib_mode:1,
+			rx_pr_check_en:1,
+			tx_ifg:6,
+			rx_ifg:4,
+			tx_fc_retr:3,
+			rx_length_check_en:1,
+			rx_crc_ignore:1,
+			rx_crc_strip:1,
+			rx_fc_en:1,
+			tx_crc_en:1,
+			tx_pad_en:1,
+			tx_fc_en:1,
+			tx_en:1,
+			rx_en:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 1 register */
+struct nps_enet_ge_mac_cfg_1 {
+	union {
+		/* octet_3: MAC address octet 3
+		 * octet_2: MAC address octet 2
+		 * octet_1: MAC address octet 1
+		 * octet_0: MAC address octet 0
+		 */
+		struct {
+			u32
+			octet_3:8,
+			octet_2:8,
+			octet_1:8,
+			octet_0:8;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 2 register */
+struct nps_enet_ge_mac_cfg_2 {
+	union {
+		/* transmit_flush_en: MAC flush enable
+		 * stat_en:           RMON statistics interface enable
+		 * disc_da:           Discard frames with DA different
+		 *                    from MAC address
+		 * disc_bc:           Discard broadcast frames
+		 * disc_mc:           Discard multicast frames
+		 * octet_5:           MAC address octet 5
+		 * octet_4:           MAC address octet 4
+		 */
+		struct {
+			u32
+			transmit_flush_en:1,
+			__reserved_1:5,
+			stat_en:2,
+			__reserved_2:1,
+			disc_da:1,
+			disc_bc:1,
+			disc_mc:1,
+			__reserved_3:4,
+			octet_5:8,
+			octet_4:8;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 3 register */
+struct nps_enet_ge_mac_cfg_3 {
+	union {
+		/* ext_oob_cbfc_sel:  Selects one of the 4 profiles for
+		 *                    extended OOB in-flow-control indication
+		 * max_len:           Maximum receive frame length in bytes
+		 * tx_cbfc_en:        Enable transmission of class-based
+		 *                    flow control packets
+		 * rx_ifg_th:         Threshold for IFG status reporting via OOB
+		 * cf_timeout:        Configurable time to decrement FC counters
+		 * cf_drop:           Drop control frames
+		 * redirect_cbfc_sel: Selects one of CBFC redirect profiles
+		 * rx_cbfc_redir_en:  Enable Rx class-based flow
+		 *                    control redirect
+		 * rx_cbfc_en:        Enable Rx class-based flow control
+		 * tm_hd_mode:        TM header mode
+		 */
+		struct {
+			u32
+			ext_oob_cbfc_sel:2,
+			max_len:14,
+			tx_cbfc_en:1,
+			rx_ifg_th:5,
+			cf_timeout:4,
+			cf_drop:1,
+			redirect_cbfc_sel:2,
+			rx_cbfc_redir_en:1,
+			rx_cbfc_en:1,
+			tm_hd_mode:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* GE MAC, PCS reset control register */
+struct nps_enet_ge_rst {
+	union {
+		/* gmac_0: GE MAC reset
+		 * spcs_0: SGMII PCS reset
+		 */
+		struct {
+			u32
+			__reserved_1:23,
+			gmac_0:1,
+			__reserved_2:7,
+			spcs_0:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Tx phase sync FIFO control register */
+struct nps_enet_phase_fifo_ctl {
+	union {
+		/* init: initialize serdes TX phase sync FIFO pointers
+		 * rst:  reset serdes TX phase sync FIFO
+		 */
+		struct {
+			u32
+			__reserved:30,
+			init:1,
+			rst:1;
+		};
+
+		u32 value;
+	};
+};
+
+/**
+ * struct nps_enet_priv - Storage of ENET's private information.
+ * @regs:       Base address of ENET memory-mapped control registers.
+ * @irq:        For RX/TX IRQ number.
+ * @tx_packet_sent: SW indication if frame is being sent
+ */
+struct nps_enet_priv {
+	void __iomem *regs_base;
+	s32 irq;
+	bool tx_packet_sent;
+	struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 ge_mac_cfg_3;
+};
+
+/**
+ * nps_reg_set - Sets ENET register with provided value.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ * @value:      Value to set in register.
+ */
+static inline void nps_enet_reg_set(struct nps_enet_priv *priv,
+				    s32 reg, s32 value)
+{
+	iowrite32be(value, priv->regs_base + reg);
+}
+
+/**
+ * nps_reg_get - Gets value of specified ENET register.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ *
+ * returns:     Value of requested register.
+ */
+static inline u32 nps_enet_reg_get(struct nps_enet_priv *priv, s32 reg)
+{
+	return ioread32be(priv->regs_base + reg);
+}
+
+#endif /* _NPS_ENET_H */
-- 
1.7.1


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v3] NET: Add ezchip ethernet driver
  2015-06-11  8:33 ` [PATCH v2] " Noam Camus
@ 2015-06-11 17:41   ` Noam Camus
  2015-06-14  6:26     ` [PATCH v4] " Noam Camus
  2015-06-11 22:43   ` [PATCH v2] " David Miller
  1 sibling, 1 reply; 28+ messages in thread
From: Noam Camus @ 2015-06-11 17:41 UTC (permalink / raw)
  To: netdev, linux-kernel
  Cc: Alexey.Brodkin, vgupta, giladb, cmetcalf, Tal Zilcer, Noam Camus

From: Tal Zilcer <talz@ezchip.com>

Simple LAN device without multicast support.
Device performance is not high and may be used for
debug or management purposes.
Device supports interrupts for RX and TX end.
Device does not support NAPI and also does not support DMA.
It is used in EZchip NPS devices.

Signed-off-by: Noam Camus <noamc@ezchip.com>
Signed-off-by: Tal Zilcer <talz@ezchip.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
---
Chahges in patch v2,v3:
1) Did some renaming:
	a) EZCHIP_NPS_LAN to EZCHIP_NPS_MANAGEMENT_ENET
	b) nps_enet to nps_mgt_enet
2) Update GPL to version 2
3) Remove driver default configuration (y)
4) Change integer type to u32/s32 to more clear
5) More comments e.g. reset function
6) Add signed-off-by of driver author
---
 .../devicetree/bindings/net/ezchip_enet.txt        |   15 +
 drivers/net/ethernet/Kconfig                       |    1 +
 drivers/net/ethernet/Makefile                      |    1 +
 drivers/net/ethernet/ezchip/Kconfig                |   29 +
 drivers/net/ethernet/ezchip/Makefile               |    1 +
 drivers/net/ethernet/ezchip/nps_enet.c             |  597 ++++++++++++++++++++
 drivers/net/ethernet/ezchip/nps_enet.h             |  311 ++++++++++
 7 files changed, 955 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/ezchip_enet.txt
 create mode 100644 drivers/net/ethernet/ezchip/Kconfig
 create mode 100644 drivers/net/ethernet/ezchip/Makefile
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.c
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.h

diff --git a/Documentation/devicetree/bindings/net/ezchip_enet.txt b/Documentation/devicetree/bindings/net/ezchip_enet.txt
new file mode 100644
index 0000000..4e29b2b
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ezchip_enet.txt
@@ -0,0 +1,15 @@
+* EZchip NPS Management Ethernet port driver
+
+Required properties:
+- compatible: Should be "ezchip,nps-mgt-enet"
+- reg: Address and length of the register set for the device
+- interrupts: Should contain the ENET interrupt
+
+Examples:
+
+	ethernet@f0003000 {
+		compatible = "ezchip,nps-mgt-enet";
+		reg = <0xf0003000 0x44>;
+		interrupts = <7>;
+		mac-address = [ 00 11 22 33 44 55 ];
+	};
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index eadcb05..1a6b1ba 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -66,6 +66,7 @@ config DNET
 source "drivers/net/ethernet/dec/Kconfig"
 source "drivers/net/ethernet/dlink/Kconfig"
 source "drivers/net/ethernet/emulex/Kconfig"
+source "drivers/net/ethernet/ezchip/Kconfig"
 source "drivers/net/ethernet/neterion/Kconfig"
 source "drivers/net/ethernet/faraday/Kconfig"
 source "drivers/net/ethernet/freescale/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 1367afc..489f9cc 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_DNET) += dnet.o
 obj-$(CONFIG_NET_VENDOR_DEC) += dec/
 obj-$(CONFIG_NET_VENDOR_DLINK) += dlink/
 obj-$(CONFIG_NET_VENDOR_EMULEX) += emulex/
+obj-$(CONFIG_NET_VENDOR_EZCHIP) += ezchip/
 obj-$(CONFIG_NET_VENDOR_EXAR) += neterion/
 obj-$(CONFIG_NET_VENDOR_FARADAY) += faraday/
 obj-$(CONFIG_NET_VENDOR_FREESCALE) += freescale/
diff --git a/drivers/net/ethernet/ezchip/Kconfig b/drivers/net/ethernet/ezchip/Kconfig
new file mode 100644
index 0000000..23883b4
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Kconfig
@@ -0,0 +1,29 @@
+#
+# EZchip network device configuration
+#
+
+config NET_VENDOR_EZCHIP
+	bool "EZchip devices"
+	default y
+	---help---
+	  If you have a network (Ethernet) device belonging to this class, say Y
+	  and read the Ethernet-HOWTO, available from
+	  <http://www.tldp.org/docs.html#howto>.
+
+	  Note that the answer to this question doesn't directly affect the
+	  kernel: saying N will just cause the configurator to skip all
+	  the questions about EZchip devices. If you say Y, you will be asked for
+	  your specific device in the following questions.
+
+if NET_VENDOR_EZCHIP
+
+config EZCHIP_NPS_MANAGEMENT_ENET
+	tristate "EZchip NPS management enet support"
+	---help---
+	  Simple LAN device without multicast support.
+	  Device performance is not high and may be used for
+	  debug or management purposes.
+	  Device supports interrupts for RX and TX(end).
+	  Device does not support NAPI and also does not support DMA.
+
+endif
diff --git a/drivers/net/ethernet/ezchip/Makefile b/drivers/net/ethernet/ezchip/Makefile
new file mode 100644
index 0000000..e490176
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_EZCHIP_NPS_MANAGEMENT_ENET) += nps_enet.o
diff --git a/drivers/net/ethernet/ezchip/nps_enet.c b/drivers/net/ethernet/ezchip/nps_enet.c
new file mode 100644
index 0000000..4b23ed9
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.c
@@ -0,0 +1,597 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#include <linux/module.h>
+#include <linux/etherdevice.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_net.h>
+#include <linux/of_platform.h>
+#include "nps_enet.h"
+
+#define DRV_NAME			"nps_mgt_enet"
+
+#define NPS_ENET_INT_MASK		(sizeof(u32) - 1)
+#define NPS_ENET_INT_OFFSET		2
+#define NPS_ENET_WORDS_NUM(length)	((length + NPS_ENET_INT_MASK) >> 2)
+
+static void nps_enet_clean_rx_fifo(struct net_device *netdev, s32 frame_len)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	s32 i, len = NPS_ENET_WORDS_NUM(frame_len);
+
+	/* Empty Rx FIFO buffer by reading all words */
+	for (i = 0; i < len; i++)
+		nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_BUF);
+}
+
+static void nps_enet_read_rx_fifo(struct net_device *netdev,
+				  unsigned char *dst, s32 length)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	s32 i, len = length >> NPS_ENET_INT_OFFSET;
+	s32 last = length & NPS_ENET_INT_MASK;
+	u32 *reg = (u32 *)dst;
+	bool dst_is_aligned = !((u32)dst & NPS_ENET_INT_MASK);
+
+	/* In case dst is not aligned we need an intermediate buffer */
+	if (dst_is_aligned)
+		for (i = 0; i < len; i++, reg++)
+			*reg = nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_BUF);
+	else { /* !dst_is_aligned */
+		for (i = 0; i < len; i++, reg++) {
+			u32 buf =
+				nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_BUF);
+
+			/* to accommodate word-unaligned address of "reg"
+			 * we have to do memcpy() instead of simple "="
+			 */
+			memcpy(reg, &buf, sizeof(buf));
+		}
+	}
+
+	/* copy last bytes (if any) */
+	if (last) {
+		u32 buf = nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_BUF);
+
+		memcpy(reg, &buf, last);
+	}
+}
+
+static void nps_enet_rx_irq_handler(struct net_device *netdev,
+				    struct nps_enet_rx_ctl rx_ctrl)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct sk_buff *skb;
+	s32 frame_len = rx_ctrl.nr, err = 0 ;
+
+	/* Check Rx error */
+	if (rx_ctrl.er) {
+		netdev->stats.rx_errors++;
+		err = 1;
+	}
+
+	/* Check Rx CRC error */
+	if (rx_ctrl.crc) {
+		netdev->stats.rx_crc_errors++;
+		netdev->stats.rx_dropped++;
+		err = 1;
+	}
+
+	/* Check Frame length Min 64b */
+	if (unlikely(frame_len < ETH_ZLEN)) {
+		netdev->stats.rx_length_errors++;
+		netdev->stats.rx_dropped++;
+		err = 1;
+	}
+
+	if (err)
+		goto rx_irq_clean;
+
+	/* Skb allocation */
+	skb = netdev_alloc_skb_ip_align(netdev, frame_len);
+	if (unlikely(!skb)) {
+		netdev->stats.rx_errors++;
+		netdev->stats.rx_dropped++;
+		goto rx_irq_clean;
+	}
+
+	/* Copy frame from Rx fifo into the skb */
+	nps_enet_read_rx_fifo(netdev, skb->data, frame_len);
+
+	skb_put(skb, frame_len);
+	skb->dev = netdev;
+	skb->protocol = eth_type_trans(skb, netdev);
+	skb->ip_summed = CHECKSUM_UNNECESSARY;
+
+	netdev->stats.rx_packets++;
+	netdev->stats.rx_bytes += frame_len;
+
+	netif_rx(skb);
+	goto rx_irq_frame_done;
+
+rx_irq_clean:
+	/* Clean Rx fifo */
+	nps_enet_clean_rx_fifo(netdev, frame_len);
+
+rx_irq_frame_done:
+	/* Ack Rx ctrl register */
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_RX_CTL, 0);
+}
+
+static void nps_enet_tx_irq_handler(struct net_device *netdev,
+				    struct nps_enet_tx_ctl tx_ctrl)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+
+	/* Check Tx transmit error */
+	if (unlikely(tx_ctrl.et)) {
+		netdev->stats.tx_errors++;
+	} else {
+		netdev->stats.tx_packets++;
+		netdev->stats.tx_bytes += tx_ctrl.nt;
+	}
+
+	/* Ack Tx ctrl register */
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_TX_CTL, 0);
+
+	/* In nps_enet_start_xmit we disabled sending frames*/
+	netif_wake_queue(netdev);
+}
+
+/**
+ * nps_enet_irq_handler - Global interrupt handler for ENET.
+ * @irq:                irq number.
+ * @dev_instance:       device instance.
+ *
+ * returns: IRQ_HANDLED for all cases.
+ *
+ * EZchip ENET has 2 interrupt causes, and depending on bits raised in
+ * CTRL register we may tell what is a reason for interrupt to fire.
+ * We got one for RX and the other for TX (end).
+ */
+static irqreturn_t nps_enet_irq_handler(s32 irq, void *dev_instance)
+{
+	struct net_device *netdev = dev_instance;
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct nps_enet_rx_ctl rx_ctrl;
+	struct nps_enet_tx_ctl tx_ctrl;
+
+	/* Check for Rx ready */
+	rx_ctrl.value = nps_enet_reg_get(net_priv, NPS_ENET_REG_RX_CTL);
+	if (rx_ctrl.cr)
+		nps_enet_rx_irq_handler(netdev, rx_ctrl);
+
+	/* Check for Tx done */
+	tx_ctrl.value = nps_enet_reg_get(net_priv, NPS_ENET_REG_TX_CTL);
+	if (net_priv->tx_packet_sent && !tx_ctrl.ct) {
+		nps_enet_tx_irq_handler(netdev, tx_ctrl);
+		net_priv->tx_packet_sent = false;
+	}
+
+	return IRQ_HANDLED;
+}
+
+static void nps_enet_set_hw_mac_address(struct net_device *netdev)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct nps_enet_ge_mac_cfg_1 ge_mac_cfg_1;
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &net_priv->ge_mac_cfg_2;
+
+	/* set MAC address in HW */
+	ge_mac_cfg_1.octet_0 = netdev->dev_addr[0];
+	ge_mac_cfg_1.octet_1 = netdev->dev_addr[1];
+	ge_mac_cfg_1.octet_2 = netdev->dev_addr[2];
+	ge_mac_cfg_1.octet_3 = netdev->dev_addr[3];
+	ge_mac_cfg_2->octet_4 = netdev->dev_addr[4];
+	ge_mac_cfg_2->octet_5 = netdev->dev_addr[5];
+
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_1,
+			 ge_mac_cfg_1.value);
+
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+}
+
+/**
+ * nps_enet_hw_reset - Reset the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function reset the PCS and TX fifo.
+ * The programming model is to set the relevant reset bits
+ * wait for some time for this to propagate and then unset
+ * the reset bits. This way we ensure that reset procedure
+ * is done successfully by device.
+ */
+static void nps_enet_hw_reset(struct net_device *ndev)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(ndev);
+	struct nps_enet_ge_rst ge_rst = {.value = 0};
+	struct nps_enet_phase_fifo_ctl phase_fifo_ctl = {.value = 0};
+
+	/* Pcs reset sequence*/
+	ge_rst.gmac_0 = NPS_ENET_ENABLE;
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+	usleep_range(10, 20);
+	ge_rst.value = 0;
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+
+	/* Tx fifo reset sequence */
+	phase_fifo_ctl.rst = NPS_ENET_ENABLE;
+	phase_fifo_ctl.init = NPS_ENET_ENABLE;
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+	usleep_range(10, 20);
+	phase_fifo_ctl.value = 0;
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+}
+
+static void nps_enet_hw_enable_control(struct net_device *netdev)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct nps_enet_ge_mac_cfg_0 ge_mac_cfg_0 = { .value = 0 };
+	struct nps_enet_buf_int_enable buf_int_enable = { .value = 0 };
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &net_priv->ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 *ge_mac_cfg_3 = &net_priv->ge_mac_cfg_3;
+	s32 max_frame_length;
+
+	/* Enable Rx and Tx statistics */
+	ge_mac_cfg_2->stat_en = NPS_ENET_GE_MAC_CFG_2_STAT_EN;
+
+	/* Discard packets with different MAC address */
+	ge_mac_cfg_2->disc_da = NPS_ENET_ENABLE;
+
+	/* Discard multicast packets */
+	ge_mac_cfg_2->disc_mc = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+
+	/* Discard Packets bigger than max frame length */
+	max_frame_length = ETH_HLEN + netdev->mtu + ETH_FCS_LEN;
+	if (max_frame_length <= NPS_ENET_MAX_FRAME_LENGTH) {
+		ge_mac_cfg_3->max_len = max_frame_length;
+		nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_3,
+				 ge_mac_cfg_3->value);
+	}
+
+	/* Enable interrupts */
+	buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
+	buf_int_enable.tx_done = NPS_ENET_ENABLE;
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_BUF_INT_ENABLE,
+			 buf_int_enable.value);
+
+	/* Write device MAC address to HW */
+	nps_enet_set_hw_mac_address(netdev);
+
+	/* Rx and Tx HW features */
+	ge_mac_cfg_0.tx_pad_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_crc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_crc_strip = NPS_ENET_ENABLE;
+
+	/* IFG configuration */
+	ge_mac_cfg_0.rx_ifg = NPS_ENET_GE_MAC_CFG_0_RX_IFG;
+	ge_mac_cfg_0.tx_ifg = NPS_ENET_GE_MAC_CFG_0_TX_IFG;
+
+	/* preamble configuration */
+	ge_mac_cfg_0.rx_pr_check_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_pr_len = NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN;
+
+	/* enable flow control frames */
+	ge_mac_cfg_0.tx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_fc_retr = NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR;
+
+	/* Enable Rx and Tx */
+	ge_mac_cfg_0.rx_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_en = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_0,
+			 ge_mac_cfg_0.value);
+}
+
+static void nps_enet_hw_disable_control(struct net_device *netdev)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+
+	/* Disable interrupts */
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
+
+	/* Disable Rx and Tx */
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_GE_MAC_CFG_0, 0);
+}
+
+static void nps_enet_send_frame(struct net_device *netdev,
+				struct sk_buff *skb)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(netdev);
+	struct nps_enet_tx_ctl tx_ctrl = { .value = 0 };
+	short length = skb->len;
+	s32 i, len = NPS_ENET_WORDS_NUM(length);
+	u32 *src = (u32 *)virt_to_phys(skb->data);
+	bool src_is_aligned = !((u32)src & NPS_ENET_INT_MASK);
+
+	/* In case src is not aligned we need an intermediate buffer */
+	if (src_is_aligned)
+		for (i = 0; i < len; i++, src++)
+			nps_enet_reg_set(net_priv, NPS_ENET_REG_TX_BUF, *src);
+	else { /* !src_is_aligned */
+		for (i = 0; i < len; i++, src++) {
+			u32 buf;
+
+			/* to accommodate word-unaligned address of "src"
+			 * we have to do memcpy() instead of simple "="
+			 */
+			memcpy(&buf, src, sizeof(buf));
+			nps_enet_reg_set(net_priv, NPS_ENET_REG_TX_BUF, buf);
+		}
+	}
+	/* Write the length of the Frame */
+	tx_ctrl.nt = length;
+
+	/* Indicate SW is done */
+	net_priv->tx_packet_sent = true;
+	tx_ctrl.ct = NPS_ENET_ENABLE;
+
+	/* Send Frame */
+	nps_enet_reg_set(net_priv, NPS_ENET_REG_TX_CTL, tx_ctrl.value);
+}
+
+/**
+ * nps_enet_set_mac_address - Set the MAC address for this device.
+ * @ndev:       Pointer to net_device structure.
+ * @p:          6 byte Address to be written as MAC address.
+ *
+ * This function copies the HW address from the sockaddr structure to the
+ * net_device structure and updates the address in HW.
+ *
+ * returns:     -EBUSY if the net device is busy or 0 if the address is set
+ *              successfully.
+ */
+static s32 nps_enet_set_mac_address(struct net_device *ndev, void *p)
+{
+	struct sockaddr *addr = p;
+	s32 res;
+
+	if (netif_running(ndev))
+		return -EBUSY;
+
+	res = eth_mac_addr(ndev, p);
+	if (!res) {
+		ether_addr_copy(ndev->dev_addr, addr->sa_data);
+		nps_enet_set_hw_mac_address(ndev);
+	}
+
+	return res;
+}
+
+/**
+ * nps_enet_open - Open the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * returns: 0, on success or non-zero error value on failure.
+ *
+ * This function enables an IRQs for the ENET device and starts the Tx queue.
+ */
+static s32 nps_enet_open(struct net_device *ndev)
+{
+	s32 err;
+	struct nps_enet_priv *net_priv = netdev_priv(ndev);
+
+	/* Reset private variables */
+	net_priv->tx_packet_sent = false;
+	net_priv->ge_mac_cfg_2.value = 0;
+	net_priv->ge_mac_cfg_3.value = 0;
+
+	/* ge_mac_cfg_3 default values */
+	net_priv->ge_mac_cfg_3.rx_ifg_th = NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH;
+	net_priv->ge_mac_cfg_3.max_len = NPS_ENET_GE_MAC_CFG_3_MAX_LEN;
+
+	/* Disable HW device */
+	nps_enet_hw_disable_control(ndev);
+
+	/* irq Rx allocation */
+	err = request_irq(net_priv->irq, nps_enet_irq_handler,
+			  0, "enet-rx-tx", ndev);
+	if (err)
+		return err;
+
+	/* Enable HW device */
+	nps_enet_hw_reset(ndev);
+	nps_enet_hw_enable_control(ndev);
+
+	netif_start_queue(ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_stop - Close the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function stops the Tx queue, disables interrupts for the ENET device.
+ */
+static s32 nps_enet_stop(struct net_device *ndev)
+{
+	struct nps_enet_priv *net_priv = netdev_priv(ndev);
+
+	netif_stop_queue(ndev);
+
+	nps_enet_hw_disable_control(ndev);
+
+	free_irq(net_priv->irq, ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_start_xmit - Starts the data transmission.
+ * @skb:        sk_buff pointer that contains data to be Transmitted.
+ * @ndev:       Pointer to net_device structure.
+ *
+ * returns: NETDEV_TX_OK, on success
+ *              NETDEV_TX_BUSY, if any of the descriptors are not free.
+ *
+ * This function is invoked from upper layers to initiate transmission.
+ */
+static netdev_tx_t nps_enet_start_xmit(struct sk_buff *skb,
+				       struct net_device *ndev)
+{
+	/* This driver handles one frame at a time  */
+	netif_stop_queue(ndev);
+
+	nps_enet_send_frame(ndev, skb);
+
+	dev_kfree_skb(skb);
+
+	return NETDEV_TX_OK;
+}
+
+/**
+ * nps_enet_get_stats - Get system network statistics.
+ * @ndev:       Pointer to net_device structure.
+ *
+ * Returns the address of the device statistics structure.
+ * Statistics are updated in interrupt handler.
+ */
+static struct net_device_stats *nps_enet_get_stats(struct net_device *ndev)
+{
+	return &ndev->stats;
+}
+
+#ifdef CONFIG_NET_POLL_CONTROLLER
+static void nps_enet_poll_controller(struct net_device *ndev)
+{
+	disable_irq(ndev->irq);
+	nps_enet_board_irq_handler(ndev->irq, ndev);
+	enable_irq(ndev->irq);
+}
+#endif
+
+static const struct net_device_ops nps_netdev_ops = {
+	.ndo_open		= nps_enet_open,
+	.ndo_stop		= nps_enet_stop,
+	.ndo_start_xmit		= nps_enet_start_xmit,
+	.ndo_get_stats		= nps_enet_get_stats,
+	.ndo_set_mac_address	= nps_enet_set_mac_address,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+	.ndo_poll_controller	= nps_enet_poll_controller,
+#endif
+};
+
+static s32 nps_enet_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct net_device *netdev;
+	struct nps_enet_priv *net_priv;
+	s32 err = 0;
+	const char *mac_addr;
+	struct resource res_regs;
+
+	if (!dev->of_node)
+		return -ENODEV;
+
+	netdev = alloc_etherdev(sizeof(struct nps_enet_priv));
+	if (!netdev)
+		return -ENOMEM;
+
+	platform_set_drvdata(pdev, netdev);
+	SET_NETDEV_DEV(netdev, dev);
+	net_priv = netdev_priv(netdev);
+
+	/* Get ENET registers base address from device tree */
+	err = of_address_to_resource(dev->of_node, 0, &res_regs);
+	if (err) {
+		dev_err(dev, "failed to retrieve registers base from device tree\n");
+		err = -ENODEV;
+		goto out_netdev;
+	}
+
+	/* The EZ NET specific entries in the device structure. */
+	netdev->netdev_ops = &nps_netdev_ops;
+	netdev->watchdog_timeo = (400 * HZ / 1000);
+	netdev->flags &= ~IFF_MULTICAST;
+
+	net_priv->regs_base = devm_ioremap_resource(dev, &res_regs);
+	if (IS_ERR(net_priv->regs_base)) {
+		err = PTR_ERR(net_priv->regs_base);
+		goto out_netdev;
+	}
+	dev_dbg(dev, "Registers base address is 0x%p\n", net_priv->regs_base);
+
+	/* set kernel MAC address to dev */
+	mac_addr = of_get_mac_address(dev->of_node);
+	if (mac_addr)
+		ether_addr_copy(netdev->dev_addr, mac_addr);
+	else
+		eth_hw_addr_random(netdev);
+
+	/* Get IRQ number from device tree */
+	net_priv->irq = irq_of_parse_and_map(dev->of_node, 0);
+	if (!net_priv->irq) {
+		dev_err(dev, "failed to retrieve <irq Rx-Tx> value from device tree\n");
+		err = -ENODEV;
+		goto out_netdev;
+	}
+
+	/* Register the driver. Should be the last thing in probe */
+	err = register_netdev(netdev);
+	if (err) {
+		dev_err(dev, "Failed to register netdev for %s, err = 0x%08x\n",
+			netdev->name, (s32)err);
+		err = -ENODEV;
+		goto out_netdev;
+	}
+
+	dev_info(dev, "(rx/tx=%d)\n", net_priv->irq);
+
+out_netdev:
+	if (err)
+		free_netdev(netdev);
+
+	return 0;
+}
+
+static s32 nps_enet_remove(struct platform_device *pdev)
+{
+	struct net_device *netdev = platform_get_drvdata(pdev);
+
+	unregister_netdev(netdev);
+
+	free_netdev(netdev);
+
+	return 0;
+}
+
+static const struct of_device_id nps_enet_dt_ids[] = {
+	{ .compatible = "ezchip,nps-mgt-enet" },
+	{ /* Sentinel */ }
+};
+
+static struct platform_driver nps_enet_driver = {
+	.probe = nps_enet_probe,
+	.remove = nps_enet_remove,
+	.driver = {
+		.name = DRV_NAME,
+		.of_match_table  = nps_enet_dt_ids,
+	},
+};
+
+module_platform_driver(nps_enet_driver);
+
+MODULE_AUTHOR("EZchip Semiconductor");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/net/ethernet/ezchip/nps_enet.h b/drivers/net/ethernet/ezchip/nps_enet.h
new file mode 100644
index 0000000..07ce7ad
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.h
@@ -0,0 +1,311 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#ifndef _NPS_ENET_H
+#define _NPS_ENET_H
+
+/* default values */
+#define NPS_ENET_MAX_FRAME_LENGTH		0x3FFF
+#define NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR	0x7
+#define NPS_ENET_GE_MAC_CFG_0_RX_IFG		0x5
+#define NPS_ENET_GE_MAC_CFG_0_TX_IFG		0xC
+#define NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN		0x7
+#define NPS_ENET_GE_MAC_CFG_2_STAT_EN		0x3
+#define NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH		0x14
+#define NPS_ENET_GE_MAC_CFG_3_MAX_LEN		0x3FFC
+#define NPS_ENET_ENABLE				1
+#define NPS_ENET_DISABLE			0
+
+/* register definitions  */
+#define NPS_ENET_REG_TX_CTL		0x800
+#define NPS_ENET_REG_TX_BUF		0x808
+#define NPS_ENET_REG_RX_CTL		0x810
+#define NPS_ENET_REG_RX_BUF		0x818
+#define NPS_ENET_REG_BUF_INT_ENABLE	0x8C0
+#define NPS_ENET_REG_GE_MAC_CFG_0	0x1000
+#define NPS_ENET_REG_GE_MAC_CFG_1	0x1004
+#define NPS_ENET_REG_GE_MAC_CFG_2	0x1008
+#define NPS_ENET_REG_GE_MAC_CFG_3	0x100C
+#define NPS_ENET_REG_GE_RST		0x1400
+#define NPS_ENET_REG_PHASE_FIFO_CTL	0x1404
+
+/* Tx control register */
+struct nps_enet_tx_ctl {
+	union {
+		/* ct: SW sets to indicate frame ready in Tx buffer for
+		 *     transmission. HW resets to when transmission done
+		 * et: Transmit error
+		 * nt: Length in bytes of Tx frame loaded to Tx buffer
+		 */
+		struct {
+			u32
+			__reserved_1:16,
+			ct:1,
+			et:1,
+			__reserved_2:3,
+			nt:11;
+		};
+
+		u32 value;
+	};
+};
+
+/* Rx control register */
+struct nps_enet_rx_ctl {
+	union {
+		/* cr:  HW sets to indicate frame ready in Rx buffer.
+		 *      SW resets to indicate host read received frame
+		 *      and new frames can be written to Rx buffer
+		 * er:  Rx error indication
+		 * crc: Rx CRC error indication
+		 * nr:  Length in bytes of Rx frame loaded by MAC to Rx buffer
+		 */
+		struct {
+			u32
+			__reserved_1:16,
+			cr:1,
+			er:1,
+			crc:1,
+			__reserved_2:2,
+			nr:11;
+		};
+
+		u32 value;
+	};
+};
+
+/* Interrupt enable for data buffer events register */
+struct nps_enet_buf_int_enable {
+	union {
+		/* tx_done: Interrupt generation in the case when new frame
+		 *          is ready in Rx buffer
+		 * rx_rdy:  Interrupt generation in the case when current frame
+		 *          was read from TX buffer
+		 */
+		struct {
+			u32
+			__reserved:30,
+			tx_done:1,
+			rx_rdy:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 0 register */
+struct nps_enet_ge_mac_cfg_0 {
+	union {
+		/* tx_pr_len:          Transmit preamble length in bytes
+		 * tx_ifg_nib:         Tx idle pattern
+		 * nib_mode:           Nibble (4-bit) Mode
+		 * rx_pr_check_en:     Receive preamble Check Enable
+		 * tx_ifg:             Transmit inter-Frame Gap
+		 * rx_ifg:             Receive inter-Frame Gap
+		 * tx_fc_retr:         Transmit Flow Control Retransmit Mode
+		 * rx_length_check_en: Receive Length Check Enable
+		 * rx_crc_ignore:      Results of the CRC check are ignored
+		 * rx_crc_strip:       MAC strips the CRC from received frames
+		 * rx_fc_en:           Receive Flow Control Enable
+		 * tx_crc_en:          Transmit CRC Enabled
+		 * tx_pad_en:          Transmit Padding Enable
+		 * tx_cf_en:           Transmit Flow Control Enable
+		 * tx_en:              Transmit Enable
+		 * rx_en:              Receive Enable
+		 */
+		struct {
+			u32
+			tx_pr_len:4,
+			tx_ifg_nib:4,
+			nib_mode:1,
+			rx_pr_check_en:1,
+			tx_ifg:6,
+			rx_ifg:4,
+			tx_fc_retr:3,
+			rx_length_check_en:1,
+			rx_crc_ignore:1,
+			rx_crc_strip:1,
+			rx_fc_en:1,
+			tx_crc_en:1,
+			tx_pad_en:1,
+			tx_fc_en:1,
+			tx_en:1,
+			rx_en:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 1 register */
+struct nps_enet_ge_mac_cfg_1 {
+	union {
+		/* octet_3: MAC address octet 3
+		 * octet_2: MAC address octet 2
+		 * octet_1: MAC address octet 1
+		 * octet_0: MAC address octet 0
+		 */
+		struct {
+			u32
+			octet_3:8,
+			octet_2:8,
+			octet_1:8,
+			octet_0:8;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 2 register */
+struct nps_enet_ge_mac_cfg_2 {
+	union {
+		/* transmit_flush_en: MAC flush enable
+		 * stat_en:           RMON statistics interface enable
+		 * disc_da:           Discard frames with DA different
+		 *                    from MAC address
+		 * disc_bc:           Discard broadcast frames
+		 * disc_mc:           Discard multicast frames
+		 * octet_5:           MAC address octet 5
+		 * octet_4:           MAC address octet 4
+		 */
+		struct {
+			u32
+			transmit_flush_en:1,
+			__reserved_1:5,
+			stat_en:2,
+			__reserved_2:1,
+			disc_da:1,
+			disc_bc:1,
+			disc_mc:1,
+			__reserved_3:4,
+			octet_5:8,
+			octet_4:8;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 3 register */
+struct nps_enet_ge_mac_cfg_3 {
+	union {
+		/* ext_oob_cbfc_sel:  Selects one of the 4 profiles for
+		 *                    extended OOB in-flow-control indication
+		 * max_len:           Maximum receive frame length in bytes
+		 * tx_cbfc_en:        Enable transmission of class-based
+		 *                    flow control packets
+		 * rx_ifg_th:         Threshold for IFG status reporting via OOB
+		 * cf_timeout:        Configurable time to decrement FC counters
+		 * cf_drop:           Drop control frames
+		 * redirect_cbfc_sel: Selects one of CBFC redirect profiles
+		 * rx_cbfc_redir_en:  Enable Rx class-based flow
+		 *                    control redirect
+		 * rx_cbfc_en:        Enable Rx class-based flow control
+		 * tm_hd_mode:        TM header mode
+		 */
+		struct {
+			u32
+			ext_oob_cbfc_sel:2,
+			max_len:14,
+			tx_cbfc_en:1,
+			rx_ifg_th:5,
+			cf_timeout:4,
+			cf_drop:1,
+			redirect_cbfc_sel:2,
+			rx_cbfc_redir_en:1,
+			rx_cbfc_en:1,
+			tm_hd_mode:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* GE MAC, PCS reset control register */
+struct nps_enet_ge_rst {
+	union {
+		/* gmac_0: GE MAC reset
+		 * spcs_0: SGMII PCS reset
+		 */
+		struct {
+			u32
+			__reserved_1:23,
+			gmac_0:1,
+			__reserved_2:7,
+			spcs_0:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Tx phase sync FIFO control register */
+struct nps_enet_phase_fifo_ctl {
+	union {
+		/* init: initialize serdes TX phase sync FIFO pointers
+		 * rst:  reset serdes TX phase sync FIFO
+		 */
+		struct {
+			u32
+			__reserved:30,
+			init:1,
+			rst:1;
+		};
+
+		u32 value;
+	};
+};
+
+/**
+ * struct nps_enet_priv - Storage of ENET's private information.
+ * @regs:       Base address of ENET memory-mapped control registers.
+ * @irq:        For RX/TX IRQ number.
+ * @tx_packet_sent: SW indication if frame is being sent
+ */
+struct nps_enet_priv {
+	void __iomem *regs_base;
+	s32 irq;
+	bool tx_packet_sent;
+	struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 ge_mac_cfg_3;
+};
+
+/**
+ * nps_reg_set - Sets ENET register with provided value.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ * @value:      Value to set in register.
+ */
+static inline void nps_enet_reg_set(struct nps_enet_priv *priv,
+				    s32 reg, s32 value)
+{
+	iowrite32be(value, priv->regs_base + reg);
+}
+
+/**
+ * nps_reg_get - Gets value of specified ENET register.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ *
+ * returns:     Value of requested register.
+ */
+static inline u32 nps_enet_reg_get(struct nps_enet_priv *priv, s32 reg)
+{
+	return ioread32be(priv->regs_base + reg);
+}
+
+#endif /* _NPS_ENET_H */
-- 
1.7.1


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* Re: [PATCH v2] NET: Add ezchip ethernet driver
  2015-06-11  8:33 ` [PATCH v2] " Noam Camus
  2015-06-11 17:41   ` [PATCH v3] " Noam Camus
@ 2015-06-11 22:43   ` David Miller
  1 sibling, 0 replies; 28+ messages in thread
From: David Miller @ 2015-06-11 22:43 UTC (permalink / raw)
  To: noamc
  Cc: netdev, linux-kernel, Alexey.Brodkin, vgupta, giladb, cmetcalf, talz

From: Noam Camus <noamc@ezchip.com>
Date: Thu, 11 Jun 2015 11:33:49 +0300

> +#define NPS_ENET_INT_MASK		(sizeof(u32) - 1)
> +#define NPS_ENET_INT_OFFSET		2
> +#define NPS_ENET_WORDS_NUM(length)	((length + NPS_ENET_INT_MASK) >> 2)

This is a bit obfuscating in my opinion.

First of all "NPS_ENET_INT_OFFSET" is not an "offset", which you would
add or subtract from a value, but rather it is a "shift".  All of
the uses would look clearer as "X / sizeof(u32)" rather than the
"X >> NPS_ENET_INET_OFFSET".

Same for NPS_ENET_WORDS_NUM(), this is simply "DIV_ROUND_UP(x, sizeof_u32))"
which is much more easy to understand.

And I would just say "sizeof(u32) - 1" outright for the mask as well.

So basically what I'm saying is that these macros make the code harder
to read and understand rather than making it easier.

> +
> +			/* to accommodate word-unaligned address of "reg"
> +			 * we have to do memcpy() instead of simple "="
> +			 */
> +			memcpy(reg, &buf, sizeof(buf));

This is not guaranteed to work.  'ret' is a "u32 *" type therefore the
compiler is allowed to assume the pointer is properly aligned and
therefore emit a 32-bit load/store sequence inline for the memcpy()
call.

Which means all of this unaligned handling code is going to accomplish
nothing at all.  The code will still make unaligned accesses.

> +	netif_rx(skb);

Please implement proper NAPI support for your driver so that receive
packets are processed via the ->poll() handler in software interrupt
context rather than via netif_rx() in hardware interrupt context.

> +static void nps_enet_tx_irq_handler(struct net_device *netdev,
> +				    struct nps_enet_tx_ctl tx_ctrl)
> +{

Likewise for TX completion handling.
> +static struct net_device_stats *nps_enet_get_stats(struct net_device *ndev)
> +{
> +	return &ndev->stats;
> +}

If this is all that your get_stats() method does, you can leave it unspecified
in nps_netdev_ops, and the core code will do the right thing by default.

^ permalink raw reply	[flat|nested] 28+ messages in thread

* [PATCH v4] NET: Add ezchip ethernet driver
  2015-06-11 17:41   ` [PATCH v3] " Noam Camus
@ 2015-06-14  6:26     ` Noam Camus
  2015-06-14 20:25       ` Florian Fainelli
  2015-06-16 14:35       ` [PATCH v5] " Noam Camus
  0 siblings, 2 replies; 28+ messages in thread
From: Noam Camus @ 2015-06-14  6:26 UTC (permalink / raw)
  To: netdev, linux-kernel
  Cc: Alexey.Brodkin, vgupta, giladb, cmetcalf, Noam Camus, Tal Zilcer

From: Noam Camus <noamc@ezchip.com>

Simple LAN device for debug or management purposes.
Device supports interrupts for RX and TX(completion).
Device does not have DMA ability.

Signed-off-by: Noam Camus <noamc@ezchip.com>
Signed-off-by: Tal Zilcer <talz@ezchip.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
---
Change log for v4:
1) replace macros with generic ones i.e. DIV_ROUND_UP and IS_ALIGNED
2) Use casting to insure GCC will handle unaligned access byte by byte
3) Add NAPI support
4) remove get_stats()
5) update Kconfig and commit log
---
 .../devicetree/bindings/net/ezchip_enet.txt        |   15 +
 drivers/net/ethernet/Kconfig                       |    1 +
 drivers/net/ethernet/Makefile                      |    1 +
 drivers/net/ethernet/ezchip/Kconfig                |   27 +
 drivers/net/ethernet/ezchip/Makefile               |    1 +
 drivers/net/ethernet/ezchip/nps_enet.c             |  668 ++++++++++++++++++++
 drivers/net/ethernet/ezchip/nps_enet.h             |  327 ++++++++++
 7 files changed, 1040 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/ezchip_enet.txt
 create mode 100644 drivers/net/ethernet/ezchip/Kconfig
 create mode 100644 drivers/net/ethernet/ezchip/Makefile
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.c
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.h

diff --git a/Documentation/devicetree/bindings/net/ezchip_enet.txt b/Documentation/devicetree/bindings/net/ezchip_enet.txt
new file mode 100644
index 0000000..4e29b2b
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ezchip_enet.txt
@@ -0,0 +1,15 @@
+* EZchip NPS Management Ethernet port driver
+
+Required properties:
+- compatible: Should be "ezchip,nps-mgt-enet"
+- reg: Address and length of the register set for the device
+- interrupts: Should contain the ENET interrupt
+
+Examples:
+
+	ethernet@f0003000 {
+		compatible = "ezchip,nps-mgt-enet";
+		reg = <0xf0003000 0x44>;
+		interrupts = <7>;
+		mac-address = [ 00 11 22 33 44 55 ];
+	};
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index eadcb05..1a6b1ba 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -66,6 +66,7 @@ config DNET
 source "drivers/net/ethernet/dec/Kconfig"
 source "drivers/net/ethernet/dlink/Kconfig"
 source "drivers/net/ethernet/emulex/Kconfig"
+source "drivers/net/ethernet/ezchip/Kconfig"
 source "drivers/net/ethernet/neterion/Kconfig"
 source "drivers/net/ethernet/faraday/Kconfig"
 source "drivers/net/ethernet/freescale/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 1367afc..489f9cc 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_DNET) += dnet.o
 obj-$(CONFIG_NET_VENDOR_DEC) += dec/
 obj-$(CONFIG_NET_VENDOR_DLINK) += dlink/
 obj-$(CONFIG_NET_VENDOR_EMULEX) += emulex/
+obj-$(CONFIG_NET_VENDOR_EZCHIP) += ezchip/
 obj-$(CONFIG_NET_VENDOR_EXAR) += neterion/
 obj-$(CONFIG_NET_VENDOR_FARADAY) += faraday/
 obj-$(CONFIG_NET_VENDOR_FREESCALE) += freescale/
diff --git a/drivers/net/ethernet/ezchip/Kconfig b/drivers/net/ethernet/ezchip/Kconfig
new file mode 100644
index 0000000..d031177
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Kconfig
@@ -0,0 +1,27 @@
+#
+# EZchip network device configuration
+#
+
+config NET_VENDOR_EZCHIP
+	bool "EZchip devices"
+	default y
+	---help---
+	  If you have a network (Ethernet) device belonging to this class, say Y
+	  and read the Ethernet-HOWTO, available from
+	  <http://www.tldp.org/docs.html#howto>.
+
+	  Note that the answer to this question doesn't directly affect the
+	  kernel: saying N will just cause the configurator to skip all
+	  the questions about EZchip devices. If you say Y, you will be asked for
+	  your specific device in the following questions.
+
+if NET_VENDOR_EZCHIP
+
+config EZCHIP_NPS_MANAGEMENT_ENET
+	tristate "EZchip NPS management enet support"
+	---help---
+	  Simple LAN device for debug or management purposes.
+	  Device supports interrupts for RX and TX(completion).
+	  Device does not have DMA ability.
+
+endif
diff --git a/drivers/net/ethernet/ezchip/Makefile b/drivers/net/ethernet/ezchip/Makefile
new file mode 100644
index 0000000..e490176
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_EZCHIP_NPS_MANAGEMENT_ENET) += nps_enet.o
diff --git a/drivers/net/ethernet/ezchip/nps_enet.c b/drivers/net/ethernet/ezchip/nps_enet.c
new file mode 100644
index 0000000..619451c
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.c
@@ -0,0 +1,668 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#include <linux/module.h>
+#include <linux/etherdevice.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_net.h>
+#include <linux/of_platform.h>
+#include "nps_enet.h"
+
+#define DRV_NAME			"nps_mgt_enet"
+
+static void nps_enet_clean_rx_fifo(struct net_device *ndev, u32 frame_len)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	u32 i, len = DIV_ROUND_UP(frame_len, sizeof(u32));
+
+	/* Empty Rx FIFO buffer by reading all words */
+	for (i = 0; i < len; i++)
+		nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+}
+
+static void nps_enet_read_rx_fifo(struct net_device *ndev,
+				  unsigned char *dst, u32 length)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	s32 i, last = length & (sizeof(u32) - 1);
+	u32 *reg = (u32 *)dst, len = length / sizeof(u32);
+	bool dst_is_aligned = IS_ALIGNED((u32)dst, sizeof(u32));
+
+	/* In case dst is not aligned we need an intermediate buffer */
+	if (dst_is_aligned)
+		for (i = 0; i < len; i++, reg++)
+			*reg = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+	else { /* !dst_is_aligned */
+		for (i = 0; i < len; i++, reg++) {
+			u32 buf =
+				nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+
+			/* to accommodate word-unaligned address of "reg"
+			 * we have to do memcpy() instead of simple "=".
+			 * we cast reg so compiler won't try optimize
+			 * to 32-bit load/store sequence.
+			 */
+			memcpy((void *)reg, &buf, sizeof(buf));
+		}
+	}
+
+	/* copy last bytes (if any) */
+	if (last) {
+		u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+
+		memcpy(reg, &buf, last);
+	}
+}
+
+static void nps_enet_rx_handler(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct sk_buff *skb = priv->irq_data.skb;
+	struct nps_enet_rx_ctl rx_ctrl;
+	u32 frame_len;
+
+	rx_ctrl.value = priv->irq_data.rx_ctrl.value;
+	frame_len = rx_ctrl.nr;
+	/* Check if we got RX */
+	if (!rx_ctrl.cr)
+		return;
+
+	ndev->stats.rx_packets++;
+	ndev->stats.rx_bytes += frame_len;
+
+	netif_receive_skb(skb);
+}
+
+static s32 nps_enet_rx_prep(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct sk_buff *skb;
+	struct nps_enet_rx_ctl rx_ctrl;
+	u32 frame_len, err = 0;
+	s32 ret = 0;
+
+	rx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_RX_CTL);
+	frame_len = rx_ctrl.nr;
+
+	/* Check if we got RX */
+	if (!rx_ctrl.cr) {
+		priv->irq_data.rx_ctrl.value = 0;
+		return ret;
+	}
+
+	/* Check Rx error */
+	if (rx_ctrl.er) {
+		ndev->stats.rx_errors++;
+		err = 1;
+	}
+
+	/* Check Rx CRC error */
+	if (rx_ctrl.crc) {
+		ndev->stats.rx_crc_errors++;
+		ndev->stats.rx_dropped++;
+		err = 1;
+	}
+
+	/* Check Frame length Min 64b */
+	if (unlikely(frame_len < ETH_ZLEN)) {
+		ndev->stats.rx_length_errors++;
+		ndev->stats.rx_dropped++;
+		err = 1;
+	}
+
+	if (err)
+		goto rx_irq_clean;
+
+	/* Skb allocation */
+	skb = netdev_alloc_skb_ip_align(ndev, frame_len);
+	if (unlikely(!skb)) {
+		ndev->stats.rx_errors++;
+		ndev->stats.rx_dropped++;
+		goto rx_irq_clean;
+	}
+
+	/* Copy frame from Rx fifo into the skb */
+	nps_enet_read_rx_fifo(ndev, skb->data, frame_len);
+
+	skb_put(skb, frame_len);
+	skb->dev = ndev;
+	skb->protocol = eth_type_trans(skb, ndev);
+	skb->ip_summed = CHECKSUM_UNNECESSARY;
+
+	priv->irq_data.skb = skb;
+	priv->irq_data.rx_ctrl.value = rx_ctrl.value;
+	ret = 1;
+	goto rx_irq_frame_done;
+
+rx_irq_clean:
+	/* Clean Rx fifo */
+	nps_enet_clean_rx_fifo(ndev, frame_len);
+	priv->irq_data.rx_ctrl.value = 0;
+
+rx_irq_frame_done:
+	/* Ack Rx ctrl register */
+	nps_enet_reg_set(priv, NPS_ENET_REG_RX_CTL, 0);
+
+	return ret;
+}
+
+static void nps_enet_tx_handler(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_tx_ctl tx_ctrl;
+
+	tx_ctrl.value = priv->irq_data.tx_ctrl.value;
+	/* Check if we got TX */
+	if (!priv->tx_packet_sent || tx_ctrl.ct)
+		return;
+
+	/* Check Tx transmit error */
+	if (unlikely(tx_ctrl.et)) {
+		ndev->stats.tx_errors++;
+	} else {
+		ndev->stats.tx_packets++;
+		ndev->stats.tx_bytes += tx_ctrl.nt;
+	}
+
+	/* In nps_enet_start_xmit we disabled sending frames*/
+	netif_wake_queue(ndev);
+
+	priv->tx_packet_sent = false;
+}
+
+static s32 nps_enet_tx_prep(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_tx_ctl tx_ctrl;
+	s32 ret = 0;
+
+	tx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_TX_CTL);
+	if (!tx_ctrl.ct && priv->tx_packet_sent) {
+		/* Ack Tx ctrl register */
+		nps_enet_reg_set(priv, NPS_ENET_REG_TX_CTL, 0);
+		priv->irq_data.tx_ctrl.value = tx_ctrl.value;
+		ret = 1;
+	} else {
+		priv->irq_data.tx_ctrl.value = 0;
+	}
+
+	return ret;
+}
+
+static s32 nps_enet_prep(struct net_device *ndev)
+{
+	s32 ret = 0;
+
+	ret |= nps_enet_tx_prep(ndev);
+	ret |= nps_enet_rx_prep(ndev);
+
+	return ret;
+}
+
+/**
+ * nps_enet_poll - NAPI poll handler.
+ * @napi:       Pointer to napi_struct structure.
+ * @budget:     How many frames to process on 1 call.
+ *
+ * returns:     Number of processed frames
+ */
+static int nps_enet_poll(struct napi_struct *napi, int budget)
+{
+	struct net_device *ndev = napi->dev;
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_buf_int_enable buf_int_enable = {
+		.rx_rdy = NPS_ENET_ENABLE,
+		.tx_done = NPS_ENET_ENABLE,};
+
+	nps_enet_tx_handler(ndev);
+	nps_enet_rx_handler(ndev);
+	napi_complete(napi);
+	nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
+			 buf_int_enable.value);
+
+	return budget;
+}
+
+/**
+ * nps_enet_irq_handler - Global interrupt handler for ENET.
+ * @irq:                irq number.
+ * @dev_instance:       device instance.
+ *
+ * returns: IRQ_HANDLED for all cases.
+ *
+ * EZchip ENET has 2 interrupt causes, and depending on bits raised in
+ * CTRL registers we may tell what is a reason for interrupt to fire up.
+ * We got one for RX and the other for TX (completion).
+ */
+static irqreturn_t nps_enet_irq_handler(s32 irq, void *dev_instance)
+{
+	struct net_device *ndev = dev_instance;
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	if (nps_enet_prep(ndev)) {
+		if (likely(napi_schedule_prep(&priv->napi))) {
+			nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
+			__napi_schedule(&priv->napi);
+		}
+	}
+
+	return IRQ_HANDLED;
+}
+
+static void nps_enet_set_hw_mac_address(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_mac_cfg_1 ge_mac_cfg_1;
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
+
+	/* set MAC address in HW */
+	ge_mac_cfg_1.octet_0 = ndev->dev_addr[0];
+	ge_mac_cfg_1.octet_1 = ndev->dev_addr[1];
+	ge_mac_cfg_1.octet_2 = ndev->dev_addr[2];
+	ge_mac_cfg_1.octet_3 = ndev->dev_addr[3];
+	ge_mac_cfg_2->octet_4 = ndev->dev_addr[4];
+	ge_mac_cfg_2->octet_5 = ndev->dev_addr[5];
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_1,
+			 ge_mac_cfg_1.value);
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+}
+
+/**
+ * nps_enet_hw_reset - Reset the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function reset the PCS and TX fifo.
+ * The programming model is to set the relevant reset bits
+ * wait for some time for this to propagate and then unset
+ * the reset bits. This way we ensure that reset procedure
+ * is done successfully by device.
+ */
+static void nps_enet_hw_reset(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_rst ge_rst = {.value = 0};
+	struct nps_enet_phase_fifo_ctl phase_fifo_ctl = {.value = 0};
+
+	/* Pcs reset sequence*/
+	ge_rst.gmac_0 = NPS_ENET_ENABLE;
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+	usleep_range(10, 20);
+	ge_rst.value = 0;
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+
+	/* Tx fifo reset sequence */
+	phase_fifo_ctl.rst = NPS_ENET_ENABLE;
+	phase_fifo_ctl.init = NPS_ENET_ENABLE;
+	nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+	usleep_range(10, 20);
+	phase_fifo_ctl.value = 0;
+	nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+}
+
+static void nps_enet_hw_enable_control(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_mac_cfg_0 ge_mac_cfg_0 = { .value = 0 };
+	struct nps_enet_buf_int_enable buf_int_enable = { .value = 0 };
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 *ge_mac_cfg_3 = &priv->ge_mac_cfg_3;
+	s32 max_frame_length;
+
+	/* Enable Rx and Tx statistics */
+	ge_mac_cfg_2->stat_en = NPS_ENET_GE_MAC_CFG_2_STAT_EN;
+
+	/* Discard packets with different MAC address */
+	ge_mac_cfg_2->disc_da = NPS_ENET_ENABLE;
+
+	/* Discard multicast packets */
+	ge_mac_cfg_2->disc_mc = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+
+	/* Discard Packets bigger than max frame length */
+	max_frame_length = ETH_HLEN + ndev->mtu + ETH_FCS_LEN;
+	if (max_frame_length <= NPS_ENET_MAX_FRAME_LENGTH) {
+		ge_mac_cfg_3->max_len = max_frame_length;
+		nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_3,
+				 ge_mac_cfg_3->value);
+	}
+
+	/* Enable interrupts */
+	buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
+	buf_int_enable.tx_done = NPS_ENET_ENABLE;
+	nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
+			 buf_int_enable.value);
+
+	/* Write device MAC address to HW */
+	nps_enet_set_hw_mac_address(ndev);
+
+	/* Rx and Tx HW features */
+	ge_mac_cfg_0.tx_pad_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_crc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_crc_strip = NPS_ENET_ENABLE;
+
+	/* IFG configuration */
+	ge_mac_cfg_0.rx_ifg = NPS_ENET_GE_MAC_CFG_0_RX_IFG;
+	ge_mac_cfg_0.tx_ifg = NPS_ENET_GE_MAC_CFG_0_TX_IFG;
+
+	/* preamble configuration */
+	ge_mac_cfg_0.rx_pr_check_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_pr_len = NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN;
+
+	/* enable flow control frames */
+	ge_mac_cfg_0.tx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_fc_retr = NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR;
+
+	/* Enable Rx and Tx */
+	ge_mac_cfg_0.rx_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_en = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0,
+			 ge_mac_cfg_0.value);
+}
+
+static void nps_enet_hw_disable_control(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	/* Disable interrupts */
+	nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
+
+	/* Disable Rx and Tx */
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0, 0);
+}
+
+static void nps_enet_send_frame(struct net_device *ndev,
+				struct sk_buff *skb)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_tx_ctl tx_ctrl = { .value = 0 };
+	short length = skb->len;
+	u32 i, len = DIV_ROUND_UP(length, sizeof(u32));
+	u32 *src = (u32 *)virt_to_phys(skb->data);
+	bool src_is_aligned = IS_ALIGNED((u32)src, sizeof(u32));
+
+	/* In case src is not aligned we need an intermediate buffer */
+	if (src_is_aligned)
+		for (i = 0; i < len; i++, src++)
+			nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, *src);
+	else { /* !src_is_aligned */
+		for (i = 0; i < len; i++, src++) {
+			u32 buf;
+
+			/* to accommodate word-unaligned address of "src"
+			 * we have to do memcpy() instead of simple "="
+			 */
+			memcpy(&buf, src, sizeof(buf));
+			nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, buf);
+		}
+	}
+	/* Write the length of the Frame */
+	tx_ctrl.nt = length;
+
+	/* Indicate SW is done */
+	priv->tx_packet_sent = true;
+	tx_ctrl.ct = NPS_ENET_ENABLE;
+
+	/* Send Frame */
+	nps_enet_reg_set(priv, NPS_ENET_REG_TX_CTL, tx_ctrl.value);
+}
+
+/**
+ * nps_enet_set_mac_address - Set the MAC address for this device.
+ * @ndev:       Pointer to net_device structure.
+ * @p:          6 byte Address to be written as MAC address.
+ *
+ * This function copies the HW address from the sockaddr structure to the
+ * net_device structure and updates the address in HW.
+ *
+ * returns:     -EBUSY if the net device is busy or 0 if the address is set
+ *              successfully.
+ */
+static s32 nps_enet_set_mac_address(struct net_device *ndev, void *p)
+{
+	struct sockaddr *addr = p;
+	s32 res;
+
+	if (netif_running(ndev))
+		return -EBUSY;
+
+	res = eth_mac_addr(ndev, p);
+	if (!res) {
+		ether_addr_copy(ndev->dev_addr, addr->sa_data);
+		nps_enet_set_hw_mac_address(ndev);
+	}
+
+	return res;
+}
+
+/**
+ * nps_enet_open - Open the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * returns: 0, on success or non-zero error value on failure.
+ *
+ * This function enables an IRQs for the ENET device and starts the Tx queue.
+ */
+static s32 nps_enet_open(struct net_device *ndev)
+{
+	s32 err;
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	/* Reset private variables */
+	priv->tx_packet_sent = false;
+	priv->ge_mac_cfg_2.value = 0;
+	priv->ge_mac_cfg_3.value = 0;
+
+	/* ge_mac_cfg_3 default values */
+	priv->ge_mac_cfg_3.rx_ifg_th = NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH;
+	priv->ge_mac_cfg_3.max_len = NPS_ENET_GE_MAC_CFG_3_MAX_LEN;
+
+	/* Disable HW device */
+	nps_enet_hw_disable_control(ndev);
+
+	/* irq Rx allocation */
+	err = request_irq(priv->irq, nps_enet_irq_handler,
+			  0, "enet-rx-tx", ndev);
+	if (err)
+		return err;
+
+	napi_enable(&priv->napi);
+
+	/* Enable HW device */
+	nps_enet_hw_reset(ndev);
+	nps_enet_hw_enable_control(ndev);
+
+	netif_start_queue(ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_stop - Close the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function stops the Tx queue, disables interrupts for the ENET device.
+ */
+static s32 nps_enet_stop(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	napi_disable(&priv->napi);
+	netif_stop_queue(ndev);
+	nps_enet_hw_disable_control(ndev);
+	free_irq(priv->irq, ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_start_xmit - Starts the data transmission.
+ * @skb:        sk_buff pointer that contains data to be Transmitted.
+ * @ndev:       Pointer to net_device structure.
+ *
+ * returns: NETDEV_TX_OK, on success
+ *              NETDEV_TX_BUSY, if any of the descriptors are not free.
+ *
+ * This function is invoked from upper layers to initiate transmission.
+ */
+static netdev_tx_t nps_enet_start_xmit(struct sk_buff *skb,
+				       struct net_device *ndev)
+{
+	/* This driver handles one frame at a time  */
+	netif_stop_queue(ndev);
+
+	nps_enet_send_frame(ndev, skb);
+
+	dev_kfree_skb(skb);
+
+	return NETDEV_TX_OK;
+}
+
+#ifdef CONFIG_NET_POLL_CONTROLLER
+static void nps_enet_poll_controller(struct net_device *ndev)
+{
+	disable_irq(ndev->irq);
+	nps_enet_board_irq_handler(ndev->irq, ndev);
+	enable_irq(ndev->irq);
+}
+#endif
+
+static const struct net_device_ops nps_netdev_ops = {
+	.ndo_open		= nps_enet_open,
+	.ndo_stop		= nps_enet_stop,
+	.ndo_start_xmit		= nps_enet_start_xmit,
+	.ndo_set_mac_address	= nps_enet_set_mac_address,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+	.ndo_poll_controller	= nps_enet_poll_controller,
+#endif
+};
+
+static s32 nps_enet_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct net_device *ndev;
+	struct nps_enet_priv *priv;
+	s32 err = 0;
+	const char *mac_addr;
+	struct resource res_regs;
+
+	if (!dev->of_node)
+		return -ENODEV;
+
+	ndev = alloc_etherdev(sizeof(struct nps_enet_priv));
+	if (!ndev)
+		return -ENOMEM;
+
+	platform_set_drvdata(pdev, ndev);
+	SET_NETDEV_DEV(ndev, dev);
+	priv = netdev_priv(ndev);
+
+	/* Get ENET registers base address from device tree */
+	err = of_address_to_resource(dev->of_node, 0, &res_regs);
+	if (err) {
+		dev_err(dev, "failed to retrieve registers base from device tree\n");
+		err = -ENODEV;
+		goto out_netdev;
+	}
+
+	/* The EZ NET specific entries in the device structure. */
+	ndev->netdev_ops = &nps_netdev_ops;
+	ndev->watchdog_timeo = (400 * HZ / 1000);
+	ndev->flags &= ~IFF_MULTICAST;
+
+	priv->regs_base = devm_ioremap_resource(dev, &res_regs);
+	if (IS_ERR(priv->regs_base)) {
+		err = PTR_ERR(priv->regs_base);
+		goto out_netdev;
+	}
+	dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs_base);
+
+	/* set kernel MAC address to dev */
+	mac_addr = of_get_mac_address(dev->of_node);
+	if (mac_addr)
+		ether_addr_copy(ndev->dev_addr, mac_addr);
+	else
+		eth_hw_addr_random(ndev);
+
+	/* Get IRQ number from device tree */
+	priv->irq = irq_of_parse_and_map(dev->of_node, 0);
+	if (!priv->irq) {
+		dev_err(dev, "failed to retrieve <irq Rx-Tx> value from device tree\n");
+		err = -ENODEV;
+		goto out_netdev;
+	}
+
+	netif_napi_add(ndev, &priv->napi, nps_enet_poll, NAPI_POLL_WEIGHT);
+
+	/* Register the driver. Should be the last thing in probe */
+	err = register_netdev(ndev);
+	if (err) {
+		dev_err(dev, "Failed to register ndev for %s, err = 0x%08x\n",
+			ndev->name, (s32)err);
+		err = -ENODEV;
+		goto out_netif_api;
+	}
+
+	dev_info(dev, "(rx/tx=%d)\n", priv->irq);
+
+out_netif_api:
+	netif_napi_del(&priv->napi);
+out_netdev:
+	if (err)
+		free_netdev(ndev);
+
+	return 0;
+}
+
+static s32 nps_enet_remove(struct platform_device *pdev)
+{
+	struct net_device *ndev = platform_get_drvdata(pdev);
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	unregister_netdev(ndev);
+	free_netdev(ndev);
+	netif_napi_del(&priv->napi);
+
+	return 0;
+}
+
+static const struct of_device_id nps_enet_dt_ids[] = {
+	{ .compatible = "ezchip,nps-mgt-enet" },
+	{ /* Sentinel */ }
+};
+
+static struct platform_driver nps_enet_driver = {
+	.probe = nps_enet_probe,
+	.remove = nps_enet_remove,
+	.driver = {
+		.name = DRV_NAME,
+		.of_match_table  = nps_enet_dt_ids,
+	},
+};
+
+module_platform_driver(nps_enet_driver);
+
+MODULE_AUTHOR("EZchip Semiconductor");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/net/ethernet/ezchip/nps_enet.h b/drivers/net/ethernet/ezchip/nps_enet.h
new file mode 100644
index 0000000..062808b
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.h
@@ -0,0 +1,327 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#ifndef _NPS_ENET_H
+#define _NPS_ENET_H
+
+/* default values */
+#define NPS_ENET_MAX_FRAME_LENGTH		0x3FFF
+#define NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR	0x7
+#define NPS_ENET_GE_MAC_CFG_0_RX_IFG		0x5
+#define NPS_ENET_GE_MAC_CFG_0_TX_IFG		0xC
+#define NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN		0x7
+#define NPS_ENET_GE_MAC_CFG_2_STAT_EN		0x3
+#define NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH		0x14
+#define NPS_ENET_GE_MAC_CFG_3_MAX_LEN		0x3FFC
+#define NPS_ENET_ENABLE				1
+#define NPS_ENET_DISABLE			0
+
+/* register definitions  */
+#define NPS_ENET_REG_TX_CTL		0x800
+#define NPS_ENET_REG_TX_BUF		0x808
+#define NPS_ENET_REG_RX_CTL		0x810
+#define NPS_ENET_REG_RX_BUF		0x818
+#define NPS_ENET_REG_BUF_INT_ENABLE	0x8C0
+#define NPS_ENET_REG_GE_MAC_CFG_0	0x1000
+#define NPS_ENET_REG_GE_MAC_CFG_1	0x1004
+#define NPS_ENET_REG_GE_MAC_CFG_2	0x1008
+#define NPS_ENET_REG_GE_MAC_CFG_3	0x100C
+#define NPS_ENET_REG_GE_RST		0x1400
+#define NPS_ENET_REG_PHASE_FIFO_CTL	0x1404
+
+/* Tx control register */
+struct nps_enet_tx_ctl {
+	union {
+		/* ct: SW sets to indicate frame ready in Tx buffer for
+		 *     transmission. HW resets to when transmission done
+		 * et: Transmit error
+		 * nt: Length in bytes of Tx frame loaded to Tx buffer
+		 */
+		struct {
+			u32
+			__reserved_1:16,
+			ct:1,
+			et:1,
+			__reserved_2:3,
+			nt:11;
+		};
+
+		u32 value;
+	};
+};
+
+/* Rx control register */
+struct nps_enet_rx_ctl {
+	union {
+		/* cr:  HW sets to indicate frame ready in Rx buffer.
+		 *      SW resets to indicate host read received frame
+		 *      and new frames can be written to Rx buffer
+		 * er:  Rx error indication
+		 * crc: Rx CRC error indication
+		 * nr:  Length in bytes of Rx frame loaded by MAC to Rx buffer
+		 */
+		struct {
+			u32
+			__reserved_1:16,
+			cr:1,
+			er:1,
+			crc:1,
+			__reserved_2:2,
+			nr:11;
+		};
+
+		u32 value;
+	};
+};
+
+/* Interrupt enable for data buffer events register */
+struct nps_enet_buf_int_enable {
+	union {
+		/* tx_done: Interrupt generation in the case when new frame
+		 *          is ready in Rx buffer
+		 * rx_rdy:  Interrupt generation in the case when current frame
+		 *          was read from TX buffer
+		 */
+		struct {
+			u32
+			__reserved:30,
+			tx_done:1,
+			rx_rdy:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 0 register */
+struct nps_enet_ge_mac_cfg_0 {
+	union {
+		/* tx_pr_len:          Transmit preamble length in bytes
+		 * tx_ifg_nib:         Tx idle pattern
+		 * nib_mode:           Nibble (4-bit) Mode
+		 * rx_pr_check_en:     Receive preamble Check Enable
+		 * tx_ifg:             Transmit inter-Frame Gap
+		 * rx_ifg:             Receive inter-Frame Gap
+		 * tx_fc_retr:         Transmit Flow Control Retransmit Mode
+		 * rx_length_check_en: Receive Length Check Enable
+		 * rx_crc_ignore:      Results of the CRC check are ignored
+		 * rx_crc_strip:       MAC strips the CRC from received frames
+		 * rx_fc_en:           Receive Flow Control Enable
+		 * tx_crc_en:          Transmit CRC Enabled
+		 * tx_pad_en:          Transmit Padding Enable
+		 * tx_cf_en:           Transmit Flow Control Enable
+		 * tx_en:              Transmit Enable
+		 * rx_en:              Receive Enable
+		 */
+		struct {
+			u32
+			tx_pr_len:4,
+			tx_ifg_nib:4,
+			nib_mode:1,
+			rx_pr_check_en:1,
+			tx_ifg:6,
+			rx_ifg:4,
+			tx_fc_retr:3,
+			rx_length_check_en:1,
+			rx_crc_ignore:1,
+			rx_crc_strip:1,
+			rx_fc_en:1,
+			tx_crc_en:1,
+			tx_pad_en:1,
+			tx_fc_en:1,
+			tx_en:1,
+			rx_en:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 1 register */
+struct nps_enet_ge_mac_cfg_1 {
+	union {
+		/* octet_3: MAC address octet 3
+		 * octet_2: MAC address octet 2
+		 * octet_1: MAC address octet 1
+		 * octet_0: MAC address octet 0
+		 */
+		struct {
+			u32
+			octet_3:8,
+			octet_2:8,
+			octet_1:8,
+			octet_0:8;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 2 register */
+struct nps_enet_ge_mac_cfg_2 {
+	union {
+		/* transmit_flush_en: MAC flush enable
+		 * stat_en:           RMON statistics interface enable
+		 * disc_da:           Discard frames with DA different
+		 *                    from MAC address
+		 * disc_bc:           Discard broadcast frames
+		 * disc_mc:           Discard multicast frames
+		 * octet_5:           MAC address octet 5
+		 * octet_4:           MAC address octet 4
+		 */
+		struct {
+			u32
+			transmit_flush_en:1,
+			__reserved_1:5,
+			stat_en:2,
+			__reserved_2:1,
+			disc_da:1,
+			disc_bc:1,
+			disc_mc:1,
+			__reserved_3:4,
+			octet_5:8,
+			octet_4:8;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 3 register */
+struct nps_enet_ge_mac_cfg_3 {
+	union {
+		/* ext_oob_cbfc_sel:  Selects one of the 4 profiles for
+		 *                    extended OOB in-flow-control indication
+		 * max_len:           Maximum receive frame length in bytes
+		 * tx_cbfc_en:        Enable transmission of class-based
+		 *                    flow control packets
+		 * rx_ifg_th:         Threshold for IFG status reporting via OOB
+		 * cf_timeout:        Configurable time to decrement FC counters
+		 * cf_drop:           Drop control frames
+		 * redirect_cbfc_sel: Selects one of CBFC redirect profiles
+		 * rx_cbfc_redir_en:  Enable Rx class-based flow
+		 *                    control redirect
+		 * rx_cbfc_en:        Enable Rx class-based flow control
+		 * tm_hd_mode:        TM header mode
+		 */
+		struct {
+			u32
+			ext_oob_cbfc_sel:2,
+			max_len:14,
+			tx_cbfc_en:1,
+			rx_ifg_th:5,
+			cf_timeout:4,
+			cf_drop:1,
+			redirect_cbfc_sel:2,
+			rx_cbfc_redir_en:1,
+			rx_cbfc_en:1,
+			tm_hd_mode:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* GE MAC, PCS reset control register */
+struct nps_enet_ge_rst {
+	union {
+		/* gmac_0: GE MAC reset
+		 * spcs_0: SGMII PCS reset
+		 */
+		struct {
+			u32
+			__reserved_1:23,
+			gmac_0:1,
+			__reserved_2:7,
+			spcs_0:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Tx phase sync FIFO control register */
+struct nps_enet_phase_fifo_ctl {
+	union {
+		/* init: initialize serdes TX phase sync FIFO pointers
+		 * rst:  reset serdes TX phase sync FIFO
+		 */
+		struct {
+			u32
+			__reserved:30,
+			init:1,
+			rst:1;
+		};
+
+		u32 value;
+	};
+};
+
+/**
+ * struct nps_enet_irq_data - Storage of data to pass from HW to SW IRQ context.
+ * @skb:            skb of received frame that need to be passed to net stack
+ * @rx_ctrl:        RX control for frame pointed by skb
+ * @tx_ctrl:        TX control
+ */
+struct nps_enet_irq_data {
+	struct sk_buff *skb;
+	struct nps_enet_rx_ctl rx_ctrl;
+	struct nps_enet_tx_ctl tx_ctrl;
+};
+
+/**
+ * struct nps_enet_priv - Storage of ENET's private information.
+ * @regs_base:      Base address of ENET memory-mapped control registers.
+ * @irq:            For RX/TX IRQ number.
+ * @tx_packet_sent: SW indication if frame is being sent
+ * @irq_data:       Data for RX/TX softirq handling
+ * @napi:           Structure for NAPI.
+ */
+struct nps_enet_priv {
+	void __iomem *regs_base;
+	s32 irq;
+	bool tx_packet_sent;
+	struct nps_enet_irq_data irq_data;
+	struct napi_struct napi;
+	struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 ge_mac_cfg_3;
+};
+
+/**
+ * nps_reg_set - Sets ENET register with provided value.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ * @value:      Value to set in register.
+ */
+static inline void nps_enet_reg_set(struct nps_enet_priv *priv,
+				    s32 reg, s32 value)
+{
+	iowrite32be(value, priv->regs_base + reg);
+}
+
+/**
+ * nps_reg_get - Gets value of specified ENET register.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ *
+ * returns:     Value of requested register.
+ */
+static inline u32 nps_enet_reg_get(struct nps_enet_priv *priv, s32 reg)
+{
+	return ioread32be(priv->regs_base + reg);
+}
+
+#endif /* _NPS_ENET_H */
-- 
1.7.1


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* Re: [PATCH v4] NET: Add ezchip ethernet driver
  2015-06-14  6:26     ` [PATCH v4] " Noam Camus
@ 2015-06-14 20:25       ` Florian Fainelli
  2015-06-16 14:35       ` [PATCH v5] " Noam Camus
  1 sibling, 0 replies; 28+ messages in thread
From: Florian Fainelli @ 2015-06-14 20:25 UTC (permalink / raw)
  To: Noam Camus, netdev, linux-kernel
  Cc: Alexey.Brodkin, vgupta, giladb, cmetcalf, Tal Zilcer

Le 06/13/15 23:26, Noam Camus a écrit :
> From: Noam Camus <noamc@ezchip.com>
> 
> Simple LAN device for debug or management purposes.
> Device supports interrupts for RX and TX(completion).
> Device does not have DMA ability.
> 
> Signed-off-by: Noam Camus <noamc@ezchip.com>
> Signed-off-by: Tal Zilcer <talz@ezchip.com>
> Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
> ---
> +	/* copy last bytes (if any) */
> +	if (last) {
> +		u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
> +
> +		memcpy(reg, &buf, last);

memcpy_fromio() for this entire function?

> +	}
> +}
> +
> +static void nps_enet_rx_handler(struct net_device *ndev)
> +{
> +	struct nps_enet_priv *priv = netdev_priv(ndev);
> +	struct sk_buff *skb = priv->irq_data.skb;
> +	struct nps_enet_rx_ctl rx_ctrl;
> +	u32 frame_len;
> +
> +	rx_ctrl.value = priv->irq_data.rx_ctrl.value;
> +	frame_len = rx_ctrl.nr;
> +	/* Check if we got RX */
> +	if (!rx_ctrl.cr)
> +		return;
> +
> +	ndev->stats.rx_packets++;
> +	ndev->stats.rx_bytes += frame_len;
> +
> +	netif_receive_skb(skb);

Not sure why nps_enet_rx_handler here does not do most of the processing
of what nps_enet_rx_prep() does, but see below:

> +}
> +
> +static s32 nps_enet_rx_prep(struct net_device *ndev)
> +{
> +	struct nps_enet_priv *priv = netdev_priv(ndev);
> +	struct sk_buff *skb;
> +	struct nps_enet_rx_ctl rx_ctrl;
> +	u32 frame_len, err = 0;
> +	s32 ret = 0;

You do not seem to be propagating anything different than 1 or 0, does
that need to be signed?

> +
> +	rx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_RX_CTL);
> +	frame_len = rx_ctrl.nr;
> +
> +	/* Check if we got RX */
> +	if (!rx_ctrl.cr) {
> +		priv->irq_data.rx_ctrl.value = 0;
> +		return ret;
> +	}
> +
> +	/* Check Rx error */
> +	if (rx_ctrl.er) {
> +		ndev->stats.rx_errors++;
> +		err = 1;
> +	}
> +
> +	/* Check Rx CRC error */
> +	if (rx_ctrl.crc) {
> +		ndev->stats.rx_crc_errors++;
> +		ndev->stats.rx_dropped++;
> +		err = 1;
> +	}
> +
> +	/* Check Frame length Min 64b */
> +	if (unlikely(frame_len < ETH_ZLEN)) {
> +		ndev->stats.rx_length_errors++;
> +		ndev->stats.rx_dropped++;
> +		err = 1;
> +	}
> +
> +	if (err)
> +		goto rx_irq_clean;

Ok, so ret = 0 means errors and ret = 1 means success, that is pretty
counter intuititive to what other parts of the kernel do.

> +
> +	/* Skb allocation */
> +	skb = netdev_alloc_skb_ip_align(ndev, frame_len);
> +	if (unlikely(!skb)) {
> +		ndev->stats.rx_errors++;
> +		ndev->stats.rx_dropped++;
> +		goto rx_irq_clean;
> +	}
> +
> +	/* Copy frame from Rx fifo into the skb */
> +	nps_enet_read_rx_fifo(ndev, skb->data, frame_len);
> +
> +	skb_put(skb, frame_len);
> +	skb->dev = ndev;

eth_type_trans does that assignement for you already.

> +	skb->protocol = eth_type_trans(skb, ndev);
> +	skb->ip_summed = CHECKSUM_UNNECESSARY;
> +
> +	priv->irq_data.skb = skb;
> +	priv->irq_data.rx_ctrl.value = rx_ctrl.value;

So you are retaining the SKB here, called from hard interrupt context
and only processing it in nps_enet_rx_handler(), is there a particular
reason why you are not storing the rx_ctrl status word in top-half and
processing the SKB in bottom-half entirely instead? This needs to be
documented in your driver design.

> +	ret = 1;
> +	goto rx_irq_frame_done;
> +
> +rx_irq_clean:
> +	/* Clean Rx fifo */
> +	nps_enet_clean_rx_fifo(ndev, frame_len);
> +	priv->irq_data.rx_ctrl.value = 0;
> +
> +rx_irq_frame_done:
> +	/* Ack Rx ctrl register */
> +	nps_enet_reg_set(priv, NPS_ENET_REG_RX_CTL, 0);
> +
> +	return ret;
> +}
> +
> +static void nps_enet_tx_handler(struct net_device *ndev)
> +{
> +	struct nps_enet_priv *priv = netdev_priv(ndev);
> +	struct nps_enet_tx_ctl tx_ctrl;
> +
> +	tx_ctrl.value = priv->irq_data.tx_ctrl.value;
> +	/* Check if we got TX */
> +	if (!priv->tx_packet_sent || tx_ctrl.ct)
> +		return;
> +
> +	/* Check Tx transmit error */
> +	if (unlikely(tx_ctrl.et)) {
> +		ndev->stats.tx_errors++;
> +	} else {
> +		ndev->stats.tx_packets++;
> +		ndev->stats.tx_bytes += tx_ctrl.nt;
> +	}
> +
> +	/* In nps_enet_start_xmit we disabled sending frames*/
> +	netif_wake_queue(ndev);

You might want to explain why this is safe to do here, presumably since
this seems to be a FIFO with a single entry (is that the case?) you can
do that as soon as you get the TX completion interrupt, but this needs
to be documented.

> +
> +	priv->tx_packet_sent = false;
> +}
> +
> +static s32 nps_enet_tx_prep(struct net_device *ndev)
> +{
> +	struct nps_enet_priv *priv = netdev_priv(ndev);
> +	struct nps_enet_tx_ctl tx_ctrl;
> +	s32 ret = 0;
> +
> +	tx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_TX_CTL);
> +	if (!tx_ctrl.ct && priv->tx_packet_sent) {
> +		/* Ack Tx ctrl register */
> +		nps_enet_reg_set(priv, NPS_ENET_REG_TX_CTL, 0);
> +		priv->irq_data.tx_ctrl.value = tx_ctrl.value;
> +		ret = 1;
> +	} else {
> +		priv->irq_data.tx_ctrl.value = 0;
> +	}
> +
> +	return ret;
> +}
> +
> +static s32 nps_enet_prep(struct net_device *ndev)
> +{
> +	s32 ret = 0;
> +
> +	ret |= nps_enet_tx_prep(ndev);
> +	ret |= nps_enet_rx_prep(ndev);

Ok, now it is a little clearer why these two functions return 0 for
error/nothing than 1, these should probably be named something like
nps_enet_tx_has_work() or something like that.

> +
> +	return ret;
> +}
> +
> +/**
> + * nps_enet_poll - NAPI poll handler.
> + * @napi:       Pointer to napi_struct structure.
> + * @budget:     How many frames to process on 1 call.
> + *
> + * returns:     Number of processed frames
> + */
> +static int nps_enet_poll(struct napi_struct *napi, int budget)
> +{
> +	struct net_device *ndev = napi->dev;
> +	struct nps_enet_priv *priv = netdev_priv(ndev);
> +	struct nps_enet_buf_int_enable buf_int_enable = {
> +		.rx_rdy = NPS_ENET_ENABLE,
> +		.tx_done = NPS_ENET_ENABLE,};
> +
> +	nps_enet_tx_handler(ndev);
> +	nps_enet_rx_handler(ndev);
> +	napi_complete(napi);

That is not so simple, tx_handler should not be bounded to a particular
budget, however your RX handlers should not exceed bugdet. If you
process less than budget, you can go ahead and call napi_complete to
exit ->poll() if not, then you need to poll again the RX queue for more
packets.

If you only have a capacity of one oustanding packet in your FIFO, you
would want to adjust your budget accordingly.

> +	nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
> +			 buf_int_enable.value);
> +
> +	return budget;
> +}
> +

[snip]

> +/**
> + * nps_enet_start_xmit - Starts the data transmission.
> + * @skb:        sk_buff pointer that contains data to be Transmitted.
> + * @ndev:       Pointer to net_device structure.
> + *
> + * returns: NETDEV_TX_OK, on success
> + *              NETDEV_TX_BUSY, if any of the descriptors are not free.
> + *
> + * This function is invoked from upper layers to initiate transmission.
> + */
> +static netdev_tx_t nps_enet_start_xmit(struct sk_buff *skb,
> +				       struct net_device *ndev)
> +{
> +	/* This driver handles one frame at a time  */
> +	netif_stop_queue(ndev);
> +
> +	nps_enet_send_frame(ndev, skb);
> +
> +	dev_kfree_skb(skb);

You do have a TX completion handler, so you should not be freeing the
SKB just now, instead you should retain a reference to it, limit to only
how many outstanding transmits as allowed by your hardware, and call
dev_kfree_skb() in your tx_handler() instead. Here you are lying to the
networking stack by telling it earlier than you should that the packet
has been transmitted.

> +
> +	return NETDEV_TX_OK;
> +}
> +
> +#ifdef CONFIG_NET_POLL_CONTROLLER
> +static void nps_enet_poll_controller(struct net_device *ndev)
> +{
> +	disable_irq(ndev->irq);
> +	nps_enet_board_irq_handler(ndev->irq, ndev);
> +	enable_irq(ndev->irq);
> +}
> +#endif
> +
> +static const struct net_device_ops nps_netdev_ops = {
> +	.ndo_open		= nps_enet_open,
> +	.ndo_stop		= nps_enet_stop,
> +	.ndo_start_xmit		= nps_enet_start_xmit,
> +	.ndo_set_mac_address	= nps_enet_set_mac_address,
> +#ifdef CONFIG_NET_POLL_CONTROLLER
> +	.ndo_poll_controller	= nps_enet_poll_controller,
> +#endif

No set_rx_mode callback implemented at all?

> +};
> +
> +static s32 nps_enet_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct net_device *ndev;
> +	struct nps_enet_priv *priv;
> +	s32 err = 0;
> +	const char *mac_addr;
> +	struct resource res_regs;
> +
> +	if (!dev->of_node)
> +		return -ENODEV;
> +
> +	ndev = alloc_etherdev(sizeof(struct nps_enet_priv));
> +	if (!ndev)
> +		return -ENOMEM;
> +
> +	platform_set_drvdata(pdev, ndev);
> +	SET_NETDEV_DEV(ndev, dev);
> +	priv = netdev_priv(ndev);
> +
> +	/* Get ENET registers base address from device tree */
> +	err = of_address_to_resource(dev->of_node, 0, &res_regs);
> +	if (err) {
> +		dev_err(dev, "failed to retrieve registers base from device tree\n");
> +		err = -ENODEV;
> +		goto out_netdev;
> +	}

You could do platform_get_resource() here and save a check against this,
since devm_ioremap_resource() already checks for the resource pointer
correctness.

> +
> +	/* The EZ NET specific entries in the device structure. */
> +	ndev->netdev_ops = &nps_netdev_ops;
> +	ndev->watchdog_timeo = (400 * HZ / 1000);
> +	ndev->flags &= ~IFF_MULTICAST;

Since you are disabling multicast at the hardware level, it still seems
like this is something that could be fixed in the future by properly
adding support for this, even though that means filtering mutlicast
groups entirely in software.

> +
> +	priv->regs_base = devm_ioremap_resource(dev, &res_regs);
> +	if (IS_ERR(priv->regs_base)) {
> +		err = PTR_ERR(priv->regs_base);
> +		goto out_netdev;
> +	}
> +	dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs_base);
> +
> +	/* set kernel MAC address to dev */
> +	mac_addr = of_get_mac_address(dev->of_node);
> +	if (mac_addr)
> +		ether_addr_copy(ndev->dev_addr, mac_addr);
> +	else
> +		eth_hw_addr_random(ndev);
> +
> +	/* Get IRQ number from device tree */
> +	priv->irq = irq_of_parse_and_map(dev->of_node, 0);
> +	if (!priv->irq) {
> +		dev_err(dev, "failed to retrieve <irq Rx-Tx> value from device tree\n");
> +		err = -ENODEV;
> +		goto out_netdev;
> +	}

platform_get_irq() is a little shorter and friendlier towards non-DT
platforms (just in case).

> +
> +	netif_napi_add(ndev, &priv->napi, nps_enet_poll, NAPI_POLL_WEIGHT);
> +
> +	/* Register the driver. Should be the last thing in probe */
> +	err = register_netdev(ndev);
> +	if (err) {
> +		dev_err(dev, "Failed to register ndev for %s, err = 0x%08x\n",
> +			ndev->name, (s32)err);
> +		err = -ENODEV;
> +		goto out_netif_api;
> +	}
> +
> +	dev_info(dev, "(rx/tx=%d)\n", priv->irq);

You are still taking an error path here, you probably want to return
here with 0.

> +
> +out_netif_api:
> +	netif_napi_del(&priv->napi);
> +out_netdev:
> +	if (err)
> +		free_netdev(ndev);
> +
> +	return 0;
> +}

-- 
Florian

^ permalink raw reply	[flat|nested] 28+ messages in thread

* [PATCH v5] NET: Add ezchip ethernet driver
  2015-06-14  6:26     ` [PATCH v4] " Noam Camus
  2015-06-14 20:25       ` Florian Fainelli
@ 2015-06-16 14:35       ` Noam Camus
  2015-06-21 16:22           ` David Miller
                           ` (2 more replies)
  1 sibling, 3 replies; 28+ messages in thread
From: Noam Camus @ 2015-06-16 14:35 UTC (permalink / raw)
  To: netdev, linux-kernel
  Cc: Alexey.Brodkin, vgupta, giladb, cmetcalf, Noam Camus, Tal Zilcer

From: Noam Camus <noamc@ezchip.com>

Simple LAN device for debug or management purposes.
Device supports interrupts for RX and TX(completion).
Device does not have DMA ability.

Signed-off-by: Noam Camus <noamc@ezchip.com>
Signed-off-by: Tal Zilcer <talz@ezchip.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
---
Change log for v5:
Basically its all based on Florian comments.
Main items are:
1) Move all interrupt chore to bottom-half
2) use memcpy_toio/fromio
3) dev_kfree_skb() moved to bottom-half
4) add set_rx_mode callback
5) use platform api toward non-DT platforms
---
 .../devicetree/bindings/net/ezchip_enet.txt        |   15 +
 drivers/net/ethernet/Kconfig                       |    1 +
 drivers/net/ethernet/Makefile                      |    1 +
 drivers/net/ethernet/ezchip/Kconfig                |   27 +
 drivers/net/ethernet/ezchip/Makefile               |    1 +
 drivers/net/ethernet/ezchip/nps_enet.c             |  652 ++++++++++++++++++++
 drivers/net/ethernet/ezchip/nps_enet.h             |  336 ++++++++++
 7 files changed, 1033 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/ezchip_enet.txt
 create mode 100644 drivers/net/ethernet/ezchip/Kconfig
 create mode 100644 drivers/net/ethernet/ezchip/Makefile
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.c
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.h

diff --git a/Documentation/devicetree/bindings/net/ezchip_enet.txt b/Documentation/devicetree/bindings/net/ezchip_enet.txt
new file mode 100644
index 0000000..4e29b2b
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ezchip_enet.txt
@@ -0,0 +1,15 @@
+* EZchip NPS Management Ethernet port driver
+
+Required properties:
+- compatible: Should be "ezchip,nps-mgt-enet"
+- reg: Address and length of the register set for the device
+- interrupts: Should contain the ENET interrupt
+
+Examples:
+
+	ethernet@f0003000 {
+		compatible = "ezchip,nps-mgt-enet";
+		reg = <0xf0003000 0x44>;
+		interrupts = <7>;
+		mac-address = [ 00 11 22 33 44 55 ];
+	};
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index eadcb05..1a6b1ba 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -66,6 +66,7 @@ config DNET
 source "drivers/net/ethernet/dec/Kconfig"
 source "drivers/net/ethernet/dlink/Kconfig"
 source "drivers/net/ethernet/emulex/Kconfig"
+source "drivers/net/ethernet/ezchip/Kconfig"
 source "drivers/net/ethernet/neterion/Kconfig"
 source "drivers/net/ethernet/faraday/Kconfig"
 source "drivers/net/ethernet/freescale/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 1367afc..489f9cc 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_DNET) += dnet.o
 obj-$(CONFIG_NET_VENDOR_DEC) += dec/
 obj-$(CONFIG_NET_VENDOR_DLINK) += dlink/
 obj-$(CONFIG_NET_VENDOR_EMULEX) += emulex/
+obj-$(CONFIG_NET_VENDOR_EZCHIP) += ezchip/
 obj-$(CONFIG_NET_VENDOR_EXAR) += neterion/
 obj-$(CONFIG_NET_VENDOR_FARADAY) += faraday/
 obj-$(CONFIG_NET_VENDOR_FREESCALE) += freescale/
diff --git a/drivers/net/ethernet/ezchip/Kconfig b/drivers/net/ethernet/ezchip/Kconfig
new file mode 100644
index 0000000..d031177
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Kconfig
@@ -0,0 +1,27 @@
+#
+# EZchip network device configuration
+#
+
+config NET_VENDOR_EZCHIP
+	bool "EZchip devices"
+	default y
+	---help---
+	  If you have a network (Ethernet) device belonging to this class, say Y
+	  and read the Ethernet-HOWTO, available from
+	  <http://www.tldp.org/docs.html#howto>.
+
+	  Note that the answer to this question doesn't directly affect the
+	  kernel: saying N will just cause the configurator to skip all
+	  the questions about EZchip devices. If you say Y, you will be asked for
+	  your specific device in the following questions.
+
+if NET_VENDOR_EZCHIP
+
+config EZCHIP_NPS_MANAGEMENT_ENET
+	tristate "EZchip NPS management enet support"
+	---help---
+	  Simple LAN device for debug or management purposes.
+	  Device supports interrupts for RX and TX(completion).
+	  Device does not have DMA ability.
+
+endif
diff --git a/drivers/net/ethernet/ezchip/Makefile b/drivers/net/ethernet/ezchip/Makefile
new file mode 100644
index 0000000..e490176
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_EZCHIP_NPS_MANAGEMENT_ENET) += nps_enet.o
diff --git a/drivers/net/ethernet/ezchip/nps_enet.c b/drivers/net/ethernet/ezchip/nps_enet.c
new file mode 100644
index 0000000..df3d5b0
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.c
@@ -0,0 +1,652 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#include <linux/module.h>
+#include <linux/etherdevice.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_net.h>
+#include <linux/of_platform.h>
+#include "nps_enet.h"
+
+#define DRV_NAME			"nps_mgt_enet"
+
+static void nps_enet_clean_rx_fifo(struct net_device *ndev, u32 frame_len)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	u32 i, len = DIV_ROUND_UP(frame_len, sizeof(u32));
+
+	/* Empty Rx FIFO buffer by reading all words */
+	for (i = 0; i < len; i++)
+		nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+}
+
+static void nps_enet_read_rx_fifo(struct net_device *ndev,
+				  unsigned char *dst, u32 length)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	s32 i, last = length & (sizeof(u32) - 1);
+	u32 *reg = (u32 *)dst, len = length / sizeof(u32);
+	bool dst_is_aligned = IS_ALIGNED((u32)dst, sizeof(u32));
+
+	/* In case dst is not aligned we need an intermediate buffer */
+	if (dst_is_aligned)
+		for (i = 0; i < len; i++, reg++)
+			*reg = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+	else { /* !dst_is_aligned */
+		for (i = 0; i < len; i++, reg++) {
+			u32 buf =
+				nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+
+			/* to accommodate word-unaligned address of "reg"
+			 * we have to do memcpy_toio() instead of simple "=".
+			 */
+			memcpy_toio(reg, &buf, sizeof(buf));
+		}
+	}
+
+	/* copy last bytes (if any) */
+	if (last) {
+		u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+
+		memcpy_toio(reg, &buf, last);
+	}
+}
+
+static u32 nps_enet_rx_handler(struct net_device *ndev)
+{
+	u32 frame_len, err = 0;
+	u32 work_done = 0;
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct sk_buff *skb;
+	struct nps_enet_rx_ctl rx_ctrl;
+
+	rx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_RX_CTL);
+	frame_len = rx_ctrl.nr;
+
+	/* Check if we got RX */
+	if (!rx_ctrl.cr)
+		return work_done;
+
+	/* If we got here there is a work for us */
+	work_done++;
+
+	/* Check Rx error */
+	if (rx_ctrl.er) {
+		ndev->stats.rx_errors++;
+		err = 1;
+	}
+
+	/* Check Rx CRC error */
+	if (rx_ctrl.crc) {
+		ndev->stats.rx_crc_errors++;
+		ndev->stats.rx_dropped++;
+		err = 1;
+	}
+
+	/* Check Frame length Min 64b */
+	if (unlikely(frame_len < ETH_ZLEN)) {
+		ndev->stats.rx_length_errors++;
+		ndev->stats.rx_dropped++;
+		err = 1;
+	}
+
+	if (err)
+		goto rx_irq_clean;
+
+	/* Skb allocation */
+	skb = netdev_alloc_skb_ip_align(ndev, frame_len);
+	if (unlikely(!skb)) {
+		ndev->stats.rx_errors++;
+		ndev->stats.rx_dropped++;
+		goto rx_irq_clean;
+	}
+
+	/* Copy frame from Rx fifo into the skb */
+	nps_enet_read_rx_fifo(ndev, skb->data, frame_len);
+
+	skb_put(skb, frame_len);
+	skb->protocol = eth_type_trans(skb, ndev);
+	skb->ip_summed = CHECKSUM_UNNECESSARY;
+
+	ndev->stats.rx_packets++;
+	ndev->stats.rx_bytes += frame_len;
+	netif_receive_skb(skb);
+
+	goto rx_irq_frame_done;
+
+rx_irq_clean:
+	/* Clean Rx fifo */
+	nps_enet_clean_rx_fifo(ndev, frame_len);
+
+rx_irq_frame_done:
+	/* Ack Rx ctrl register */
+	nps_enet_reg_set(priv, NPS_ENET_REG_RX_CTL, 0);
+
+	return work_done;
+}
+
+static void nps_enet_tx_handler(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_tx_ctl tx_ctrl;
+
+	tx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_TX_CTL);
+
+	/* Check if we got TX */
+	if (!priv->tx_packet_sent || tx_ctrl.ct)
+		return;
+
+	/* Check Tx transmit error */
+	if (unlikely(tx_ctrl.et)) {
+		ndev->stats.tx_errors++;
+	} else {
+		ndev->stats.tx_packets++;
+		ndev->stats.tx_bytes += tx_ctrl.nt;
+	}
+
+	if (priv->tx_skb) {
+		dev_kfree_skb(priv->tx_skb);
+		priv->tx_skb = NULL;
+	}
+
+	priv->tx_packet_sent = false;
+
+	if (netif_queue_stopped(ndev))
+		netif_wake_queue(ndev);
+}
+
+/**
+ * nps_enet_poll - NAPI poll handler.
+ * @napi:       Pointer to napi_struct structure.
+ * @budget:     How many frames to process on one call.
+ *
+ * returns:     Number of processed frames
+ */
+static int nps_enet_poll(struct napi_struct *napi, int budget)
+{
+	struct net_device *ndev = napi->dev;
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_buf_int_enable buf_int_enable = {
+		.rx_rdy = NPS_ENET_ENABLE,
+		.tx_done = NPS_ENET_ENABLE,};
+	u32 work_done;
+
+	nps_enet_tx_handler(ndev);
+	work_done = nps_enet_rx_handler(ndev);
+	if (work_done < budget) {
+		napi_complete(napi);
+		nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
+				 buf_int_enable.value);
+	}
+
+	return work_done;
+}
+
+/**
+ * nps_enet_irq_handler - Global interrupt handler for ENET.
+ * @irq:                irq number.
+ * @dev_instance:       device instance.
+ *
+ * returns: IRQ_HANDLED for all cases.
+ *
+ * EZchip ENET has 2 interrupt causes, and depending on bits raised in
+ * CTRL registers we may tell what is a reason for interrupt to fire up.
+ * We got one for RX and the other for TX (completion).
+ */
+static irqreturn_t nps_enet_irq_handler(s32 irq, void *dev_instance)
+{
+	struct net_device *ndev = dev_instance;
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_buf_int_cause buf_int_cause;
+
+	buf_int_cause.value =
+			nps_enet_reg_get(priv, NPS_ENET_REG_BUF_INT_CAUSE);
+
+	if (buf_int_cause.tx_done || buf_int_cause.rx_rdy)
+		if (likely(napi_schedule_prep(&priv->napi))) {
+			nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
+			__napi_schedule(&priv->napi);
+		}
+
+	return IRQ_HANDLED;
+}
+
+static void nps_enet_set_hw_mac_address(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_mac_cfg_1 ge_mac_cfg_1;
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
+
+	/* set MAC address in HW */
+	ge_mac_cfg_1.octet_0 = ndev->dev_addr[0];
+	ge_mac_cfg_1.octet_1 = ndev->dev_addr[1];
+	ge_mac_cfg_1.octet_2 = ndev->dev_addr[2];
+	ge_mac_cfg_1.octet_3 = ndev->dev_addr[3];
+	ge_mac_cfg_2->octet_4 = ndev->dev_addr[4];
+	ge_mac_cfg_2->octet_5 = ndev->dev_addr[5];
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_1,
+			 ge_mac_cfg_1.value);
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+}
+
+/**
+ * nps_enet_hw_reset - Reset the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function reset the PCS and TX fifo.
+ * The programming model is to set the relevant reset bits
+ * wait for some time for this to propagate and then unset
+ * the reset bits. This way we ensure that reset procedure
+ * is done successfully by device.
+ */
+static void nps_enet_hw_reset(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_rst ge_rst = {.value = 0};
+	struct nps_enet_phase_fifo_ctl phase_fifo_ctl = {.value = 0};
+
+	/* Pcs reset sequence*/
+	ge_rst.gmac_0 = NPS_ENET_ENABLE;
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+	usleep_range(10, 20);
+	ge_rst.value = 0;
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+
+	/* Tx fifo reset sequence */
+	phase_fifo_ctl.rst = NPS_ENET_ENABLE;
+	phase_fifo_ctl.init = NPS_ENET_ENABLE;
+	nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+	usleep_range(10, 20);
+	phase_fifo_ctl.value = 0;
+	nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+}
+
+static void nps_enet_hw_enable_control(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_mac_cfg_0 ge_mac_cfg_0 = { .value = 0 };
+	struct nps_enet_buf_int_enable buf_int_enable = { .value = 0 };
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 *ge_mac_cfg_3 = &priv->ge_mac_cfg_3;
+	s32 max_frame_length;
+
+	/* Enable Rx and Tx statistics */
+	ge_mac_cfg_2->stat_en = NPS_ENET_GE_MAC_CFG_2_STAT_EN;
+
+	/* Discard packets with different MAC address */
+	ge_mac_cfg_2->disc_da = NPS_ENET_ENABLE;
+
+	/* Discard multicast packets */
+	ge_mac_cfg_2->disc_mc = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+
+	/* Discard Packets bigger than max frame length */
+	max_frame_length = ETH_HLEN + ndev->mtu + ETH_FCS_LEN;
+	if (max_frame_length <= NPS_ENET_MAX_FRAME_LENGTH) {
+		ge_mac_cfg_3->max_len = max_frame_length;
+		nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_3,
+				 ge_mac_cfg_3->value);
+	}
+
+	/* Enable interrupts */
+	buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
+	buf_int_enable.tx_done = NPS_ENET_ENABLE;
+	nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
+			 buf_int_enable.value);
+
+	/* Write device MAC address to HW */
+	nps_enet_set_hw_mac_address(ndev);
+
+	/* Rx and Tx HW features */
+	ge_mac_cfg_0.tx_pad_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_crc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_crc_strip = NPS_ENET_ENABLE;
+
+	/* IFG configuration */
+	ge_mac_cfg_0.rx_ifg = NPS_ENET_GE_MAC_CFG_0_RX_IFG;
+	ge_mac_cfg_0.tx_ifg = NPS_ENET_GE_MAC_CFG_0_TX_IFG;
+
+	/* preamble configuration */
+	ge_mac_cfg_0.rx_pr_check_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_pr_len = NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN;
+
+	/* enable flow control frames */
+	ge_mac_cfg_0.tx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_fc_retr = NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR;
+
+	/* Enable Rx and Tx */
+	ge_mac_cfg_0.rx_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_en = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0,
+			 ge_mac_cfg_0.value);
+}
+
+static void nps_enet_hw_disable_control(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	/* Disable interrupts */
+	nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
+
+	/* Disable Rx and Tx */
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0, 0);
+}
+
+static void nps_enet_send_frame(struct net_device *ndev,
+				struct sk_buff *skb)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_tx_ctl tx_ctrl = { .value = 0 };
+	short length = skb->len;
+	u32 i, len = DIV_ROUND_UP(length, sizeof(u32));
+	u32 *src = (u32 *)virt_to_phys(skb->data);
+	bool src_is_aligned = IS_ALIGNED((u32)src, sizeof(u32));
+
+	/* In case src is not aligned we need an intermediate buffer */
+	if (src_is_aligned)
+		for (i = 0; i < len; i++, src++)
+			nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, *src);
+	else { /* !src_is_aligned */
+		for (i = 0; i < len; i++, src++) {
+			u32 buf;
+
+			/* to accommodate word-unaligned address of "src"
+			 * we have to do memcpy_fromio() instead of simple "="
+			 */
+			memcpy_fromio(&buf, src, sizeof(buf));
+			nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, buf);
+		}
+	}
+	/* Write the length of the Frame */
+	tx_ctrl.nt = length;
+
+	/* Indicate SW is done */
+	priv->tx_packet_sent = true;
+	tx_ctrl.ct = NPS_ENET_ENABLE;
+
+	/* Send Frame */
+	nps_enet_reg_set(priv, NPS_ENET_REG_TX_CTL, tx_ctrl.value);
+}
+
+/**
+ * nps_enet_set_mac_address - Set the MAC address for this device.
+ * @ndev:       Pointer to net_device structure.
+ * @p:          6 byte Address to be written as MAC address.
+ *
+ * This function copies the HW address from the sockaddr structure to the
+ * net_device structure and updates the address in HW.
+ *
+ * returns:     -EBUSY if the net device is busy or 0 if the address is set
+ *              successfully.
+ */
+static s32 nps_enet_set_mac_address(struct net_device *ndev, void *p)
+{
+	struct sockaddr *addr = p;
+	s32 res;
+
+	if (netif_running(ndev))
+		return -EBUSY;
+
+	res = eth_mac_addr(ndev, p);
+	if (!res) {
+		ether_addr_copy(ndev->dev_addr, addr->sa_data);
+		nps_enet_set_hw_mac_address(ndev);
+	}
+
+	return res;
+}
+
+/**
+ * nps_enet_set_rx_mode - Change the receive filtering mode.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function enables/disables promiscuous mode
+ */
+static void nps_enet_set_rx_mode(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
+
+	ge_mac_cfg_2.value = priv->ge_mac_cfg_2.value;
+
+	if (ndev->flags & IFF_PROMISC) {
+		ge_mac_cfg_2.disc_da = NPS_ENET_DISABLE;
+		ge_mac_cfg_2.disc_mc = NPS_ENET_DISABLE;
+	} else {
+		ge_mac_cfg_2.disc_da = NPS_ENET_ENABLE;
+		ge_mac_cfg_2.disc_mc = NPS_ENET_ENABLE;
+	}
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2, ge_mac_cfg_2.value);
+}
+
+/**
+ * nps_enet_open - Open the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * returns: 0, on success or non-zero error value on failure.
+ *
+ * This function enables an IRQs for the ENET device and starts the Tx queue.
+ */
+static s32 nps_enet_open(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	s32 err;
+
+	/* Reset private variables */
+	priv->tx_packet_sent = false;
+	priv->ge_mac_cfg_2.value = 0;
+	priv->ge_mac_cfg_3.value = 0;
+
+	/* ge_mac_cfg_3 default values */
+	priv->ge_mac_cfg_3.rx_ifg_th = NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH;
+	priv->ge_mac_cfg_3.max_len = NPS_ENET_GE_MAC_CFG_3_MAX_LEN;
+
+	/* Disable HW device */
+	nps_enet_hw_disable_control(ndev);
+
+	/* irq Rx allocation */
+	err = request_irq(priv->irq, nps_enet_irq_handler,
+			  0, "enet-rx-tx", ndev);
+	if (err)
+		return err;
+
+	napi_enable(&priv->napi);
+
+	/* Enable HW device */
+	nps_enet_hw_reset(ndev);
+	nps_enet_hw_enable_control(ndev);
+
+	netif_start_queue(ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_stop - Close the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function stops the Tx queue, disables interrupts for the ENET device.
+ */
+static s32 nps_enet_stop(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	napi_disable(&priv->napi);
+	netif_stop_queue(ndev);
+	nps_enet_hw_disable_control(ndev);
+	free_irq(priv->irq, ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_start_xmit - Starts the data transmission.
+ * @skb:        sk_buff pointer that contains data to be Transmitted.
+ * @ndev:       Pointer to net_device structure.
+ *
+ * returns: NETDEV_TX_OK, on success
+ *              NETDEV_TX_BUSY, if any of the descriptors are not free.
+ *
+ * This function is invoked from upper layers to initiate transmission.
+ */
+static netdev_tx_t nps_enet_start_xmit(struct sk_buff *skb,
+				       struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	/* This driver handles one frame at a time  */
+	netif_stop_queue(ndev);
+
+	nps_enet_send_frame(ndev, skb);
+
+	priv->tx_skb = skb;
+
+	return NETDEV_TX_OK;
+}
+
+#ifdef CONFIG_NET_POLL_CONTROLLER
+static void nps_enet_poll_controller(struct net_device *ndev)
+{
+	disable_irq(ndev->irq);
+	nps_enet_board_irq_handler(ndev->irq, ndev);
+	enable_irq(ndev->irq);
+}
+#endif
+
+static const struct net_device_ops nps_netdev_ops = {
+	.ndo_open		= nps_enet_open,
+	.ndo_stop		= nps_enet_stop,
+	.ndo_start_xmit		= nps_enet_start_xmit,
+	.ndo_set_mac_address	= nps_enet_set_mac_address,
+	.ndo_set_rx_mode        = nps_enet_set_rx_mode,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+	.ndo_poll_controller	= nps_enet_poll_controller,
+#endif
+};
+
+static s32 nps_enet_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct net_device *ndev;
+	struct nps_enet_priv *priv;
+	s32 err = 0;
+	const char *mac_addr;
+	struct resource *res_regs;
+
+	if (!dev->of_node)
+		return -ENODEV;
+
+	ndev = alloc_etherdev(sizeof(struct nps_enet_priv));
+	if (!ndev)
+		return -ENOMEM;
+
+	platform_set_drvdata(pdev, ndev);
+	SET_NETDEV_DEV(ndev, dev);
+	priv = netdev_priv(ndev);
+
+	/* The EZ NET specific entries in the device structure. */
+	ndev->netdev_ops = &nps_netdev_ops;
+	ndev->watchdog_timeo = (400 * HZ / 1000);
+	/* FIXME :: no multicast support yet */
+	ndev->flags &= ~IFF_MULTICAST;
+
+	res_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	priv->regs_base = devm_ioremap_resource(dev, res_regs);
+	if (IS_ERR(priv->regs_base)) {
+		err = PTR_ERR(priv->regs_base);
+		goto out_netdev;
+	}
+	dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs_base);
+
+	/* set kernel MAC address to dev */
+	mac_addr = of_get_mac_address(dev->of_node);
+	if (mac_addr)
+		ether_addr_copy(ndev->dev_addr, mac_addr);
+	else
+		eth_hw_addr_random(ndev);
+
+	/* Get IRQ number */
+	priv->irq = platform_get_irq(pdev, 0);
+	if (!priv->irq) {
+		dev_err(dev, "failed to retrieve <irq Rx-Tx> value from device tree\n");
+		err = -ENODEV;
+		goto out_netdev;
+	}
+
+	netif_napi_add(ndev, &priv->napi, nps_enet_poll, NPS_ENET_NAPI_POLL_WEIGHT);
+
+	/* Register the driver. Should be the last thing in probe */
+	err = register_netdev(ndev);
+	if (err) {
+		dev_err(dev, "Failed to register ndev for %s, err = 0x%08x\n",
+			ndev->name, (s32)err);
+		err = -ENODEV;
+		goto out_netif_api;
+	}
+
+	dev_info(dev, "(rx/tx=%d)\n", priv->irq);
+	return 0;
+
+out_netif_api:
+	netif_napi_del(&priv->napi);
+out_netdev:
+	if (err)
+		free_netdev(ndev);
+
+	return err;
+}
+
+static s32 nps_enet_remove(struct platform_device *pdev)
+{
+	struct net_device *ndev = platform_get_drvdata(pdev);
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	unregister_netdev(ndev);
+	free_netdev(ndev);
+	netif_napi_del(&priv->napi);
+
+	return 0;
+}
+
+static const struct of_device_id nps_enet_dt_ids[] = {
+	{ .compatible = "ezchip,nps-mgt-enet" },
+	{ /* Sentinel */ }
+};
+
+static struct platform_driver nps_enet_driver = {
+	.probe = nps_enet_probe,
+	.remove = nps_enet_remove,
+	.driver = {
+		.name = DRV_NAME,
+		.of_match_table  = nps_enet_dt_ids,
+	},
+};
+
+module_platform_driver(nps_enet_driver);
+
+MODULE_AUTHOR("EZchip Semiconductor");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/net/ethernet/ezchip/nps_enet.h b/drivers/net/ethernet/ezchip/nps_enet.h
new file mode 100644
index 0000000..fc45c9d
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.h
@@ -0,0 +1,336 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#ifndef _NPS_ENET_H
+#define _NPS_ENET_H
+
+/* default values */
+#define NPS_ENET_NAPI_POLL_WEIGHT		0x2
+#define NPS_ENET_MAX_FRAME_LENGTH		0x3FFF
+#define NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR	0x7
+#define NPS_ENET_GE_MAC_CFG_0_RX_IFG		0x5
+#define NPS_ENET_GE_MAC_CFG_0_TX_IFG		0xC
+#define NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN		0x7
+#define NPS_ENET_GE_MAC_CFG_2_STAT_EN		0x3
+#define NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH		0x14
+#define NPS_ENET_GE_MAC_CFG_3_MAX_LEN		0x3FFC
+#define NPS_ENET_ENABLE				1
+#define NPS_ENET_DISABLE			0
+
+/* register definitions  */
+#define NPS_ENET_REG_TX_CTL		0x800
+#define NPS_ENET_REG_TX_BUF		0x808
+#define NPS_ENET_REG_RX_CTL		0x810
+#define NPS_ENET_REG_RX_BUF		0x818
+#define NPS_ENET_REG_BUF_INT_ENABLE	0x8C0
+#define NPS_ENET_REG_BUF_INT_CAUSE	0x8C4
+#define NPS_ENET_REG_GE_MAC_CFG_0	0x1000
+#define NPS_ENET_REG_GE_MAC_CFG_1	0x1004
+#define NPS_ENET_REG_GE_MAC_CFG_2	0x1008
+#define NPS_ENET_REG_GE_MAC_CFG_3	0x100C
+#define NPS_ENET_REG_GE_RST		0x1400
+#define NPS_ENET_REG_PHASE_FIFO_CTL	0x1404
+
+/* Tx control register */
+struct nps_enet_tx_ctl {
+	union {
+		/* ct: SW sets to indicate frame ready in Tx buffer for
+		 *     transmission. HW resets to when transmission done
+		 * et: Transmit error
+		 * nt: Length in bytes of Tx frame loaded to Tx buffer
+		 */
+		struct {
+			u32
+			__reserved_1:16,
+			ct:1,
+			et:1,
+			__reserved_2:3,
+			nt:11;
+		};
+
+		u32 value;
+	};
+};
+
+/* Rx control register */
+struct nps_enet_rx_ctl {
+	union {
+		/* cr:  HW sets to indicate frame ready in Rx buffer.
+		 *      SW resets to indicate host read received frame
+		 *      and new frames can be written to Rx buffer
+		 * er:  Rx error indication
+		 * crc: Rx CRC error indication
+		 * nr:  Length in bytes of Rx frame loaded by MAC to Rx buffer
+		 */
+		struct {
+			u32
+			__reserved_1:16,
+			cr:1,
+			er:1,
+			crc:1,
+			__reserved_2:2,
+			nr:11;
+		};
+
+		u32 value;
+	};
+};
+
+/* Interrupt enable for data buffer events register */
+struct nps_enet_buf_int_enable {
+	union {
+		/* tx_done: Interrupt generation in the case when new frame
+		 *          is ready in Rx buffer
+		 * rx_rdy:  Interrupt generation in the case when current frame
+		 *          was read from TX buffer
+		 */
+		struct {
+			u32
+			__reserved:30,
+			tx_done:1,
+			rx_rdy:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Interrupt cause for data buffer events register */
+struct nps_enet_buf_int_cause {
+	union {
+		/* tx_done: Interrupt in the case when current frame was
+		 *          read from TX buffer.
+		 * rx_rdy:  Interrupt in the case when new frame is ready
+		 *          in RX buffer.
+		 */
+		struct {
+			u32
+			__reserved:30,
+			tx_done:1,
+			rx_rdy:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 0 register */
+struct nps_enet_ge_mac_cfg_0 {
+	union {
+		/* tx_pr_len:          Transmit preamble length in bytes
+		 * tx_ifg_nib:         Tx idle pattern
+		 * nib_mode:           Nibble (4-bit) Mode
+		 * rx_pr_check_en:     Receive preamble Check Enable
+		 * tx_ifg:             Transmit inter-Frame Gap
+		 * rx_ifg:             Receive inter-Frame Gap
+		 * tx_fc_retr:         Transmit Flow Control Retransmit Mode
+		 * rx_length_check_en: Receive Length Check Enable
+		 * rx_crc_ignore:      Results of the CRC check are ignored
+		 * rx_crc_strip:       MAC strips the CRC from received frames
+		 * rx_fc_en:           Receive Flow Control Enable
+		 * tx_crc_en:          Transmit CRC Enabled
+		 * tx_pad_en:          Transmit Padding Enable
+		 * tx_cf_en:           Transmit Flow Control Enable
+		 * tx_en:              Transmit Enable
+		 * rx_en:              Receive Enable
+		 */
+		struct {
+			u32
+			tx_pr_len:4,
+			tx_ifg_nib:4,
+			nib_mode:1,
+			rx_pr_check_en:1,
+			tx_ifg:6,
+			rx_ifg:4,
+			tx_fc_retr:3,
+			rx_length_check_en:1,
+			rx_crc_ignore:1,
+			rx_crc_strip:1,
+			rx_fc_en:1,
+			tx_crc_en:1,
+			tx_pad_en:1,
+			tx_fc_en:1,
+			tx_en:1,
+			rx_en:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 1 register */
+struct nps_enet_ge_mac_cfg_1 {
+	union {
+		/* octet_3: MAC address octet 3
+		 * octet_2: MAC address octet 2
+		 * octet_1: MAC address octet 1
+		 * octet_0: MAC address octet 0
+		 */
+		struct {
+			u32
+			octet_3:8,
+			octet_2:8,
+			octet_1:8,
+			octet_0:8;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 2 register */
+struct nps_enet_ge_mac_cfg_2 {
+	union {
+		/* transmit_flush_en: MAC flush enable
+		 * stat_en:           RMON statistics interface enable
+		 * disc_da:           Discard frames with DA different
+		 *                    from MAC address
+		 * disc_bc:           Discard broadcast frames
+		 * disc_mc:           Discard multicast frames
+		 * octet_5:           MAC address octet 5
+		 * octet_4:           MAC address octet 4
+		 */
+		struct {
+			u32
+			transmit_flush_en:1,
+			__reserved_1:5,
+			stat_en:2,
+			__reserved_2:1,
+			disc_da:1,
+			disc_bc:1,
+			disc_mc:1,
+			__reserved_3:4,
+			octet_5:8,
+			octet_4:8;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 3 register */
+struct nps_enet_ge_mac_cfg_3 {
+	union {
+		/* ext_oob_cbfc_sel:  Selects one of the 4 profiles for
+		 *                    extended OOB in-flow-control indication
+		 * max_len:           Maximum receive frame length in bytes
+		 * tx_cbfc_en:        Enable transmission of class-based
+		 *                    flow control packets
+		 * rx_ifg_th:         Threshold for IFG status reporting via OOB
+		 * cf_timeout:        Configurable time to decrement FC counters
+		 * cf_drop:           Drop control frames
+		 * redirect_cbfc_sel: Selects one of CBFC redirect profiles
+		 * rx_cbfc_redir_en:  Enable Rx class-based flow
+		 *                    control redirect
+		 * rx_cbfc_en:        Enable Rx class-based flow control
+		 * tm_hd_mode:        TM header mode
+		 */
+		struct {
+			u32
+			ext_oob_cbfc_sel:2,
+			max_len:14,
+			tx_cbfc_en:1,
+			rx_ifg_th:5,
+			cf_timeout:4,
+			cf_drop:1,
+			redirect_cbfc_sel:2,
+			rx_cbfc_redir_en:1,
+			rx_cbfc_en:1,
+			tm_hd_mode:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* GE MAC, PCS reset control register */
+struct nps_enet_ge_rst {
+	union {
+		/* gmac_0: GE MAC reset
+		 * spcs_0: SGMII PCS reset
+		 */
+		struct {
+			u32
+			__reserved_1:23,
+			gmac_0:1,
+			__reserved_2:7,
+			spcs_0:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Tx phase sync FIFO control register */
+struct nps_enet_phase_fifo_ctl {
+	union {
+		/* init: initialize serdes TX phase sync FIFO pointers
+		 * rst:  reset serdes TX phase sync FIFO
+		 */
+		struct {
+			u32
+			__reserved:30,
+			init:1,
+			rst:1;
+		};
+
+		u32 value;
+	};
+};
+
+/**
+ * struct nps_enet_priv - Storage of ENET's private information.
+ * @regs_base:      Base address of ENET memory-mapped control registers.
+ * @irq:            For RX/TX IRQ number.
+ * @tx_packet_sent: SW indication if frame is being sent.
+ * @tx_skb:         socket buffer of sent frame.
+ * @napi:           Structure for NAPI.
+ */
+struct nps_enet_priv {
+	void __iomem *regs_base;
+	s32 irq;
+	bool tx_packet_sent;
+	struct sk_buff *tx_skb;
+	struct napi_struct napi;
+	struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 ge_mac_cfg_3;
+};
+
+/**
+ * nps_reg_set - Sets ENET register with provided value.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ * @value:      Value to set in register.
+ */
+static inline void nps_enet_reg_set(struct nps_enet_priv *priv,
+				    s32 reg, s32 value)
+{
+	iowrite32be(value, priv->regs_base + reg);
+}
+
+/**
+ * nps_reg_get - Gets value of specified ENET register.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ *
+ * returns:     Value of requested register.
+ */
+static inline u32 nps_enet_reg_get(struct nps_enet_priv *priv, s32 reg)
+{
+	return ioread32be(priv->regs_base + reg);
+}
+
+#endif /* _NPS_ENET_H */
-- 
1.7.1


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* Re: [PATCH v5] NET: Add ezchip ethernet driver
  2015-06-16 14:35       ` [PATCH v5] " Noam Camus
@ 2015-06-21 16:22           ` David Miller
  2015-06-22 17:45           ` Mahesh Bandewar
  2015-06-22 20:51           ` Noam Camus
  2 siblings, 0 replies; 28+ messages in thread
From: David Miller @ 2015-06-21 16:22 UTC (permalink / raw)
  To: noamc
  Cc: netdev, linux-kernel, Alexey.Brodkin, vgupta, giladb, cmetcalf, talz

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: Text/Plain; charset=iso-8859-7, Size: 1718 bytes --]

From: Noam Camus <noamc@ezchip.com>
Date: Tue, 16 Jun 2015 17:35:42 +0300

> From: Noam Camus <noamc@ezchip.com>
> 
> Simple LAN device for debug or management purposes.
> Device supports interrupts for RX and TX(completion).
> Device does not have DMA ability.
> 
> Signed-off-by: Noam Camus <noamc@ezchip.com>
> Signed-off-by: Tal Zilcer <talz@ezchip.com>
> Acked-by: Alexey Brodkin <abrodkin@synopsys.com>

This builds with several warnings and also doesn't compile.

drivers/net/ethernet/ezchip/nps_enet.c: In function ¡nps_enet_read_rx_fifo¢:
drivers/net/ethernet/ezchip/nps_enet.c:43:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
drivers/net/ethernet/ezchip/nps_enet.c:43:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
drivers/net/ethernet/ezchip/nps_enet.c: In function ¡nps_enet_send_frame¢:
drivers/net/ethernet/ezchip/nps_enet.c:366:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
drivers/net/ethernet/ezchip/nps_enet.c:366:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
drivers/net/ethernet/ezchip/nps_enet.c: In function ¡nps_enet_poll_controller¢:
drivers/net/ethernet/ezchip/nps_enet.c:535:2: error: implicit declaration of function ¡nps_enet_board_irq_handler¢ [-Werror=implicit-function-declaration]
cc1: some warnings being treated as errors

I do not even see where npe_enet_board_irq_handler could possible be defined.

It is quite infuriating to receive a patch like this which is claimed
to be complete and ready to be applied to my tree, yet it is very
clearly not.
ÿôèº{.nÇ+‰·Ÿ®‰­†+%ŠËÿ±éݶ\x17¥Šwÿº{.nÇ+‰·¥Š{±þG«éÿŠsåy«\x1e­æ¶\x17…\x01\x06­†ÛiÿÿðÃ\x0fí»\x1fè®\x0få’i\x7f

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v5] NET: Add ezchip ethernet driver
@ 2015-06-21 16:22           ` David Miller
  0 siblings, 0 replies; 28+ messages in thread
From: David Miller @ 2015-06-21 16:22 UTC (permalink / raw)
  To: noamc
  Cc: netdev, linux-kernel, Alexey.Brodkin, vgupta, giladb, cmetcalf, talz

From: Noam Camus <noamc@ezchip.com>
Date: Tue, 16 Jun 2015 17:35:42 +0300

> From: Noam Camus <noamc@ezchip.com>
> 
> Simple LAN device for debug or management purposes.
> Device supports interrupts for RX and TX(completion).
> Device does not have DMA ability.
> 
> Signed-off-by: Noam Camus <noamc@ezchip.com>
> Signed-off-by: Tal Zilcer <talz@ezchip.com>
> Acked-by: Alexey Brodkin <abrodkin@synopsys.com>

This builds with several warnings and also doesn't compile.

drivers/net/ethernet/ezchip/nps_enet.c: In function ‘nps_enet_read_rx_fifo’:
drivers/net/ethernet/ezchip/nps_enet.c:43:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
drivers/net/ethernet/ezchip/nps_enet.c:43:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
drivers/net/ethernet/ezchip/nps_enet.c: In function ‘nps_enet_send_frame’:
drivers/net/ethernet/ezchip/nps_enet.c:366:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
drivers/net/ethernet/ezchip/nps_enet.c:366:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
drivers/net/ethernet/ezchip/nps_enet.c: In function ‘nps_enet_poll_controller’:
drivers/net/ethernet/ezchip/nps_enet.c:535:2: error: implicit declaration of function ‘nps_enet_board_irq_handler’ [-Werror=implicit-function-declaration]
cc1: some warnings being treated as errors

I do not even see where npe_enet_board_irq_handler could possible be defined.

It is quite infuriating to receive a patch like this which is claimed
to be complete and ready to be applied to my tree, yet it is very
clearly not.

^ permalink raw reply	[flat|nested] 28+ messages in thread

* RE: [PATCH v5] NET: Add ezchip ethernet driver
  2015-06-21 16:22           ` David Miller
@ 2015-06-22 14:52             ` Noam Camus
  -1 siblings, 0 replies; 28+ messages in thread
From: Noam Camus @ 2015-06-22 14:52 UTC (permalink / raw)
  To: David Miller
  Cc: netdev, linux-kernel, Alexey.Brodkin, vgupta, Gilad Ben Yossef,
	Chris Metcalf, Tal Zilcer

From: David Miller [mailto:davem@davemloft.net] 
Sent: Sunday, June 21, 2015 7:22 PM

> This builds with several warnings and also doesn't compile.
>
> drivers/net/ethernet/ezchip/nps_enet.c: In function ‘nps_enet_read_rx_fifo’:
> drivers/net/ethernet/ezchip/nps_enet.c:43:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
> drivers/net/ethernet/ezchip/nps_enet.c:43:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
> drivers/net/ethernet/ezchip/nps_enet.c: In function ‘nps_enet_send_frame’:
> drivers/net/ethernet/ezchip/nps_enet.c:366:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
> drivers/net/ethernet/ezchip/nps_enet.c:366:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
Once I start to use newer GCC (5.1.1) I get those as well. My previous GCC (4.8) did not report them.

> drivers/net/ethernet/ezchip/nps_enet.c: In function ‘nps_enet_poll_controller’:
> drivers/net/ethernet/ezchip/nps_enet.c:535:2: error: implicit declaration of function ‘nps_enet_board_irq_handler’ [-Werror=implicit-function-declaration]
cc1: some warnings being treated as errors
My configuration lacked the CONFIG_NET_POLL_CONTROLLER this is why I missed this typo caused due to renaming. I added CONFIG_NETCONSOLE to my configuration, now GCC report this error as well.

> I do not even see where npe_enet_board_irq_handler could possible be defined.
It was renamed: nps_enet_board_irq_handler -> nps_enet_irq_handler (I removed the _board).

> It is quite infuriating to receive a patch like this which is claimed to be complete and ready to be applied to my tree, yet it is very clearly not.
My sincerest apologies  for any problem I have made. I will send another version that will be worth applying to your tree.

Noam
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
Please read the FAQ at  http://www.tux.org/lkml/

^ permalink raw reply	[flat|nested] 28+ messages in thread

* RE: [PATCH v5] NET: Add ezchip ethernet driver
@ 2015-06-22 14:52             ` Noam Camus
  0 siblings, 0 replies; 28+ messages in thread
From: Noam Camus @ 2015-06-22 14:52 UTC (permalink / raw)
  To: David Miller
  Cc: netdev, linux-kernel, Alexey.Brodkin, vgupta, Gilad Ben Yossef,
	Chris Metcalf, Tal Zilcer

From: David Miller [mailto:davem@davemloft.net] 
Sent: Sunday, June 21, 2015 7:22 PM

> This builds with several warnings and also doesn't compile.
>
> drivers/net/ethernet/ezchip/nps_enet.c: In function ‘nps_enet_read_rx_fifo’:
> drivers/net/ethernet/ezchip/nps_enet.c:43:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
> drivers/net/ethernet/ezchip/nps_enet.c:43:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
> drivers/net/ethernet/ezchip/nps_enet.c: In function ‘nps_enet_send_frame’:
> drivers/net/ethernet/ezchip/nps_enet.c:366:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
> drivers/net/ethernet/ezchip/nps_enet.c:366:24: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
Once I start to use newer GCC (5.1.1) I get those as well. My previous GCC (4.8) did not report them.

> drivers/net/ethernet/ezchip/nps_enet.c: In function ‘nps_enet_poll_controller’:
> drivers/net/ethernet/ezchip/nps_enet.c:535:2: error: implicit declaration of function ‘nps_enet_board_irq_handler’ [-Werror=implicit-function-declaration]
cc1: some warnings being treated as errors
My configuration lacked the CONFIG_NET_POLL_CONTROLLER this is why I missed this typo caused due to renaming. I added CONFIG_NETCONSOLE to my configuration, now GCC report this error as well.

> I do not even see where npe_enet_board_irq_handler could possible be defined.
It was renamed: nps_enet_board_irq_handler -> nps_enet_irq_handler (I removed the _board).

> It is quite infuriating to receive a patch like this which is claimed to be complete and ready to be applied to my tree, yet it is very clearly not.
My sincerest apologies  for any problem I have made. I will send another version that will be worth applying to your tree.

Noam

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v5] NET: Add ezchip ethernet driver
  2015-06-16 14:35       ` [PATCH v5] " Noam Camus
@ 2015-06-22 17:45           ` Mahesh Bandewar
  2015-06-22 17:45           ` Mahesh Bandewar
  2015-06-22 20:51           ` Noam Camus
  2 siblings, 0 replies; 28+ messages in thread
From: Mahesh Bandewar @ 2015-06-22 17:45 UTC (permalink / raw)
  To: Noam Camus
  Cc: linux-netdev, linux-kernel, Alexey.Brodkin, vgupta, giladb,
	cmetcalf, Tal Zilcer

On Tue, Jun 16, 2015 at 7:35 AM, Noam Camus <noamc@ezchip.com> wrote:
>
> From: Noam Camus <noamc@ezchip.com>
>
> Simple LAN device for debug or management purposes.
> Device supports interrupts for RX and TX(completion).
> Device does not have DMA ability.
>
> Signed-off-by: Noam Camus <noamc@ezchip.com>
> Signed-off-by: Tal Zilcer <talz@ezchip.com>
> Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
> ---
> Change log for v5:
> Basically its all based on Florian comments.
> Main items are:
> 1) Move all interrupt chore to bottom-half
> 2) use memcpy_toio/fromio
> 3) dev_kfree_skb() moved to bottom-half
> 4) add set_rx_mode callback
> 5) use platform api toward non-DT platforms
> ---
>  .../devicetree/bindings/net/ezchip_enet.txt        |   15 +
>  drivers/net/ethernet/Kconfig                       |    1 +
>  drivers/net/ethernet/Makefile                      |    1 +
>  drivers/net/ethernet/ezchip/Kconfig                |   27 +
>  drivers/net/ethernet/ezchip/Makefile               |    1 +
>  drivers/net/ethernet/ezchip/nps_enet.c             |  652 ++++++++++++++++++++
>  drivers/net/ethernet/ezchip/nps_enet.h             |  336 ++++++++++
>  7 files changed, 1033 insertions(+), 0 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/net/ezchip_enet.txt
>  create mode 100644 drivers/net/ethernet/ezchip/Kconfig
>  create mode 100644 drivers/net/ethernet/ezchip/Makefile
>  create mode 100644 drivers/net/ethernet/ezchip/nps_enet.c
>  create mode 100644 drivers/net/ethernet/ezchip/nps_enet.h
>
> diff --git a/Documentation/devicetree/bindings/net/ezchip_enet.txt b/Documentation/devicetree/bindings/net/ezchip_enet.txt
> new file mode 100644
> index 0000000..4e29b2b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/ezchip_enet.txt
> @@ -0,0 +1,15 @@
> +* EZchip NPS Management Ethernet port driver
> +
> +Required properties:
> +- compatible: Should be "ezchip,nps-mgt-enet"
> +- reg: Address and length of the register set for the device
> +- interrupts: Should contain the ENET interrupt
> +
> +Examples:
> +
> +       ethernet@f0003000 {
> +               compatible = "ezchip,nps-mgt-enet";
> +               reg = <0xf0003000 0x44>;
> +               interrupts = <7>;
> +               mac-address = [ 00 11 22 33 44 55 ];
> +       };
> diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
> index eadcb05..1a6b1ba 100644
> --- a/drivers/net/ethernet/Kconfig
> +++ b/drivers/net/ethernet/Kconfig
> @@ -66,6 +66,7 @@ config DNET
>  source "drivers/net/ethernet/dec/Kconfig"
>  source "drivers/net/ethernet/dlink/Kconfig"
>  source "drivers/net/ethernet/emulex/Kconfig"
> +source "drivers/net/ethernet/ezchip/Kconfig"
>  source "drivers/net/ethernet/neterion/Kconfig"
>  source "drivers/net/ethernet/faraday/Kconfig"
>  source "drivers/net/ethernet/freescale/Kconfig"
> diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
> index 1367afc..489f9cc 100644
> --- a/drivers/net/ethernet/Makefile
> +++ b/drivers/net/ethernet/Makefile
> @@ -29,6 +29,7 @@ obj-$(CONFIG_DNET) += dnet.o
>  obj-$(CONFIG_NET_VENDOR_DEC) += dec/
>  obj-$(CONFIG_NET_VENDOR_DLINK) += dlink/
>  obj-$(CONFIG_NET_VENDOR_EMULEX) += emulex/
> +obj-$(CONFIG_NET_VENDOR_EZCHIP) += ezchip/
>  obj-$(CONFIG_NET_VENDOR_EXAR) += neterion/
>  obj-$(CONFIG_NET_VENDOR_FARADAY) += faraday/
>  obj-$(CONFIG_NET_VENDOR_FREESCALE) += freescale/
> diff --git a/drivers/net/ethernet/ezchip/Kconfig b/drivers/net/ethernet/ezchip/Kconfig
> new file mode 100644
> index 0000000..d031177
> --- /dev/null
> +++ b/drivers/net/ethernet/ezchip/Kconfig
> @@ -0,0 +1,27 @@
> +#
> +# EZchip network device configuration
> +#
> +
> +config NET_VENDOR_EZCHIP
> +       bool "EZchip devices"
> +       default y
>
Why this has to be included in the default build? Shouldn't it be
either "m" or "N" by default?

> +       ---help---
> +         If you have a network (Ethernet) device belonging to this class, say Y
> +         and read the Ethernet-HOWTO, available from
> +         <http://www.tldp.org/docs.html#howto>.
> +
> +         Note that the answer to this question doesn't directly affect the
> +         kernel: saying N will just cause the configurator to skip all
> +         the questions about EZchip devices. If you say Y, you will be asked for
> +         your specific device in the following questions.
> +
> +if NET_VENDOR_EZCHIP
> +
> +config EZCHIP_NPS_MANAGEMENT_ENET
> +       tristate "EZchip NPS management enet support"
> +       ---help---
> +         Simple LAN device for debug or management purposes.
> +         Device supports interrupts for RX and TX(completion).
> +         Device does not have DMA ability.
> +
> +endif
> diff --git a/drivers/net/ethernet/ezchip/Makefile b/drivers/net/ethernet/ezchip/Makefile
> new file mode 100644
> index 0000000..e490176
> --- /dev/null
> +++ b/drivers/net/ethernet/ezchip/Makefile
> @@ -0,0 +1 @@
> +obj-$(CONFIG_EZCHIP_NPS_MANAGEMENT_ENET) += nps_enet.o
> diff --git a/drivers/net/ethernet/ezchip/nps_enet.c b/drivers/net/ethernet/ezchip/nps_enet.c
> new file mode 100644
> index 0000000..df3d5b0
> --- /dev/null
> +++ b/drivers/net/ethernet/ezchip/nps_enet.c
> @@ -0,0 +1,652 @@
> +/*
> + * Copyright(c) 2015 EZchip Technologies.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + * The full GNU General Public License is included in this distribution in
> + * the file called "COPYING".
> + */
> +
> +#include <linux/module.h>
> +#include <linux/etherdevice.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/of_net.h>
> +#include <linux/of_platform.h>
> +#include "nps_enet.h"
> +
> +#define DRV_NAME                       "nps_mgt_enet"
> +
> +static void nps_enet_clean_rx_fifo(struct net_device *ndev, u32 frame_len)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       u32 i, len = DIV_ROUND_UP(frame_len, sizeof(u32));
> +
> +       /* Empty Rx FIFO buffer by reading all words */
> +       for (i = 0; i < len; i++)
> +               nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
> +}
> +
> +static void nps_enet_read_rx_fifo(struct net_device *ndev,
> +                                 unsigned char *dst, u32 length)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       s32 i, last = length & (sizeof(u32) - 1);
> +       u32 *reg = (u32 *)dst, len = length / sizeof(u32);
> +       bool dst_is_aligned = IS_ALIGNED((u32)dst, sizeof(u32));
> +
> +       /* In case dst is not aligned we need an intermediate buffer */
> +       if (dst_is_aligned)
> +               for (i = 0; i < len; i++, reg++)
> +                       *reg = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
> +       else { /* !dst_is_aligned */
> +               for (i = 0; i < len; i++, reg++) {
> +                       u32 buf =
> +                               nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
> +
> +                       /* to accommodate word-unaligned address of "reg"
> +                        * we have to do memcpy_toio() instead of simple "=".
> +                        */
> +                       memcpy_toio(reg, &buf, sizeof(buf));
> +               }
> +       }
> +
> +       /* copy last bytes (if any) */
> +       if (last) {
> +               u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
> +
> +               memcpy_toio(reg, &buf, last);
> +       }
> +}
> +
> +static u32 nps_enet_rx_handler(struct net_device *ndev)
> +{
> +       u32 frame_len, err = 0;
> +       u32 work_done = 0;
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct sk_buff *skb;
> +       struct nps_enet_rx_ctl rx_ctrl;
> +
> +       rx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_RX_CTL);
> +       frame_len = rx_ctrl.nr;
> +
> +       /* Check if we got RX */
> +       if (!rx_ctrl.cr)
> +               return work_done;
> +
> +       /* If we got here there is a work for us */
> +       work_done++;
> +
> +       /* Check Rx error */
> +       if (rx_ctrl.er) {
> +               ndev->stats.rx_errors++;
> +               err = 1;
> +       }
> +
> +       /* Check Rx CRC error */
> +       if (rx_ctrl.crc) {
> +               ndev->stats.rx_crc_errors++;
> +               ndev->stats.rx_dropped++;
> +               err = 1;
> +       }
> +
> +       /* Check Frame length Min 64b */
> +       if (unlikely(frame_len < ETH_ZLEN)) {
> +               ndev->stats.rx_length_errors++;
> +               ndev->stats.rx_dropped++;
> +               err = 1;
> +       }
> +
> +       if (err)
> +               goto rx_irq_clean;
> +
> +       /* Skb allocation */
> +       skb = netdev_alloc_skb_ip_align(ndev, frame_len);
> +       if (unlikely(!skb)) {
> +               ndev->stats.rx_errors++;
> +               ndev->stats.rx_dropped++;
> +               goto rx_irq_clean;
> +       }
> +
> +       /* Copy frame from Rx fifo into the skb */
> +       nps_enet_read_rx_fifo(ndev, skb->data, frame_len);
> +
> +       skb_put(skb, frame_len);
> +       skb->protocol = eth_type_trans(skb, ndev);
> +       skb->ip_summed = CHECKSUM_UNNECESSARY;
> +
> +       ndev->stats.rx_packets++;
> +       ndev->stats.rx_bytes += frame_len;
> +       netif_receive_skb(skb);
> +
> +       goto rx_irq_frame_done;
> +
> +rx_irq_clean:
> +       /* Clean Rx fifo */
> +       nps_enet_clean_rx_fifo(ndev, frame_len);
> +
> +rx_irq_frame_done:
> +       /* Ack Rx ctrl register */
> +       nps_enet_reg_set(priv, NPS_ENET_REG_RX_CTL, 0);
> +
> +       return work_done;
> +}
> +
> +static void nps_enet_tx_handler(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_tx_ctl tx_ctrl;
> +
> +       tx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_TX_CTL);
> +
> +       /* Check if we got TX */
> +       if (!priv->tx_packet_sent || tx_ctrl.ct)
> +               return;
> +
> +       /* Check Tx transmit error */
> +       if (unlikely(tx_ctrl.et)) {
> +               ndev->stats.tx_errors++;
> +       } else {
> +               ndev->stats.tx_packets++;
> +               ndev->stats.tx_bytes += tx_ctrl.nt;
> +       }
> +
> +       if (priv->tx_skb) {
> +               dev_kfree_skb(priv->tx_skb);
> +               priv->tx_skb = NULL;
> +       }
> +
> +       priv->tx_packet_sent = false;
> +
> +       if (netif_queue_stopped(ndev))
> +               netif_wake_queue(ndev);
> +}
> +
> +/**
> + * nps_enet_poll - NAPI poll handler.
> + * @napi:       Pointer to napi_struct structure.
> + * @budget:     How many frames to process on one call.
> + *
> + * returns:     Number of processed frames
> + */
> +static int nps_enet_poll(struct napi_struct *napi, int budget)
> +{
> +       struct net_device *ndev = napi->dev;
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_buf_int_enable buf_int_enable = {
> +               .rx_rdy = NPS_ENET_ENABLE,
> +               .tx_done = NPS_ENET_ENABLE,};
> +       u32 work_done;
> +
> +       nps_enet_tx_handler(ndev);
> +       work_done = nps_enet_rx_handler(ndev);
> +       if (work_done < budget) {
> +               napi_complete(napi);
> +               nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
> +                                buf_int_enable.value);
> +       }
> +
> +       return work_done;
> +}
> +
> +/**
> + * nps_enet_irq_handler - Global interrupt handler for ENET.
> + * @irq:                irq number.
> + * @dev_instance:       device instance.
> + *
> + * returns: IRQ_HANDLED for all cases.
> + *
> + * EZchip ENET has 2 interrupt causes, and depending on bits raised in
> + * CTRL registers we may tell what is a reason for interrupt to fire up.
> + * We got one for RX and the other for TX (completion).
> + */
> +static irqreturn_t nps_enet_irq_handler(s32 irq, void *dev_instance)
> +{
> +       struct net_device *ndev = dev_instance;
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_buf_int_cause buf_int_cause;
> +
> +       buf_int_cause.value =
> +                       nps_enet_reg_get(priv, NPS_ENET_REG_BUF_INT_CAUSE);
> +
> +       if (buf_int_cause.tx_done || buf_int_cause.rx_rdy)
> +               if (likely(napi_schedule_prep(&priv->napi))) {
> +                       nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
> +                       __napi_schedule(&priv->napi);
> +               }
> +
> +       return IRQ_HANDLED;
> +}
> +
> +static void nps_enet_set_hw_mac_address(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_ge_mac_cfg_1 ge_mac_cfg_1;
> +       struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
> +
> +       /* set MAC address in HW */
> +       ge_mac_cfg_1.octet_0 = ndev->dev_addr[0];
> +       ge_mac_cfg_1.octet_1 = ndev->dev_addr[1];
> +       ge_mac_cfg_1.octet_2 = ndev->dev_addr[2];
> +       ge_mac_cfg_1.octet_3 = ndev->dev_addr[3];
> +       ge_mac_cfg_2->octet_4 = ndev->dev_addr[4];
> +       ge_mac_cfg_2->octet_5 = ndev->dev_addr[5];
> +
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_1,
> +                        ge_mac_cfg_1.value);
> +
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
> +                        ge_mac_cfg_2->value);
> +}
> +
> +/**
> + * nps_enet_hw_reset - Reset the network device.
> + * @ndev:       Pointer to the network device.
> + *
> + * This function reset the PCS and TX fifo.
> + * The programming model is to set the relevant reset bits
> + * wait for some time for this to propagate and then unset
> + * the reset bits. This way we ensure that reset procedure
> + * is done successfully by device.
> + */
> +static void nps_enet_hw_reset(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_ge_rst ge_rst = {.value = 0};
> +       struct nps_enet_phase_fifo_ctl phase_fifo_ctl = {.value = 0};
> +
> +       /* Pcs reset sequence*/
> +       ge_rst.gmac_0 = NPS_ENET_ENABLE;
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
> +       usleep_range(10, 20);
> +       ge_rst.value = 0;
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
> +
> +       /* Tx fifo reset sequence */
> +       phase_fifo_ctl.rst = NPS_ENET_ENABLE;
> +       phase_fifo_ctl.init = NPS_ENET_ENABLE;
> +       nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
> +                        phase_fifo_ctl.value);
> +       usleep_range(10, 20);
> +       phase_fifo_ctl.value = 0;
> +       nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
> +                        phase_fifo_ctl.value);
> +}
> +
> +static void nps_enet_hw_enable_control(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_ge_mac_cfg_0 ge_mac_cfg_0 = { .value = 0 };
> +       struct nps_enet_buf_int_enable buf_int_enable = { .value = 0 };
> +       struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
> +       struct nps_enet_ge_mac_cfg_3 *ge_mac_cfg_3 = &priv->ge_mac_cfg_3;
> +       s32 max_frame_length;
> +
> +       /* Enable Rx and Tx statistics */
> +       ge_mac_cfg_2->stat_en = NPS_ENET_GE_MAC_CFG_2_STAT_EN;
> +
> +       /* Discard packets with different MAC address */
> +       ge_mac_cfg_2->disc_da = NPS_ENET_ENABLE;
> +
> +       /* Discard multicast packets */
> +       ge_mac_cfg_2->disc_mc = NPS_ENET_ENABLE;
> +
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
> +                        ge_mac_cfg_2->value);
> +
> +       /* Discard Packets bigger than max frame length */
> +       max_frame_length = ETH_HLEN + ndev->mtu + ETH_FCS_LEN;
> +       if (max_frame_length <= NPS_ENET_MAX_FRAME_LENGTH) {
> +               ge_mac_cfg_3->max_len = max_frame_length;
> +               nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_3,
> +                                ge_mac_cfg_3->value);
> +       }
> +
> +       /* Enable interrupts */
> +       buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
> +       buf_int_enable.tx_done = NPS_ENET_ENABLE;
> +       nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
> +                        buf_int_enable.value);
> +
> +       /* Write device MAC address to HW */
> +       nps_enet_set_hw_mac_address(ndev);
> +
> +       /* Rx and Tx HW features */
> +       ge_mac_cfg_0.tx_pad_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.tx_crc_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.rx_crc_strip = NPS_ENET_ENABLE;
> +
> +       /* IFG configuration */
> +       ge_mac_cfg_0.rx_ifg = NPS_ENET_GE_MAC_CFG_0_RX_IFG;
> +       ge_mac_cfg_0.tx_ifg = NPS_ENET_GE_MAC_CFG_0_TX_IFG;
> +
> +       /* preamble configuration */
> +       ge_mac_cfg_0.rx_pr_check_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.tx_pr_len = NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN;
> +
> +       /* enable flow control frames */
> +       ge_mac_cfg_0.tx_fc_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.rx_fc_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.tx_fc_retr = NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR;
> +
> +       /* Enable Rx and Tx */
> +       ge_mac_cfg_0.rx_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.tx_en = NPS_ENET_ENABLE;
> +
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0,
> +                        ge_mac_cfg_0.value);
> +}
> +
> +static void nps_enet_hw_disable_control(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +
> +       /* Disable interrupts */
> +       nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
> +
> +       /* Disable Rx and Tx */
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0, 0);
> +}
> +
> +static void nps_enet_send_frame(struct net_device *ndev,
> +                               struct sk_buff *skb)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_tx_ctl tx_ctrl = { .value = 0 };
> +       short length = skb->len;
> +       u32 i, len = DIV_ROUND_UP(length, sizeof(u32));
> +       u32 *src = (u32 *)virt_to_phys(skb->data);
> +       bool src_is_aligned = IS_ALIGNED((u32)src, sizeof(u32));
> +
> +       /* In case src is not aligned we need an intermediate buffer */
> +       if (src_is_aligned)
> +               for (i = 0; i < len; i++, src++)
> +                       nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, *src);
> +       else { /* !src_is_aligned */
> +               for (i = 0; i < len; i++, src++) {
> +                       u32 buf;
> +
> +                       /* to accommodate word-unaligned address of "src"
> +                        * we have to do memcpy_fromio() instead of simple "="
> +                        */
> +                       memcpy_fromio(&buf, src, sizeof(buf));
> +                       nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, buf);
> +               }
> +       }
> +       /* Write the length of the Frame */
> +       tx_ctrl.nt = length;
> +
> +       /* Indicate SW is done */
> +       priv->tx_packet_sent = true;
> +       tx_ctrl.ct = NPS_ENET_ENABLE;
> +
> +       /* Send Frame */
> +       nps_enet_reg_set(priv, NPS_ENET_REG_TX_CTL, tx_ctrl.value);
> +}
> +
> +/**
> + * nps_enet_set_mac_address - Set the MAC address for this device.
> + * @ndev:       Pointer to net_device structure.
> + * @p:          6 byte Address to be written as MAC address.
> + *
> + * This function copies the HW address from the sockaddr structure to the
> + * net_device structure and updates the address in HW.
> + *
> + * returns:     -EBUSY if the net device is busy or 0 if the address is set
> + *              successfully.
> + */
> +static s32 nps_enet_set_mac_address(struct net_device *ndev, void *p)
> +{
> +       struct sockaddr *addr = p;
> +       s32 res;
> +
> +       if (netif_running(ndev))
> +               return -EBUSY;
> +
> +       res = eth_mac_addr(ndev, p);
> +       if (!res) {
> +               ether_addr_copy(ndev->dev_addr, addr->sa_data);
> +               nps_enet_set_hw_mac_address(ndev);
> +       }
> +
> +       return res;
> +}
> +
> +/**
> + * nps_enet_set_rx_mode - Change the receive filtering mode.
> + * @ndev:       Pointer to the network device.
> + *
> + * This function enables/disables promiscuous mode
> + */
> +static void nps_enet_set_rx_mode(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
> +
> +       ge_mac_cfg_2.value = priv->ge_mac_cfg_2.value;
> +
> +       if (ndev->flags & IFF_PROMISC) {
> +               ge_mac_cfg_2.disc_da = NPS_ENET_DISABLE;
> +               ge_mac_cfg_2.disc_mc = NPS_ENET_DISABLE;
> +       } else {
> +               ge_mac_cfg_2.disc_da = NPS_ENET_ENABLE;
> +               ge_mac_cfg_2.disc_mc = NPS_ENET_ENABLE;
> +       }
> +
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2, ge_mac_cfg_2.value);
> +}
> +
> +/**
> + * nps_enet_open - Open the network device.
> + * @ndev:       Pointer to the network device.
> + *
> + * returns: 0, on success or non-zero error value on failure.
> + *
> + * This function enables an IRQs for the ENET device and starts the Tx queue.
> + */
> +static s32 nps_enet_open(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       s32 err;
> +
> +       /* Reset private variables */
> +       priv->tx_packet_sent = false;
> +       priv->ge_mac_cfg_2.value = 0;
> +       priv->ge_mac_cfg_3.value = 0;
> +
> +       /* ge_mac_cfg_3 default values */
> +       priv->ge_mac_cfg_3.rx_ifg_th = NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH;
> +       priv->ge_mac_cfg_3.max_len = NPS_ENET_GE_MAC_CFG_3_MAX_LEN;
> +
> +       /* Disable HW device */
> +       nps_enet_hw_disable_control(ndev);
> +
> +       /* irq Rx allocation */
> +       err = request_irq(priv->irq, nps_enet_irq_handler,
> +                         0, "enet-rx-tx", ndev);
> +       if (err)
> +               return err;
> +
> +       napi_enable(&priv->napi);
> +
> +       /* Enable HW device */
> +       nps_enet_hw_reset(ndev);
> +       nps_enet_hw_enable_control(ndev);
> +
> +       netif_start_queue(ndev);
> +
> +       return 0;
> +}
> +
> +/**
> + * nps_enet_stop - Close the network device.
> + * @ndev:       Pointer to the network device.
> + *
> + * This function stops the Tx queue, disables interrupts for the ENET device.
> + */
> +static s32 nps_enet_stop(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +
> +       napi_disable(&priv->napi);
> +       netif_stop_queue(ndev);
> +       nps_enet_hw_disable_control(ndev);
> +       free_irq(priv->irq, ndev);
> +
> +       return 0;
> +}
> +
> +/**
> + * nps_enet_start_xmit - Starts the data transmission.
> + * @skb:        sk_buff pointer that contains data to be Transmitted.
> + * @ndev:       Pointer to net_device structure.
> + *
> + * returns: NETDEV_TX_OK, on success
> + *              NETDEV_TX_BUSY, if any of the descriptors are not free.
> + *
> + * This function is invoked from upper layers to initiate transmission.
> + */
> +static netdev_tx_t nps_enet_start_xmit(struct sk_buff *skb,
> +                                      struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +
> +       /* This driver handles one frame at a time  */
> +       netif_stop_queue(ndev);
> +
> +       nps_enet_send_frame(ndev, skb);
> +
> +       priv->tx_skb = skb;
> +
> +       return NETDEV_TX_OK;
> +}
> +
> +#ifdef CONFIG_NET_POLL_CONTROLLER
> +static void nps_enet_poll_controller(struct net_device *ndev)
> +{
> +       disable_irq(ndev->irq);
> +       nps_enet_board_irq_handler(ndev->irq, ndev);
> +       enable_irq(ndev->irq);
> +}
> +#endif
> +
> +static const struct net_device_ops nps_netdev_ops = {
> +       .ndo_open               = nps_enet_open,
> +       .ndo_stop               = nps_enet_stop,
> +       .ndo_start_xmit         = nps_enet_start_xmit,
> +       .ndo_set_mac_address    = nps_enet_set_mac_address,
> +       .ndo_set_rx_mode        = nps_enet_set_rx_mode,
> +#ifdef CONFIG_NET_POLL_CONTROLLER
> +       .ndo_poll_controller    = nps_enet_poll_controller,
> +#endif
> +};
> +
> +static s32 nps_enet_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct net_device *ndev;
> +       struct nps_enet_priv *priv;
> +       s32 err = 0;
> +       const char *mac_addr;
> +       struct resource *res_regs;
> +
> +       if (!dev->of_node)
> +               return -ENODEV;
> +
> +       ndev = alloc_etherdev(sizeof(struct nps_enet_priv));
> +       if (!ndev)
> +               return -ENOMEM;
> +
> +       platform_set_drvdata(pdev, ndev);
> +       SET_NETDEV_DEV(ndev, dev);
> +       priv = netdev_priv(ndev);
> +
> +       /* The EZ NET specific entries in the device structure. */
> +       ndev->netdev_ops = &nps_netdev_ops;
> +       ndev->watchdog_timeo = (400 * HZ / 1000);
> +       /* FIXME :: no multicast support yet */
> +       ndev->flags &= ~IFF_MULTICAST;
> +
> +       res_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +       priv->regs_base = devm_ioremap_resource(dev, res_regs);
> +       if (IS_ERR(priv->regs_base)) {
> +               err = PTR_ERR(priv->regs_base);
> +               goto out_netdev;
> +       }
> +       dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs_base);
> +
> +       /* set kernel MAC address to dev */
> +       mac_addr = of_get_mac_address(dev->of_node);
> +       if (mac_addr)
> +               ether_addr_copy(ndev->dev_addr, mac_addr);
> +       else
> +               eth_hw_addr_random(ndev);
> +
> +       /* Get IRQ number */
> +       priv->irq = platform_get_irq(pdev, 0);
> +       if (!priv->irq) {
> +               dev_err(dev, "failed to retrieve <irq Rx-Tx> value from device tree\n");
> +               err = -ENODEV;
> +               goto out_netdev;
> +       }
> +
> +       netif_napi_add(ndev, &priv->napi, nps_enet_poll, NPS_ENET_NAPI_POLL_WEIGHT);
> +
> +       /* Register the driver. Should be the last thing in probe */
> +       err = register_netdev(ndev);
> +       if (err) {
> +               dev_err(dev, "Failed to register ndev for %s, err = 0x%08x\n",
> +                       ndev->name, (s32)err);
> +               err = -ENODEV;
> +               goto out_netif_api;
> +       }
> +
> +       dev_info(dev, "(rx/tx=%d)\n", priv->irq);
> +       return 0;
> +
> +out_netif_api:
> +       netif_napi_del(&priv->napi);
> +out_netdev:
> +       if (err)
> +               free_netdev(ndev);
> +
> +       return err;
> +}
> +
> +static s32 nps_enet_remove(struct platform_device *pdev)
> +{
> +       struct net_device *ndev = platform_get_drvdata(pdev);
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +
> +       unregister_netdev(ndev);
> +       free_netdev(ndev);
> +       netif_napi_del(&priv->napi);
> +
> +       return 0;
> +}
> +
> +static const struct of_device_id nps_enet_dt_ids[] = {
> +       { .compatible = "ezchip,nps-mgt-enet" },
> +       { /* Sentinel */ }
> +};
> +
> +static struct platform_driver nps_enet_driver = {
> +       .probe = nps_enet_probe,
> +       .remove = nps_enet_remove,
> +       .driver = {
> +               .name = DRV_NAME,
> +               .of_match_table  = nps_enet_dt_ids,
> +       },
> +};
> +
> +module_platform_driver(nps_enet_driver);
> +
> +MODULE_AUTHOR("EZchip Semiconductor");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/net/ethernet/ezchip/nps_enet.h b/drivers/net/ethernet/ezchip/nps_enet.h
> new file mode 100644
> index 0000000..fc45c9d
> --- /dev/null
> +++ b/drivers/net/ethernet/ezchip/nps_enet.h
> @@ -0,0 +1,336 @@
> +/*
> + * Copyright(c) 2015 EZchip Technologies.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + * The full GNU General Public License is included in this distribution in
> + * the file called "COPYING".
> + */
> +
> +#ifndef _NPS_ENET_H
> +#define _NPS_ENET_H
> +
> +/* default values */
> +#define NPS_ENET_NAPI_POLL_WEIGHT              0x2
> +#define NPS_ENET_MAX_FRAME_LENGTH              0x3FFF
> +#define NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR       0x7
> +#define NPS_ENET_GE_MAC_CFG_0_RX_IFG           0x5
> +#define NPS_ENET_GE_MAC_CFG_0_TX_IFG           0xC
> +#define NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN                0x7
> +#define NPS_ENET_GE_MAC_CFG_2_STAT_EN          0x3
> +#define NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH                0x14
> +#define NPS_ENET_GE_MAC_CFG_3_MAX_LEN          0x3FFC
> +#define NPS_ENET_ENABLE                                1
> +#define NPS_ENET_DISABLE                       0
> +
> +/* register definitions  */
> +#define NPS_ENET_REG_TX_CTL            0x800
> +#define NPS_ENET_REG_TX_BUF            0x808
> +#define NPS_ENET_REG_RX_CTL            0x810
> +#define NPS_ENET_REG_RX_BUF            0x818
> +#define NPS_ENET_REG_BUF_INT_ENABLE    0x8C0
> +#define NPS_ENET_REG_BUF_INT_CAUSE     0x8C4
> +#define NPS_ENET_REG_GE_MAC_CFG_0      0x1000
> +#define NPS_ENET_REG_GE_MAC_CFG_1      0x1004
> +#define NPS_ENET_REG_GE_MAC_CFG_2      0x1008
> +#define NPS_ENET_REG_GE_MAC_CFG_3      0x100C
> +#define NPS_ENET_REG_GE_RST            0x1400
> +#define NPS_ENET_REG_PHASE_FIFO_CTL    0x1404
> +
> +/* Tx control register */
> +struct nps_enet_tx_ctl {
> +       union {
> +               /* ct: SW sets to indicate frame ready in Tx buffer for
> +                *     transmission. HW resets to when transmission done
> +                * et: Transmit error
> +                * nt: Length in bytes of Tx frame loaded to Tx buffer
> +                */
> +               struct {
> +                       u32
> +                       __reserved_1:16,
> +                       ct:1,
> +                       et:1,
> +                       __reserved_2:3,
> +                       nt:11;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Rx control register */
> +struct nps_enet_rx_ctl {
> +       union {
> +               /* cr:  HW sets to indicate frame ready in Rx buffer.
> +                *      SW resets to indicate host read received frame
> +                *      and new frames can be written to Rx buffer
> +                * er:  Rx error indication
> +                * crc: Rx CRC error indication
> +                * nr:  Length in bytes of Rx frame loaded by MAC to Rx buffer
> +                */
> +               struct {
> +                       u32
> +                       __reserved_1:16,
> +                       cr:1,
> +                       er:1,
> +                       crc:1,
> +                       __reserved_2:2,
> +                       nr:11;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Interrupt enable for data buffer events register */
> +struct nps_enet_buf_int_enable {
> +       union {
> +               /* tx_done: Interrupt generation in the case when new frame
> +                *          is ready in Rx buffer
> +                * rx_rdy:  Interrupt generation in the case when current frame
> +                *          was read from TX buffer
> +                */
> +               struct {
> +                       u32
> +                       __reserved:30,
> +                       tx_done:1,
> +                       rx_rdy:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Interrupt cause for data buffer events register */
> +struct nps_enet_buf_int_cause {
> +       union {
> +               /* tx_done: Interrupt in the case when current frame was
> +                *          read from TX buffer.
> +                * rx_rdy:  Interrupt in the case when new frame is ready
> +                *          in RX buffer.
> +                */
> +               struct {
> +                       u32
> +                       __reserved:30,
> +                       tx_done:1,
> +                       rx_rdy:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Gbps Eth MAC Configuration 0 register */
> +struct nps_enet_ge_mac_cfg_0 {
> +       union {
> +               /* tx_pr_len:          Transmit preamble length in bytes
> +                * tx_ifg_nib:         Tx idle pattern
> +                * nib_mode:           Nibble (4-bit) Mode
> +                * rx_pr_check_en:     Receive preamble Check Enable
> +                * tx_ifg:             Transmit inter-Frame Gap
> +                * rx_ifg:             Receive inter-Frame Gap
> +                * tx_fc_retr:         Transmit Flow Control Retransmit Mode
> +                * rx_length_check_en: Receive Length Check Enable
> +                * rx_crc_ignore:      Results of the CRC check are ignored
> +                * rx_crc_strip:       MAC strips the CRC from received frames
> +                * rx_fc_en:           Receive Flow Control Enable
> +                * tx_crc_en:          Transmit CRC Enabled
> +                * tx_pad_en:          Transmit Padding Enable
> +                * tx_cf_en:           Transmit Flow Control Enable
> +                * tx_en:              Transmit Enable
> +                * rx_en:              Receive Enable
> +                */
> +               struct {
> +                       u32
> +                       tx_pr_len:4,
> +                       tx_ifg_nib:4,
> +                       nib_mode:1,
> +                       rx_pr_check_en:1,
> +                       tx_ifg:6,
> +                       rx_ifg:4,
> +                       tx_fc_retr:3,
> +                       rx_length_check_en:1,
> +                       rx_crc_ignore:1,
> +                       rx_crc_strip:1,
> +                       rx_fc_en:1,
> +                       tx_crc_en:1,
> +                       tx_pad_en:1,
> +                       tx_fc_en:1,
> +                       tx_en:1,
> +                       rx_en:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Gbps Eth MAC Configuration 1 register */
> +struct nps_enet_ge_mac_cfg_1 {
> +       union {
> +               /* octet_3: MAC address octet 3
> +                * octet_2: MAC address octet 2
> +                * octet_1: MAC address octet 1
> +                * octet_0: MAC address octet 0
> +                */
> +               struct {
> +                       u32
> +                       octet_3:8,
> +                       octet_2:8,
> +                       octet_1:8,
> +                       octet_0:8;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Gbps Eth MAC Configuration 2 register */
> +struct nps_enet_ge_mac_cfg_2 {
> +       union {
> +               /* transmit_flush_en: MAC flush enable
> +                * stat_en:           RMON statistics interface enable
> +                * disc_da:           Discard frames with DA different
> +                *                    from MAC address
> +                * disc_bc:           Discard broadcast frames
> +                * disc_mc:           Discard multicast frames
> +                * octet_5:           MAC address octet 5
> +                * octet_4:           MAC address octet 4
> +                */
> +               struct {
> +                       u32
> +                       transmit_flush_en:1,
> +                       __reserved_1:5,
> +                       stat_en:2,
> +                       __reserved_2:1,
> +                       disc_da:1,
> +                       disc_bc:1,
> +                       disc_mc:1,
> +                       __reserved_3:4,
> +                       octet_5:8,
> +                       octet_4:8;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Gbps Eth MAC Configuration 3 register */
> +struct nps_enet_ge_mac_cfg_3 {
> +       union {
> +               /* ext_oob_cbfc_sel:  Selects one of the 4 profiles for
> +                *                    extended OOB in-flow-control indication
> +                * max_len:           Maximum receive frame length in bytes
> +                * tx_cbfc_en:        Enable transmission of class-based
> +                *                    flow control packets
> +                * rx_ifg_th:         Threshold for IFG status reporting via OOB
> +                * cf_timeout:        Configurable time to decrement FC counters
> +                * cf_drop:           Drop control frames
> +                * redirect_cbfc_sel: Selects one of CBFC redirect profiles
> +                * rx_cbfc_redir_en:  Enable Rx class-based flow
> +                *                    control redirect
> +                * rx_cbfc_en:        Enable Rx class-based flow control
> +                * tm_hd_mode:        TM header mode
> +                */
> +               struct {
> +                       u32
> +                       ext_oob_cbfc_sel:2,
> +                       max_len:14,
> +                       tx_cbfc_en:1,
> +                       rx_ifg_th:5,
> +                       cf_timeout:4,
> +                       cf_drop:1,
> +                       redirect_cbfc_sel:2,
> +                       rx_cbfc_redir_en:1,
> +                       rx_cbfc_en:1,
> +                       tm_hd_mode:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* GE MAC, PCS reset control register */
> +struct nps_enet_ge_rst {
> +       union {
> +               /* gmac_0: GE MAC reset
> +                * spcs_0: SGMII PCS reset
> +                */
> +               struct {
> +                       u32
> +                       __reserved_1:23,
> +                       gmac_0:1,
> +                       __reserved_2:7,
> +                       spcs_0:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Tx phase sync FIFO control register */
> +struct nps_enet_phase_fifo_ctl {
> +       union {
> +               /* init: initialize serdes TX phase sync FIFO pointers
> +                * rst:  reset serdes TX phase sync FIFO
> +                */
> +               struct {
> +                       u32
> +                       __reserved:30,
> +                       init:1,
> +                       rst:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/**
> + * struct nps_enet_priv - Storage of ENET's private information.
> + * @regs_base:      Base address of ENET memory-mapped control registers.
> + * @irq:            For RX/TX IRQ number.
> + * @tx_packet_sent: SW indication if frame is being sent.
> + * @tx_skb:         socket buffer of sent frame.
> + * @napi:           Structure for NAPI.
> + */
> +struct nps_enet_priv {
> +       void __iomem *regs_base;
> +       s32 irq;
> +       bool tx_packet_sent;
> +       struct sk_buff *tx_skb;
> +       struct napi_struct napi;
> +       struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
> +       struct nps_enet_ge_mac_cfg_3 ge_mac_cfg_3;
> +};
> +
> +/**
> + * nps_reg_set - Sets ENET register with provided value.
> + * @priv:       Pointer to EZchip ENET private data structure.
> + * @reg:        Register offset from base address.
> + * @value:      Value to set in register.
> + */
> +static inline void nps_enet_reg_set(struct nps_enet_priv *priv,
> +                                   s32 reg, s32 value)
> +{
> +       iowrite32be(value, priv->regs_base + reg);
> +}
> +
> +/**
> + * nps_reg_get - Gets value of specified ENET register.
> + * @priv:       Pointer to EZchip ENET private data structure.
> + * @reg:        Register offset from base address.
> + *
> + * returns:     Value of requested register.
> + */
> +static inline u32 nps_enet_reg_get(struct nps_enet_priv *priv, s32 reg)
> +{
> +       return ioread32be(priv->regs_base + reg);
> +}
> +
> +#endif /* _NPS_ENET_H */
> --
> 1.7.1
>
> --
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^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v5] NET: Add ezchip ethernet driver
@ 2015-06-22 17:45           ` Mahesh Bandewar
  0 siblings, 0 replies; 28+ messages in thread
From: Mahesh Bandewar @ 2015-06-22 17:45 UTC (permalink / raw)
  To: Noam Camus
  Cc: linux-netdev, linux-kernel, Alexey.Brodkin, vgupta, giladb,
	cmetcalf, Tal Zilcer

On Tue, Jun 16, 2015 at 7:35 AM, Noam Camus <noamc@ezchip.com> wrote:
>
> From: Noam Camus <noamc@ezchip.com>
>
> Simple LAN device for debug or management purposes.
> Device supports interrupts for RX and TX(completion).
> Device does not have DMA ability.
>
> Signed-off-by: Noam Camus <noamc@ezchip.com>
> Signed-off-by: Tal Zilcer <talz@ezchip.com>
> Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
> ---
> Change log for v5:
> Basically its all based on Florian comments.
> Main items are:
> 1) Move all interrupt chore to bottom-half
> 2) use memcpy_toio/fromio
> 3) dev_kfree_skb() moved to bottom-half
> 4) add set_rx_mode callback
> 5) use platform api toward non-DT platforms
> ---
>  .../devicetree/bindings/net/ezchip_enet.txt        |   15 +
>  drivers/net/ethernet/Kconfig                       |    1 +
>  drivers/net/ethernet/Makefile                      |    1 +
>  drivers/net/ethernet/ezchip/Kconfig                |   27 +
>  drivers/net/ethernet/ezchip/Makefile               |    1 +
>  drivers/net/ethernet/ezchip/nps_enet.c             |  652 ++++++++++++++++++++
>  drivers/net/ethernet/ezchip/nps_enet.h             |  336 ++++++++++
>  7 files changed, 1033 insertions(+), 0 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/net/ezchip_enet.txt
>  create mode 100644 drivers/net/ethernet/ezchip/Kconfig
>  create mode 100644 drivers/net/ethernet/ezchip/Makefile
>  create mode 100644 drivers/net/ethernet/ezchip/nps_enet.c
>  create mode 100644 drivers/net/ethernet/ezchip/nps_enet.h
>
> diff --git a/Documentation/devicetree/bindings/net/ezchip_enet.txt b/Documentation/devicetree/bindings/net/ezchip_enet.txt
> new file mode 100644
> index 0000000..4e29b2b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/ezchip_enet.txt
> @@ -0,0 +1,15 @@
> +* EZchip NPS Management Ethernet port driver
> +
> +Required properties:
> +- compatible: Should be "ezchip,nps-mgt-enet"
> +- reg: Address and length of the register set for the device
> +- interrupts: Should contain the ENET interrupt
> +
> +Examples:
> +
> +       ethernet@f0003000 {
> +               compatible = "ezchip,nps-mgt-enet";
> +               reg = <0xf0003000 0x44>;
> +               interrupts = <7>;
> +               mac-address = [ 00 11 22 33 44 55 ];
> +       };
> diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
> index eadcb05..1a6b1ba 100644
> --- a/drivers/net/ethernet/Kconfig
> +++ b/drivers/net/ethernet/Kconfig
> @@ -66,6 +66,7 @@ config DNET
>  source "drivers/net/ethernet/dec/Kconfig"
>  source "drivers/net/ethernet/dlink/Kconfig"
>  source "drivers/net/ethernet/emulex/Kconfig"
> +source "drivers/net/ethernet/ezchip/Kconfig"
>  source "drivers/net/ethernet/neterion/Kconfig"
>  source "drivers/net/ethernet/faraday/Kconfig"
>  source "drivers/net/ethernet/freescale/Kconfig"
> diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
> index 1367afc..489f9cc 100644
> --- a/drivers/net/ethernet/Makefile
> +++ b/drivers/net/ethernet/Makefile
> @@ -29,6 +29,7 @@ obj-$(CONFIG_DNET) += dnet.o
>  obj-$(CONFIG_NET_VENDOR_DEC) += dec/
>  obj-$(CONFIG_NET_VENDOR_DLINK) += dlink/
>  obj-$(CONFIG_NET_VENDOR_EMULEX) += emulex/
> +obj-$(CONFIG_NET_VENDOR_EZCHIP) += ezchip/
>  obj-$(CONFIG_NET_VENDOR_EXAR) += neterion/
>  obj-$(CONFIG_NET_VENDOR_FARADAY) += faraday/
>  obj-$(CONFIG_NET_VENDOR_FREESCALE) += freescale/
> diff --git a/drivers/net/ethernet/ezchip/Kconfig b/drivers/net/ethernet/ezchip/Kconfig
> new file mode 100644
> index 0000000..d031177
> --- /dev/null
> +++ b/drivers/net/ethernet/ezchip/Kconfig
> @@ -0,0 +1,27 @@
> +#
> +# EZchip network device configuration
> +#
> +
> +config NET_VENDOR_EZCHIP
> +       bool "EZchip devices"
> +       default y
>
Why this has to be included in the default build? Shouldn't it be
either "m" or "N" by default?

> +       ---help---
> +         If you have a network (Ethernet) device belonging to this class, say Y
> +         and read the Ethernet-HOWTO, available from
> +         <http://www.tldp.org/docs.html#howto>.
> +
> +         Note that the answer to this question doesn't directly affect the
> +         kernel: saying N will just cause the configurator to skip all
> +         the questions about EZchip devices. If you say Y, you will be asked for
> +         your specific device in the following questions.
> +
> +if NET_VENDOR_EZCHIP
> +
> +config EZCHIP_NPS_MANAGEMENT_ENET
> +       tristate "EZchip NPS management enet support"
> +       ---help---
> +         Simple LAN device for debug or management purposes.
> +         Device supports interrupts for RX and TX(completion).
> +         Device does not have DMA ability.
> +
> +endif
> diff --git a/drivers/net/ethernet/ezchip/Makefile b/drivers/net/ethernet/ezchip/Makefile
> new file mode 100644
> index 0000000..e490176
> --- /dev/null
> +++ b/drivers/net/ethernet/ezchip/Makefile
> @@ -0,0 +1 @@
> +obj-$(CONFIG_EZCHIP_NPS_MANAGEMENT_ENET) += nps_enet.o
> diff --git a/drivers/net/ethernet/ezchip/nps_enet.c b/drivers/net/ethernet/ezchip/nps_enet.c
> new file mode 100644
> index 0000000..df3d5b0
> --- /dev/null
> +++ b/drivers/net/ethernet/ezchip/nps_enet.c
> @@ -0,0 +1,652 @@
> +/*
> + * Copyright(c) 2015 EZchip Technologies.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + * The full GNU General Public License is included in this distribution in
> + * the file called "COPYING".
> + */
> +
> +#include <linux/module.h>
> +#include <linux/etherdevice.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/of_net.h>
> +#include <linux/of_platform.h>
> +#include "nps_enet.h"
> +
> +#define DRV_NAME                       "nps_mgt_enet"
> +
> +static void nps_enet_clean_rx_fifo(struct net_device *ndev, u32 frame_len)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       u32 i, len = DIV_ROUND_UP(frame_len, sizeof(u32));
> +
> +       /* Empty Rx FIFO buffer by reading all words */
> +       for (i = 0; i < len; i++)
> +               nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
> +}
> +
> +static void nps_enet_read_rx_fifo(struct net_device *ndev,
> +                                 unsigned char *dst, u32 length)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       s32 i, last = length & (sizeof(u32) - 1);
> +       u32 *reg = (u32 *)dst, len = length / sizeof(u32);
> +       bool dst_is_aligned = IS_ALIGNED((u32)dst, sizeof(u32));
> +
> +       /* In case dst is not aligned we need an intermediate buffer */
> +       if (dst_is_aligned)
> +               for (i = 0; i < len; i++, reg++)
> +                       *reg = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
> +       else { /* !dst_is_aligned */
> +               for (i = 0; i < len; i++, reg++) {
> +                       u32 buf =
> +                               nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
> +
> +                       /* to accommodate word-unaligned address of "reg"
> +                        * we have to do memcpy_toio() instead of simple "=".
> +                        */
> +                       memcpy_toio(reg, &buf, sizeof(buf));
> +               }
> +       }
> +
> +       /* copy last bytes (if any) */
> +       if (last) {
> +               u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
> +
> +               memcpy_toio(reg, &buf, last);
> +       }
> +}
> +
> +static u32 nps_enet_rx_handler(struct net_device *ndev)
> +{
> +       u32 frame_len, err = 0;
> +       u32 work_done = 0;
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct sk_buff *skb;
> +       struct nps_enet_rx_ctl rx_ctrl;
> +
> +       rx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_RX_CTL);
> +       frame_len = rx_ctrl.nr;
> +
> +       /* Check if we got RX */
> +       if (!rx_ctrl.cr)
> +               return work_done;
> +
> +       /* If we got here there is a work for us */
> +       work_done++;
> +
> +       /* Check Rx error */
> +       if (rx_ctrl.er) {
> +               ndev->stats.rx_errors++;
> +               err = 1;
> +       }
> +
> +       /* Check Rx CRC error */
> +       if (rx_ctrl.crc) {
> +               ndev->stats.rx_crc_errors++;
> +               ndev->stats.rx_dropped++;
> +               err = 1;
> +       }
> +
> +       /* Check Frame length Min 64b */
> +       if (unlikely(frame_len < ETH_ZLEN)) {
> +               ndev->stats.rx_length_errors++;
> +               ndev->stats.rx_dropped++;
> +               err = 1;
> +       }
> +
> +       if (err)
> +               goto rx_irq_clean;
> +
> +       /* Skb allocation */
> +       skb = netdev_alloc_skb_ip_align(ndev, frame_len);
> +       if (unlikely(!skb)) {
> +               ndev->stats.rx_errors++;
> +               ndev->stats.rx_dropped++;
> +               goto rx_irq_clean;
> +       }
> +
> +       /* Copy frame from Rx fifo into the skb */
> +       nps_enet_read_rx_fifo(ndev, skb->data, frame_len);
> +
> +       skb_put(skb, frame_len);
> +       skb->protocol = eth_type_trans(skb, ndev);
> +       skb->ip_summed = CHECKSUM_UNNECESSARY;
> +
> +       ndev->stats.rx_packets++;
> +       ndev->stats.rx_bytes += frame_len;
> +       netif_receive_skb(skb);
> +
> +       goto rx_irq_frame_done;
> +
> +rx_irq_clean:
> +       /* Clean Rx fifo */
> +       nps_enet_clean_rx_fifo(ndev, frame_len);
> +
> +rx_irq_frame_done:
> +       /* Ack Rx ctrl register */
> +       nps_enet_reg_set(priv, NPS_ENET_REG_RX_CTL, 0);
> +
> +       return work_done;
> +}
> +
> +static void nps_enet_tx_handler(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_tx_ctl tx_ctrl;
> +
> +       tx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_TX_CTL);
> +
> +       /* Check if we got TX */
> +       if (!priv->tx_packet_sent || tx_ctrl.ct)
> +               return;
> +
> +       /* Check Tx transmit error */
> +       if (unlikely(tx_ctrl.et)) {
> +               ndev->stats.tx_errors++;
> +       } else {
> +               ndev->stats.tx_packets++;
> +               ndev->stats.tx_bytes += tx_ctrl.nt;
> +       }
> +
> +       if (priv->tx_skb) {
> +               dev_kfree_skb(priv->tx_skb);
> +               priv->tx_skb = NULL;
> +       }
> +
> +       priv->tx_packet_sent = false;
> +
> +       if (netif_queue_stopped(ndev))
> +               netif_wake_queue(ndev);
> +}
> +
> +/**
> + * nps_enet_poll - NAPI poll handler.
> + * @napi:       Pointer to napi_struct structure.
> + * @budget:     How many frames to process on one call.
> + *
> + * returns:     Number of processed frames
> + */
> +static int nps_enet_poll(struct napi_struct *napi, int budget)
> +{
> +       struct net_device *ndev = napi->dev;
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_buf_int_enable buf_int_enable = {
> +               .rx_rdy = NPS_ENET_ENABLE,
> +               .tx_done = NPS_ENET_ENABLE,};
> +       u32 work_done;
> +
> +       nps_enet_tx_handler(ndev);
> +       work_done = nps_enet_rx_handler(ndev);
> +       if (work_done < budget) {
> +               napi_complete(napi);
> +               nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
> +                                buf_int_enable.value);
> +       }
> +
> +       return work_done;
> +}
> +
> +/**
> + * nps_enet_irq_handler - Global interrupt handler for ENET.
> + * @irq:                irq number.
> + * @dev_instance:       device instance.
> + *
> + * returns: IRQ_HANDLED for all cases.
> + *
> + * EZchip ENET has 2 interrupt causes, and depending on bits raised in
> + * CTRL registers we may tell what is a reason for interrupt to fire up.
> + * We got one for RX and the other for TX (completion).
> + */
> +static irqreturn_t nps_enet_irq_handler(s32 irq, void *dev_instance)
> +{
> +       struct net_device *ndev = dev_instance;
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_buf_int_cause buf_int_cause;
> +
> +       buf_int_cause.value =
> +                       nps_enet_reg_get(priv, NPS_ENET_REG_BUF_INT_CAUSE);
> +
> +       if (buf_int_cause.tx_done || buf_int_cause.rx_rdy)
> +               if (likely(napi_schedule_prep(&priv->napi))) {
> +                       nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
> +                       __napi_schedule(&priv->napi);
> +               }
> +
> +       return IRQ_HANDLED;
> +}
> +
> +static void nps_enet_set_hw_mac_address(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_ge_mac_cfg_1 ge_mac_cfg_1;
> +       struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
> +
> +       /* set MAC address in HW */
> +       ge_mac_cfg_1.octet_0 = ndev->dev_addr[0];
> +       ge_mac_cfg_1.octet_1 = ndev->dev_addr[1];
> +       ge_mac_cfg_1.octet_2 = ndev->dev_addr[2];
> +       ge_mac_cfg_1.octet_3 = ndev->dev_addr[3];
> +       ge_mac_cfg_2->octet_4 = ndev->dev_addr[4];
> +       ge_mac_cfg_2->octet_5 = ndev->dev_addr[5];
> +
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_1,
> +                        ge_mac_cfg_1.value);
> +
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
> +                        ge_mac_cfg_2->value);
> +}
> +
> +/**
> + * nps_enet_hw_reset - Reset the network device.
> + * @ndev:       Pointer to the network device.
> + *
> + * This function reset the PCS and TX fifo.
> + * The programming model is to set the relevant reset bits
> + * wait for some time for this to propagate and then unset
> + * the reset bits. This way we ensure that reset procedure
> + * is done successfully by device.
> + */
> +static void nps_enet_hw_reset(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_ge_rst ge_rst = {.value = 0};
> +       struct nps_enet_phase_fifo_ctl phase_fifo_ctl = {.value = 0};
> +
> +       /* Pcs reset sequence*/
> +       ge_rst.gmac_0 = NPS_ENET_ENABLE;
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
> +       usleep_range(10, 20);
> +       ge_rst.value = 0;
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
> +
> +       /* Tx fifo reset sequence */
> +       phase_fifo_ctl.rst = NPS_ENET_ENABLE;
> +       phase_fifo_ctl.init = NPS_ENET_ENABLE;
> +       nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
> +                        phase_fifo_ctl.value);
> +       usleep_range(10, 20);
> +       phase_fifo_ctl.value = 0;
> +       nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
> +                        phase_fifo_ctl.value);
> +}
> +
> +static void nps_enet_hw_enable_control(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_ge_mac_cfg_0 ge_mac_cfg_0 = { .value = 0 };
> +       struct nps_enet_buf_int_enable buf_int_enable = { .value = 0 };
> +       struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
> +       struct nps_enet_ge_mac_cfg_3 *ge_mac_cfg_3 = &priv->ge_mac_cfg_3;
> +       s32 max_frame_length;
> +
> +       /* Enable Rx and Tx statistics */
> +       ge_mac_cfg_2->stat_en = NPS_ENET_GE_MAC_CFG_2_STAT_EN;
> +
> +       /* Discard packets with different MAC address */
> +       ge_mac_cfg_2->disc_da = NPS_ENET_ENABLE;
> +
> +       /* Discard multicast packets */
> +       ge_mac_cfg_2->disc_mc = NPS_ENET_ENABLE;
> +
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
> +                        ge_mac_cfg_2->value);
> +
> +       /* Discard Packets bigger than max frame length */
> +       max_frame_length = ETH_HLEN + ndev->mtu + ETH_FCS_LEN;
> +       if (max_frame_length <= NPS_ENET_MAX_FRAME_LENGTH) {
> +               ge_mac_cfg_3->max_len = max_frame_length;
> +               nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_3,
> +                                ge_mac_cfg_3->value);
> +       }
> +
> +       /* Enable interrupts */
> +       buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
> +       buf_int_enable.tx_done = NPS_ENET_ENABLE;
> +       nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
> +                        buf_int_enable.value);
> +
> +       /* Write device MAC address to HW */
> +       nps_enet_set_hw_mac_address(ndev);
> +
> +       /* Rx and Tx HW features */
> +       ge_mac_cfg_0.tx_pad_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.tx_crc_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.rx_crc_strip = NPS_ENET_ENABLE;
> +
> +       /* IFG configuration */
> +       ge_mac_cfg_0.rx_ifg = NPS_ENET_GE_MAC_CFG_0_RX_IFG;
> +       ge_mac_cfg_0.tx_ifg = NPS_ENET_GE_MAC_CFG_0_TX_IFG;
> +
> +       /* preamble configuration */
> +       ge_mac_cfg_0.rx_pr_check_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.tx_pr_len = NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN;
> +
> +       /* enable flow control frames */
> +       ge_mac_cfg_0.tx_fc_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.rx_fc_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.tx_fc_retr = NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR;
> +
> +       /* Enable Rx and Tx */
> +       ge_mac_cfg_0.rx_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.tx_en = NPS_ENET_ENABLE;
> +
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0,
> +                        ge_mac_cfg_0.value);
> +}
> +
> +static void nps_enet_hw_disable_control(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +
> +       /* Disable interrupts */
> +       nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
> +
> +       /* Disable Rx and Tx */
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0, 0);
> +}
> +
> +static void nps_enet_send_frame(struct net_device *ndev,
> +                               struct sk_buff *skb)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_tx_ctl tx_ctrl = { .value = 0 };
> +       short length = skb->len;
> +       u32 i, len = DIV_ROUND_UP(length, sizeof(u32));
> +       u32 *src = (u32 *)virt_to_phys(skb->data);
> +       bool src_is_aligned = IS_ALIGNED((u32)src, sizeof(u32));
> +
> +       /* In case src is not aligned we need an intermediate buffer */
> +       if (src_is_aligned)
> +               for (i = 0; i < len; i++, src++)
> +                       nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, *src);
> +       else { /* !src_is_aligned */
> +               for (i = 0; i < len; i++, src++) {
> +                       u32 buf;
> +
> +                       /* to accommodate word-unaligned address of "src"
> +                        * we have to do memcpy_fromio() instead of simple "="
> +                        */
> +                       memcpy_fromio(&buf, src, sizeof(buf));
> +                       nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, buf);
> +               }
> +       }
> +       /* Write the length of the Frame */
> +       tx_ctrl.nt = length;
> +
> +       /* Indicate SW is done */
> +       priv->tx_packet_sent = true;
> +       tx_ctrl.ct = NPS_ENET_ENABLE;
> +
> +       /* Send Frame */
> +       nps_enet_reg_set(priv, NPS_ENET_REG_TX_CTL, tx_ctrl.value);
> +}
> +
> +/**
> + * nps_enet_set_mac_address - Set the MAC address for this device.
> + * @ndev:       Pointer to net_device structure.
> + * @p:          6 byte Address to be written as MAC address.
> + *
> + * This function copies the HW address from the sockaddr structure to the
> + * net_device structure and updates the address in HW.
> + *
> + * returns:     -EBUSY if the net device is busy or 0 if the address is set
> + *              successfully.
> + */
> +static s32 nps_enet_set_mac_address(struct net_device *ndev, void *p)
> +{
> +       struct sockaddr *addr = p;
> +       s32 res;
> +
> +       if (netif_running(ndev))
> +               return -EBUSY;
> +
> +       res = eth_mac_addr(ndev, p);
> +       if (!res) {
> +               ether_addr_copy(ndev->dev_addr, addr->sa_data);
> +               nps_enet_set_hw_mac_address(ndev);
> +       }
> +
> +       return res;
> +}
> +
> +/**
> + * nps_enet_set_rx_mode - Change the receive filtering mode.
> + * @ndev:       Pointer to the network device.
> + *
> + * This function enables/disables promiscuous mode
> + */
> +static void nps_enet_set_rx_mode(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
> +
> +       ge_mac_cfg_2.value = priv->ge_mac_cfg_2.value;
> +
> +       if (ndev->flags & IFF_PROMISC) {
> +               ge_mac_cfg_2.disc_da = NPS_ENET_DISABLE;
> +               ge_mac_cfg_2.disc_mc = NPS_ENET_DISABLE;
> +       } else {
> +               ge_mac_cfg_2.disc_da = NPS_ENET_ENABLE;
> +               ge_mac_cfg_2.disc_mc = NPS_ENET_ENABLE;
> +       }
> +
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2, ge_mac_cfg_2.value);
> +}
> +
> +/**
> + * nps_enet_open - Open the network device.
> + * @ndev:       Pointer to the network device.
> + *
> + * returns: 0, on success or non-zero error value on failure.
> + *
> + * This function enables an IRQs for the ENET device and starts the Tx queue.
> + */
> +static s32 nps_enet_open(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       s32 err;
> +
> +       /* Reset private variables */
> +       priv->tx_packet_sent = false;
> +       priv->ge_mac_cfg_2.value = 0;
> +       priv->ge_mac_cfg_3.value = 0;
> +
> +       /* ge_mac_cfg_3 default values */
> +       priv->ge_mac_cfg_3.rx_ifg_th = NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH;
> +       priv->ge_mac_cfg_3.max_len = NPS_ENET_GE_MAC_CFG_3_MAX_LEN;
> +
> +       /* Disable HW device */
> +       nps_enet_hw_disable_control(ndev);
> +
> +       /* irq Rx allocation */
> +       err = request_irq(priv->irq, nps_enet_irq_handler,
> +                         0, "enet-rx-tx", ndev);
> +       if (err)
> +               return err;
> +
> +       napi_enable(&priv->napi);
> +
> +       /* Enable HW device */
> +       nps_enet_hw_reset(ndev);
> +       nps_enet_hw_enable_control(ndev);
> +
> +       netif_start_queue(ndev);
> +
> +       return 0;
> +}
> +
> +/**
> + * nps_enet_stop - Close the network device.
> + * @ndev:       Pointer to the network device.
> + *
> + * This function stops the Tx queue, disables interrupts for the ENET device.
> + */
> +static s32 nps_enet_stop(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +
> +       napi_disable(&priv->napi);
> +       netif_stop_queue(ndev);
> +       nps_enet_hw_disable_control(ndev);
> +       free_irq(priv->irq, ndev);
> +
> +       return 0;
> +}
> +
> +/**
> + * nps_enet_start_xmit - Starts the data transmission.
> + * @skb:        sk_buff pointer that contains data to be Transmitted.
> + * @ndev:       Pointer to net_device structure.
> + *
> + * returns: NETDEV_TX_OK, on success
> + *              NETDEV_TX_BUSY, if any of the descriptors are not free.
> + *
> + * This function is invoked from upper layers to initiate transmission.
> + */
> +static netdev_tx_t nps_enet_start_xmit(struct sk_buff *skb,
> +                                      struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +
> +       /* This driver handles one frame at a time  */
> +       netif_stop_queue(ndev);
> +
> +       nps_enet_send_frame(ndev, skb);
> +
> +       priv->tx_skb = skb;
> +
> +       return NETDEV_TX_OK;
> +}
> +
> +#ifdef CONFIG_NET_POLL_CONTROLLER
> +static void nps_enet_poll_controller(struct net_device *ndev)
> +{
> +       disable_irq(ndev->irq);
> +       nps_enet_board_irq_handler(ndev->irq, ndev);
> +       enable_irq(ndev->irq);
> +}
> +#endif
> +
> +static const struct net_device_ops nps_netdev_ops = {
> +       .ndo_open               = nps_enet_open,
> +       .ndo_stop               = nps_enet_stop,
> +       .ndo_start_xmit         = nps_enet_start_xmit,
> +       .ndo_set_mac_address    = nps_enet_set_mac_address,
> +       .ndo_set_rx_mode        = nps_enet_set_rx_mode,
> +#ifdef CONFIG_NET_POLL_CONTROLLER
> +       .ndo_poll_controller    = nps_enet_poll_controller,
> +#endif
> +};
> +
> +static s32 nps_enet_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct net_device *ndev;
> +       struct nps_enet_priv *priv;
> +       s32 err = 0;
> +       const char *mac_addr;
> +       struct resource *res_regs;
> +
> +       if (!dev->of_node)
> +               return -ENODEV;
> +
> +       ndev = alloc_etherdev(sizeof(struct nps_enet_priv));
> +       if (!ndev)
> +               return -ENOMEM;
> +
> +       platform_set_drvdata(pdev, ndev);
> +       SET_NETDEV_DEV(ndev, dev);
> +       priv = netdev_priv(ndev);
> +
> +       /* The EZ NET specific entries in the device structure. */
> +       ndev->netdev_ops = &nps_netdev_ops;
> +       ndev->watchdog_timeo = (400 * HZ / 1000);
> +       /* FIXME :: no multicast support yet */
> +       ndev->flags &= ~IFF_MULTICAST;
> +
> +       res_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +       priv->regs_base = devm_ioremap_resource(dev, res_regs);
> +       if (IS_ERR(priv->regs_base)) {
> +               err = PTR_ERR(priv->regs_base);
> +               goto out_netdev;
> +       }
> +       dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs_base);
> +
> +       /* set kernel MAC address to dev */
> +       mac_addr = of_get_mac_address(dev->of_node);
> +       if (mac_addr)
> +               ether_addr_copy(ndev->dev_addr, mac_addr);
> +       else
> +               eth_hw_addr_random(ndev);
> +
> +       /* Get IRQ number */
> +       priv->irq = platform_get_irq(pdev, 0);
> +       if (!priv->irq) {
> +               dev_err(dev, "failed to retrieve <irq Rx-Tx> value from device tree\n");
> +               err = -ENODEV;
> +               goto out_netdev;
> +       }
> +
> +       netif_napi_add(ndev, &priv->napi, nps_enet_poll, NPS_ENET_NAPI_POLL_WEIGHT);
> +
> +       /* Register the driver. Should be the last thing in probe */
> +       err = register_netdev(ndev);
> +       if (err) {
> +               dev_err(dev, "Failed to register ndev for %s, err = 0x%08x\n",
> +                       ndev->name, (s32)err);
> +               err = -ENODEV;
> +               goto out_netif_api;
> +       }
> +
> +       dev_info(dev, "(rx/tx=%d)\n", priv->irq);
> +       return 0;
> +
> +out_netif_api:
> +       netif_napi_del(&priv->napi);
> +out_netdev:
> +       if (err)
> +               free_netdev(ndev);
> +
> +       return err;
> +}
> +
> +static s32 nps_enet_remove(struct platform_device *pdev)
> +{
> +       struct net_device *ndev = platform_get_drvdata(pdev);
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +
> +       unregister_netdev(ndev);
> +       free_netdev(ndev);
> +       netif_napi_del(&priv->napi);
> +
> +       return 0;
> +}
> +
> +static const struct of_device_id nps_enet_dt_ids[] = {
> +       { .compatible = "ezchip,nps-mgt-enet" },
> +       { /* Sentinel */ }
> +};
> +
> +static struct platform_driver nps_enet_driver = {
> +       .probe = nps_enet_probe,
> +       .remove = nps_enet_remove,
> +       .driver = {
> +               .name = DRV_NAME,
> +               .of_match_table  = nps_enet_dt_ids,
> +       },
> +};
> +
> +module_platform_driver(nps_enet_driver);
> +
> +MODULE_AUTHOR("EZchip Semiconductor");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/net/ethernet/ezchip/nps_enet.h b/drivers/net/ethernet/ezchip/nps_enet.h
> new file mode 100644
> index 0000000..fc45c9d
> --- /dev/null
> +++ b/drivers/net/ethernet/ezchip/nps_enet.h
> @@ -0,0 +1,336 @@
> +/*
> + * Copyright(c) 2015 EZchip Technologies.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + * The full GNU General Public License is included in this distribution in
> + * the file called "COPYING".
> + */
> +
> +#ifndef _NPS_ENET_H
> +#define _NPS_ENET_H
> +
> +/* default values */
> +#define NPS_ENET_NAPI_POLL_WEIGHT              0x2
> +#define NPS_ENET_MAX_FRAME_LENGTH              0x3FFF
> +#define NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR       0x7
> +#define NPS_ENET_GE_MAC_CFG_0_RX_IFG           0x5
> +#define NPS_ENET_GE_MAC_CFG_0_TX_IFG           0xC
> +#define NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN                0x7
> +#define NPS_ENET_GE_MAC_CFG_2_STAT_EN          0x3
> +#define NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH                0x14
> +#define NPS_ENET_GE_MAC_CFG_3_MAX_LEN          0x3FFC
> +#define NPS_ENET_ENABLE                                1
> +#define NPS_ENET_DISABLE                       0
> +
> +/* register definitions  */
> +#define NPS_ENET_REG_TX_CTL            0x800
> +#define NPS_ENET_REG_TX_BUF            0x808
> +#define NPS_ENET_REG_RX_CTL            0x810
> +#define NPS_ENET_REG_RX_BUF            0x818
> +#define NPS_ENET_REG_BUF_INT_ENABLE    0x8C0
> +#define NPS_ENET_REG_BUF_INT_CAUSE     0x8C4
> +#define NPS_ENET_REG_GE_MAC_CFG_0      0x1000
> +#define NPS_ENET_REG_GE_MAC_CFG_1      0x1004
> +#define NPS_ENET_REG_GE_MAC_CFG_2      0x1008
> +#define NPS_ENET_REG_GE_MAC_CFG_3      0x100C
> +#define NPS_ENET_REG_GE_RST            0x1400
> +#define NPS_ENET_REG_PHASE_FIFO_CTL    0x1404
> +
> +/* Tx control register */
> +struct nps_enet_tx_ctl {
> +       union {
> +               /* ct: SW sets to indicate frame ready in Tx buffer for
> +                *     transmission. HW resets to when transmission done
> +                * et: Transmit error
> +                * nt: Length in bytes of Tx frame loaded to Tx buffer
> +                */
> +               struct {
> +                       u32
> +                       __reserved_1:16,
> +                       ct:1,
> +                       et:1,
> +                       __reserved_2:3,
> +                       nt:11;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Rx control register */
> +struct nps_enet_rx_ctl {
> +       union {
> +               /* cr:  HW sets to indicate frame ready in Rx buffer.
> +                *      SW resets to indicate host read received frame
> +                *      and new frames can be written to Rx buffer
> +                * er:  Rx error indication
> +                * crc: Rx CRC error indication
> +                * nr:  Length in bytes of Rx frame loaded by MAC to Rx buffer
> +                */
> +               struct {
> +                       u32
> +                       __reserved_1:16,
> +                       cr:1,
> +                       er:1,
> +                       crc:1,
> +                       __reserved_2:2,
> +                       nr:11;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Interrupt enable for data buffer events register */
> +struct nps_enet_buf_int_enable {
> +       union {
> +               /* tx_done: Interrupt generation in the case when new frame
> +                *          is ready in Rx buffer
> +                * rx_rdy:  Interrupt generation in the case when current frame
> +                *          was read from TX buffer
> +                */
> +               struct {
> +                       u32
> +                       __reserved:30,
> +                       tx_done:1,
> +                       rx_rdy:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Interrupt cause for data buffer events register */
> +struct nps_enet_buf_int_cause {
> +       union {
> +               /* tx_done: Interrupt in the case when current frame was
> +                *          read from TX buffer.
> +                * rx_rdy:  Interrupt in the case when new frame is ready
> +                *          in RX buffer.
> +                */
> +               struct {
> +                       u32
> +                       __reserved:30,
> +                       tx_done:1,
> +                       rx_rdy:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Gbps Eth MAC Configuration 0 register */
> +struct nps_enet_ge_mac_cfg_0 {
> +       union {
> +               /* tx_pr_len:          Transmit preamble length in bytes
> +                * tx_ifg_nib:         Tx idle pattern
> +                * nib_mode:           Nibble (4-bit) Mode
> +                * rx_pr_check_en:     Receive preamble Check Enable
> +                * tx_ifg:             Transmit inter-Frame Gap
> +                * rx_ifg:             Receive inter-Frame Gap
> +                * tx_fc_retr:         Transmit Flow Control Retransmit Mode
> +                * rx_length_check_en: Receive Length Check Enable
> +                * rx_crc_ignore:      Results of the CRC check are ignored
> +                * rx_crc_strip:       MAC strips the CRC from received frames
> +                * rx_fc_en:           Receive Flow Control Enable
> +                * tx_crc_en:          Transmit CRC Enabled
> +                * tx_pad_en:          Transmit Padding Enable
> +                * tx_cf_en:           Transmit Flow Control Enable
> +                * tx_en:              Transmit Enable
> +                * rx_en:              Receive Enable
> +                */
> +               struct {
> +                       u32
> +                       tx_pr_len:4,
> +                       tx_ifg_nib:4,
> +                       nib_mode:1,
> +                       rx_pr_check_en:1,
> +                       tx_ifg:6,
> +                       rx_ifg:4,
> +                       tx_fc_retr:3,
> +                       rx_length_check_en:1,
> +                       rx_crc_ignore:1,
> +                       rx_crc_strip:1,
> +                       rx_fc_en:1,
> +                       tx_crc_en:1,
> +                       tx_pad_en:1,
> +                       tx_fc_en:1,
> +                       tx_en:1,
> +                       rx_en:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Gbps Eth MAC Configuration 1 register */
> +struct nps_enet_ge_mac_cfg_1 {
> +       union {
> +               /* octet_3: MAC address octet 3
> +                * octet_2: MAC address octet 2
> +                * octet_1: MAC address octet 1
> +                * octet_0: MAC address octet 0
> +                */
> +               struct {
> +                       u32
> +                       octet_3:8,
> +                       octet_2:8,
> +                       octet_1:8,
> +                       octet_0:8;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Gbps Eth MAC Configuration 2 register */
> +struct nps_enet_ge_mac_cfg_2 {
> +       union {
> +               /* transmit_flush_en: MAC flush enable
> +                * stat_en:           RMON statistics interface enable
> +                * disc_da:           Discard frames with DA different
> +                *                    from MAC address
> +                * disc_bc:           Discard broadcast frames
> +                * disc_mc:           Discard multicast frames
> +                * octet_5:           MAC address octet 5
> +                * octet_4:           MAC address octet 4
> +                */
> +               struct {
> +                       u32
> +                       transmit_flush_en:1,
> +                       __reserved_1:5,
> +                       stat_en:2,
> +                       __reserved_2:1,
> +                       disc_da:1,
> +                       disc_bc:1,
> +                       disc_mc:1,
> +                       __reserved_3:4,
> +                       octet_5:8,
> +                       octet_4:8;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Gbps Eth MAC Configuration 3 register */
> +struct nps_enet_ge_mac_cfg_3 {
> +       union {
> +               /* ext_oob_cbfc_sel:  Selects one of the 4 profiles for
> +                *                    extended OOB in-flow-control indication
> +                * max_len:           Maximum receive frame length in bytes
> +                * tx_cbfc_en:        Enable transmission of class-based
> +                *                    flow control packets
> +                * rx_ifg_th:         Threshold for IFG status reporting via OOB
> +                * cf_timeout:        Configurable time to decrement FC counters
> +                * cf_drop:           Drop control frames
> +                * redirect_cbfc_sel: Selects one of CBFC redirect profiles
> +                * rx_cbfc_redir_en:  Enable Rx class-based flow
> +                *                    control redirect
> +                * rx_cbfc_en:        Enable Rx class-based flow control
> +                * tm_hd_mode:        TM header mode
> +                */
> +               struct {
> +                       u32
> +                       ext_oob_cbfc_sel:2,
> +                       max_len:14,
> +                       tx_cbfc_en:1,
> +                       rx_ifg_th:5,
> +                       cf_timeout:4,
> +                       cf_drop:1,
> +                       redirect_cbfc_sel:2,
> +                       rx_cbfc_redir_en:1,
> +                       rx_cbfc_en:1,
> +                       tm_hd_mode:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* GE MAC, PCS reset control register */
> +struct nps_enet_ge_rst {
> +       union {
> +               /* gmac_0: GE MAC reset
> +                * spcs_0: SGMII PCS reset
> +                */
> +               struct {
> +                       u32
> +                       __reserved_1:23,
> +                       gmac_0:1,
> +                       __reserved_2:7,
> +                       spcs_0:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Tx phase sync FIFO control register */
> +struct nps_enet_phase_fifo_ctl {
> +       union {
> +               /* init: initialize serdes TX phase sync FIFO pointers
> +                * rst:  reset serdes TX phase sync FIFO
> +                */
> +               struct {
> +                       u32
> +                       __reserved:30,
> +                       init:1,
> +                       rst:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/**
> + * struct nps_enet_priv - Storage of ENET's private information.
> + * @regs_base:      Base address of ENET memory-mapped control registers.
> + * @irq:            For RX/TX IRQ number.
> + * @tx_packet_sent: SW indication if frame is being sent.
> + * @tx_skb:         socket buffer of sent frame.
> + * @napi:           Structure for NAPI.
> + */
> +struct nps_enet_priv {
> +       void __iomem *regs_base;
> +       s32 irq;
> +       bool tx_packet_sent;
> +       struct sk_buff *tx_skb;
> +       struct napi_struct napi;
> +       struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
> +       struct nps_enet_ge_mac_cfg_3 ge_mac_cfg_3;
> +};
> +
> +/**
> + * nps_reg_set - Sets ENET register with provided value.
> + * @priv:       Pointer to EZchip ENET private data structure.
> + * @reg:        Register offset from base address.
> + * @value:      Value to set in register.
> + */
> +static inline void nps_enet_reg_set(struct nps_enet_priv *priv,
> +                                   s32 reg, s32 value)
> +{
> +       iowrite32be(value, priv->regs_base + reg);
> +}
> +
> +/**
> + * nps_reg_get - Gets value of specified ENET register.
> + * @priv:       Pointer to EZchip ENET private data structure.
> + * @reg:        Register offset from base address.
> + *
> + * returns:     Value of requested register.
> + */
> +static inline u32 nps_enet_reg_get(struct nps_enet_priv *priv, s32 reg)
> +{
> +       return ioread32be(priv->regs_base + reg);
> +}
> +
> +#endif /* _NPS_ENET_H */
> --
> 1.7.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe netdev" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

^ permalink raw reply	[flat|nested] 28+ messages in thread

* [PATCH v6] NET: Add ezchip ethernet driver
  2015-06-16 14:35       ` [PATCH v5] " Noam Camus
@ 2015-06-22 20:51           ` Noam Camus
  2015-06-22 17:45           ` Mahesh Bandewar
  2015-06-22 20:51           ` Noam Camus
  2 siblings, 0 replies; 28+ messages in thread
From: Noam Camus @ 2015-06-22 20:51 UTC (permalink / raw)
  To: netdev, linux-kernel
  Cc: Alexey.Brodkin, vgupta, giladb, cmetcalf, Noam Camus, Tal Zilcer

From: Noam Camus <noamc@ezchip.com>

Simple LAN device for debug or management purposes.
Device supports interrupts for RX and TX(completion).
Device does not have DMA ability.

Signed-off-by: Noam Camus <noamc@ezchip.com>
Signed-off-by: Tal Zilcer <talz@ezchip.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
---
Change log for v6:
Below changes are in response for David Miller comments.
I used more recent version of GCC and sparse tools.
The tools reported on several issues which I fixed with following
changes:
1) Fix typo on method name called from nps_enet_poll_controller.
2) Fix casting when using IS_ALIGNED() macro.
3) Add casting when using memcpy_toio()/memcpy_fromio().
4) Remove C99 style of structure members designated initializer.
---
 .../devicetree/bindings/net/ezchip_enet.txt        |   15 +
 drivers/net/ethernet/Kconfig                       |    1 +
 drivers/net/ethernet/Makefile                      |    1 +
 drivers/net/ethernet/ezchip/Kconfig                |   27 +
 drivers/net/ethernet/ezchip/Makefile               |    1 +
 drivers/net/ethernet/ezchip/nps_enet.c             |  658 ++++++++++++++++++++
 drivers/net/ethernet/ezchip/nps_enet.h             |  336 ++++++++++
 7 files changed, 1039 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/ezchip_enet.txt
 create mode 100644 drivers/net/ethernet/ezchip/Kconfig
 create mode 100644 drivers/net/ethernet/ezchip/Makefile
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.c
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.h

diff --git a/Documentation/devicetree/bindings/net/ezchip_enet.txt b/Documentation/devicetree/bindings/net/ezchip_enet.txt
new file mode 100644
index 0000000..4e29b2b
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ezchip_enet.txt
@@ -0,0 +1,15 @@
+* EZchip NPS Management Ethernet port driver
+
+Required properties:
+- compatible: Should be "ezchip,nps-mgt-enet"
+- reg: Address and length of the register set for the device
+- interrupts: Should contain the ENET interrupt
+
+Examples:
+
+	ethernet@f0003000 {
+		compatible = "ezchip,nps-mgt-enet";
+		reg = <0xf0003000 0x44>;
+		interrupts = <7>;
+		mac-address = [ 00 11 22 33 44 55 ];
+	};
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index eadcb05..1a6b1ba 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -66,6 +66,7 @@ config DNET
 source "drivers/net/ethernet/dec/Kconfig"
 source "drivers/net/ethernet/dlink/Kconfig"
 source "drivers/net/ethernet/emulex/Kconfig"
+source "drivers/net/ethernet/ezchip/Kconfig"
 source "drivers/net/ethernet/neterion/Kconfig"
 source "drivers/net/ethernet/faraday/Kconfig"
 source "drivers/net/ethernet/freescale/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 1367afc..489f9cc 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_DNET) += dnet.o
 obj-$(CONFIG_NET_VENDOR_DEC) += dec/
 obj-$(CONFIG_NET_VENDOR_DLINK) += dlink/
 obj-$(CONFIG_NET_VENDOR_EMULEX) += emulex/
+obj-$(CONFIG_NET_VENDOR_EZCHIP) += ezchip/
 obj-$(CONFIG_NET_VENDOR_EXAR) += neterion/
 obj-$(CONFIG_NET_VENDOR_FARADAY) += faraday/
 obj-$(CONFIG_NET_VENDOR_FREESCALE) += freescale/
diff --git a/drivers/net/ethernet/ezchip/Kconfig b/drivers/net/ethernet/ezchip/Kconfig
new file mode 100644
index 0000000..d031177
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Kconfig
@@ -0,0 +1,27 @@
+#
+# EZchip network device configuration
+#
+
+config NET_VENDOR_EZCHIP
+	bool "EZchip devices"
+	default y
+	---help---
+	  If you have a network (Ethernet) device belonging to this class, say Y
+	  and read the Ethernet-HOWTO, available from
+	  <http://www.tldp.org/docs.html#howto>.
+
+	  Note that the answer to this question doesn't directly affect the
+	  kernel: saying N will just cause the configurator to skip all
+	  the questions about EZchip devices. If you say Y, you will be asked for
+	  your specific device in the following questions.
+
+if NET_VENDOR_EZCHIP
+
+config EZCHIP_NPS_MANAGEMENT_ENET
+	tristate "EZchip NPS management enet support"
+	---help---
+	  Simple LAN device for debug or management purposes.
+	  Device supports interrupts for RX and TX(completion).
+	  Device does not have DMA ability.
+
+endif
diff --git a/drivers/net/ethernet/ezchip/Makefile b/drivers/net/ethernet/ezchip/Makefile
new file mode 100644
index 0000000..e490176
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_EZCHIP_NPS_MANAGEMENT_ENET) += nps_enet.o
diff --git a/drivers/net/ethernet/ezchip/nps_enet.c b/drivers/net/ethernet/ezchip/nps_enet.c
new file mode 100644
index 0000000..53e9659
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.c
@@ -0,0 +1,658 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#include <linux/module.h>
+#include <linux/etherdevice.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_net.h>
+#include <linux/of_platform.h>
+#include "nps_enet.h"
+
+#define DRV_NAME			"nps_mgt_enet"
+
+static void nps_enet_clean_rx_fifo(struct net_device *ndev, u32 frame_len)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	u32 i, len = DIV_ROUND_UP(frame_len, sizeof(u32));
+
+	/* Empty Rx FIFO buffer by reading all words */
+	for (i = 0; i < len; i++)
+		nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+}
+
+static void nps_enet_read_rx_fifo(struct net_device *ndev,
+				  unsigned char *dst, u32 length)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	s32 i, last = length & (sizeof(u32) - 1);
+	u32 *reg = (u32 *)dst, len = length / sizeof(u32);
+	bool dst_is_aligned = IS_ALIGNED((unsigned long)dst, sizeof(u32));
+
+	/* In case dst is not aligned we need an intermediate buffer */
+	if (dst_is_aligned)
+		for (i = 0; i < len; i++, reg++)
+			*reg = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+	else { /* !dst_is_aligned */
+		for (i = 0; i < len; i++, reg++) {
+			u32 buf =
+				nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+
+			/* to accommodate word-unaligned address of "reg"
+			 * we have to do memcpy_toio() instead of simple "=".
+			 */
+			memcpy_toio((void __iomem *)reg, &buf, sizeof(buf));
+		}
+	}
+
+	/* copy last bytes (if any) */
+	if (last) {
+		u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+
+		memcpy_toio((void __iomem *)reg, &buf, last);
+	}
+}
+
+static u32 nps_enet_rx_handler(struct net_device *ndev)
+{
+	u32 frame_len, err = 0;
+	u32 work_done = 0;
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct sk_buff *skb;
+	struct nps_enet_rx_ctl rx_ctrl;
+
+	rx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_RX_CTL);
+	frame_len = rx_ctrl.nr;
+
+	/* Check if we got RX */
+	if (!rx_ctrl.cr)
+		return work_done;
+
+	/* If we got here there is a work for us */
+	work_done++;
+
+	/* Check Rx error */
+	if (rx_ctrl.er) {
+		ndev->stats.rx_errors++;
+		err = 1;
+	}
+
+	/* Check Rx CRC error */
+	if (rx_ctrl.crc) {
+		ndev->stats.rx_crc_errors++;
+		ndev->stats.rx_dropped++;
+		err = 1;
+	}
+
+	/* Check Frame length Min 64b */
+	if (unlikely(frame_len < ETH_ZLEN)) {
+		ndev->stats.rx_length_errors++;
+		ndev->stats.rx_dropped++;
+		err = 1;
+	}
+
+	if (err)
+		goto rx_irq_clean;
+
+	/* Skb allocation */
+	skb = netdev_alloc_skb_ip_align(ndev, frame_len);
+	if (unlikely(!skb)) {
+		ndev->stats.rx_errors++;
+		ndev->stats.rx_dropped++;
+		goto rx_irq_clean;
+	}
+
+	/* Copy frame from Rx fifo into the skb */
+	nps_enet_read_rx_fifo(ndev, skb->data, frame_len);
+
+	skb_put(skb, frame_len);
+	skb->protocol = eth_type_trans(skb, ndev);
+	skb->ip_summed = CHECKSUM_UNNECESSARY;
+
+	ndev->stats.rx_packets++;
+	ndev->stats.rx_bytes += frame_len;
+	netif_receive_skb(skb);
+
+	goto rx_irq_frame_done;
+
+rx_irq_clean:
+	/* Clean Rx fifo */
+	nps_enet_clean_rx_fifo(ndev, frame_len);
+
+rx_irq_frame_done:
+	/* Ack Rx ctrl register */
+	nps_enet_reg_set(priv, NPS_ENET_REG_RX_CTL, 0);
+
+	return work_done;
+}
+
+static void nps_enet_tx_handler(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_tx_ctl tx_ctrl;
+
+	tx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_TX_CTL);
+
+	/* Check if we got TX */
+	if (!priv->tx_packet_sent || tx_ctrl.ct)
+		return;
+
+	/* Check Tx transmit error */
+	if (unlikely(tx_ctrl.et)) {
+		ndev->stats.tx_errors++;
+	} else {
+		ndev->stats.tx_packets++;
+		ndev->stats.tx_bytes += tx_ctrl.nt;
+	}
+
+	if (priv->tx_skb) {
+		dev_kfree_skb(priv->tx_skb);
+		priv->tx_skb = NULL;
+	}
+
+	priv->tx_packet_sent = false;
+
+	if (netif_queue_stopped(ndev))
+		netif_wake_queue(ndev);
+}
+
+/**
+ * nps_enet_poll - NAPI poll handler.
+ * @napi:       Pointer to napi_struct structure.
+ * @budget:     How many frames to process on one call.
+ *
+ * returns:     Number of processed frames
+ */
+static int nps_enet_poll(struct napi_struct *napi, int budget)
+{
+	struct net_device *ndev = napi->dev;
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_buf_int_enable buf_int_enable;
+	u32 work_done;
+
+	buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
+	buf_int_enable.tx_done = NPS_ENET_ENABLE;
+	nps_enet_tx_handler(ndev);
+	work_done = nps_enet_rx_handler(ndev);
+	if (work_done < budget) {
+		napi_complete(napi);
+		nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
+				 buf_int_enable.value);
+	}
+
+	return work_done;
+}
+
+/**
+ * nps_enet_irq_handler - Global interrupt handler for ENET.
+ * @irq:                irq number.
+ * @dev_instance:       device instance.
+ *
+ * returns: IRQ_HANDLED for all cases.
+ *
+ * EZchip ENET has 2 interrupt causes, and depending on bits raised in
+ * CTRL registers we may tell what is a reason for interrupt to fire up.
+ * We got one for RX and the other for TX (completion).
+ */
+static irqreturn_t nps_enet_irq_handler(s32 irq, void *dev_instance)
+{
+	struct net_device *ndev = dev_instance;
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_buf_int_cause buf_int_cause;
+
+	buf_int_cause.value =
+			nps_enet_reg_get(priv, NPS_ENET_REG_BUF_INT_CAUSE);
+
+	if (buf_int_cause.tx_done || buf_int_cause.rx_rdy)
+		if (likely(napi_schedule_prep(&priv->napi))) {
+			nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
+			__napi_schedule(&priv->napi);
+		}
+
+	return IRQ_HANDLED;
+}
+
+static void nps_enet_set_hw_mac_address(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_mac_cfg_1 ge_mac_cfg_1;
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
+
+	/* set MAC address in HW */
+	ge_mac_cfg_1.octet_0 = ndev->dev_addr[0];
+	ge_mac_cfg_1.octet_1 = ndev->dev_addr[1];
+	ge_mac_cfg_1.octet_2 = ndev->dev_addr[2];
+	ge_mac_cfg_1.octet_3 = ndev->dev_addr[3];
+	ge_mac_cfg_2->octet_4 = ndev->dev_addr[4];
+	ge_mac_cfg_2->octet_5 = ndev->dev_addr[5];
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_1,
+			 ge_mac_cfg_1.value);
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+}
+
+/**
+ * nps_enet_hw_reset - Reset the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function reset the PCS and TX fifo.
+ * The programming model is to set the relevant reset bits
+ * wait for some time for this to propagate and then unset
+ * the reset bits. This way we ensure that reset procedure
+ * is done successfully by device.
+ */
+static void nps_enet_hw_reset(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_rst ge_rst;
+	struct nps_enet_phase_fifo_ctl phase_fifo_ctl;
+
+	ge_rst.value = 0;
+	phase_fifo_ctl.value = 0;
+	/* Pcs reset sequence*/
+	ge_rst.gmac_0 = NPS_ENET_ENABLE;
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+	usleep_range(10, 20);
+	ge_rst.value = 0;
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+
+	/* Tx fifo reset sequence */
+	phase_fifo_ctl.rst = NPS_ENET_ENABLE;
+	phase_fifo_ctl.init = NPS_ENET_ENABLE;
+	nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+	usleep_range(10, 20);
+	phase_fifo_ctl.value = 0;
+	nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+}
+
+static void nps_enet_hw_enable_control(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_mac_cfg_0 ge_mac_cfg_0;
+	struct nps_enet_buf_int_enable buf_int_enable;
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 *ge_mac_cfg_3 = &priv->ge_mac_cfg_3;
+	s32 max_frame_length;
+
+	ge_mac_cfg_0.value = 0;
+	buf_int_enable.value = 0;
+	/* Enable Rx and Tx statistics */
+	ge_mac_cfg_2->stat_en = NPS_ENET_GE_MAC_CFG_2_STAT_EN;
+
+	/* Discard packets with different MAC address */
+	ge_mac_cfg_2->disc_da = NPS_ENET_ENABLE;
+
+	/* Discard multicast packets */
+	ge_mac_cfg_2->disc_mc = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+
+	/* Discard Packets bigger than max frame length */
+	max_frame_length = ETH_HLEN + ndev->mtu + ETH_FCS_LEN;
+	if (max_frame_length <= NPS_ENET_MAX_FRAME_LENGTH) {
+		ge_mac_cfg_3->max_len = max_frame_length;
+		nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_3,
+				 ge_mac_cfg_3->value);
+	}
+
+	/* Enable interrupts */
+	buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
+	buf_int_enable.tx_done = NPS_ENET_ENABLE;
+	nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
+			 buf_int_enable.value);
+
+	/* Write device MAC address to HW */
+	nps_enet_set_hw_mac_address(ndev);
+
+	/* Rx and Tx HW features */
+	ge_mac_cfg_0.tx_pad_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_crc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_crc_strip = NPS_ENET_ENABLE;
+
+	/* IFG configuration */
+	ge_mac_cfg_0.rx_ifg = NPS_ENET_GE_MAC_CFG_0_RX_IFG;
+	ge_mac_cfg_0.tx_ifg = NPS_ENET_GE_MAC_CFG_0_TX_IFG;
+
+	/* preamble configuration */
+	ge_mac_cfg_0.rx_pr_check_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_pr_len = NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN;
+
+	/* enable flow control frames */
+	ge_mac_cfg_0.tx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_fc_retr = NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR;
+
+	/* Enable Rx and Tx */
+	ge_mac_cfg_0.rx_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_en = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0,
+			 ge_mac_cfg_0.value);
+}
+
+static void nps_enet_hw_disable_control(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	/* Disable interrupts */
+	nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
+
+	/* Disable Rx and Tx */
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0, 0);
+}
+
+static void nps_enet_send_frame(struct net_device *ndev,
+				struct sk_buff *skb)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_tx_ctl tx_ctrl;
+	short length = skb->len;
+	u32 i, len = DIV_ROUND_UP(length, sizeof(u32));
+	u32 *src = (u32 *)virt_to_phys(skb->data);
+	bool src_is_aligned = IS_ALIGNED((unsigned long)src, sizeof(u32));
+
+	tx_ctrl.value = 0;
+	/* In case src is not aligned we need an intermediate buffer */
+	if (src_is_aligned)
+		for (i = 0; i < len; i++, src++)
+			nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, *src);
+	else { /* !src_is_aligned */
+		for (i = 0; i < len; i++, src++) {
+			u32 buf;
+
+			/* to accommodate word-unaligned address of "src"
+			 * we have to do memcpy_fromio() instead of simple "="
+			 */
+			memcpy_fromio(&buf, (void __iomem *)src, sizeof(buf));
+			nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, buf);
+		}
+	}
+	/* Write the length of the Frame */
+	tx_ctrl.nt = length;
+
+	/* Indicate SW is done */
+	priv->tx_packet_sent = true;
+	tx_ctrl.ct = NPS_ENET_ENABLE;
+
+	/* Send Frame */
+	nps_enet_reg_set(priv, NPS_ENET_REG_TX_CTL, tx_ctrl.value);
+}
+
+/**
+ * nps_enet_set_mac_address - Set the MAC address for this device.
+ * @ndev:       Pointer to net_device structure.
+ * @p:          6 byte Address to be written as MAC address.
+ *
+ * This function copies the HW address from the sockaddr structure to the
+ * net_device structure and updates the address in HW.
+ *
+ * returns:     -EBUSY if the net device is busy or 0 if the address is set
+ *              successfully.
+ */
+static s32 nps_enet_set_mac_address(struct net_device *ndev, void *p)
+{
+	struct sockaddr *addr = p;
+	s32 res;
+
+	if (netif_running(ndev))
+		return -EBUSY;
+
+	res = eth_mac_addr(ndev, p);
+	if (!res) {
+		ether_addr_copy(ndev->dev_addr, addr->sa_data);
+		nps_enet_set_hw_mac_address(ndev);
+	}
+
+	return res;
+}
+
+/**
+ * nps_enet_set_rx_mode - Change the receive filtering mode.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function enables/disables promiscuous mode
+ */
+static void nps_enet_set_rx_mode(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
+
+	ge_mac_cfg_2.value = priv->ge_mac_cfg_2.value;
+
+	if (ndev->flags & IFF_PROMISC) {
+		ge_mac_cfg_2.disc_da = NPS_ENET_DISABLE;
+		ge_mac_cfg_2.disc_mc = NPS_ENET_DISABLE;
+	} else {
+		ge_mac_cfg_2.disc_da = NPS_ENET_ENABLE;
+		ge_mac_cfg_2.disc_mc = NPS_ENET_ENABLE;
+	}
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2, ge_mac_cfg_2.value);
+}
+
+/**
+ * nps_enet_open - Open the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * returns: 0, on success or non-zero error value on failure.
+ *
+ * This function enables an IRQs for the ENET device and starts the Tx queue.
+ */
+static s32 nps_enet_open(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	s32 err;
+
+	/* Reset private variables */
+	priv->tx_packet_sent = false;
+	priv->ge_mac_cfg_2.value = 0;
+	priv->ge_mac_cfg_3.value = 0;
+
+	/* ge_mac_cfg_3 default values */
+	priv->ge_mac_cfg_3.rx_ifg_th = NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH;
+	priv->ge_mac_cfg_3.max_len = NPS_ENET_GE_MAC_CFG_3_MAX_LEN;
+
+	/* Disable HW device */
+	nps_enet_hw_disable_control(ndev);
+
+	/* irq Rx allocation */
+	err = request_irq(priv->irq, nps_enet_irq_handler,
+			  0, "enet-rx-tx", ndev);
+	if (err)
+		return err;
+
+	napi_enable(&priv->napi);
+
+	/* Enable HW device */
+	nps_enet_hw_reset(ndev);
+	nps_enet_hw_enable_control(ndev);
+
+	netif_start_queue(ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_stop - Close the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function stops the Tx queue, disables interrupts for the ENET device.
+ */
+static s32 nps_enet_stop(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	napi_disable(&priv->napi);
+	netif_stop_queue(ndev);
+	nps_enet_hw_disable_control(ndev);
+	free_irq(priv->irq, ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_start_xmit - Starts the data transmission.
+ * @skb:        sk_buff pointer that contains data to be Transmitted.
+ * @ndev:       Pointer to net_device structure.
+ *
+ * returns: NETDEV_TX_OK, on success
+ *              NETDEV_TX_BUSY, if any of the descriptors are not free.
+ *
+ * This function is invoked from upper layers to initiate transmission.
+ */
+static netdev_tx_t nps_enet_start_xmit(struct sk_buff *skb,
+				       struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	/* This driver handles one frame at a time  */
+	netif_stop_queue(ndev);
+
+	nps_enet_send_frame(ndev, skb);
+
+	priv->tx_skb = skb;
+
+	return NETDEV_TX_OK;
+}
+
+#ifdef CONFIG_NET_POLL_CONTROLLER
+static void nps_enet_poll_controller(struct net_device *ndev)
+{
+	disable_irq(ndev->irq);
+	nps_enet_irq_handler(ndev->irq, ndev);
+	enable_irq(ndev->irq);
+}
+#endif
+
+static const struct net_device_ops nps_netdev_ops = {
+	.ndo_open		= nps_enet_open,
+	.ndo_stop		= nps_enet_stop,
+	.ndo_start_xmit		= nps_enet_start_xmit,
+	.ndo_set_mac_address	= nps_enet_set_mac_address,
+	.ndo_set_rx_mode        = nps_enet_set_rx_mode,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+	.ndo_poll_controller	= nps_enet_poll_controller,
+#endif
+};
+
+static s32 nps_enet_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct net_device *ndev;
+	struct nps_enet_priv *priv;
+	s32 err = 0;
+	const char *mac_addr;
+	struct resource *res_regs;
+
+	if (!dev->of_node)
+		return -ENODEV;
+
+	ndev = alloc_etherdev(sizeof(struct nps_enet_priv));
+	if (!ndev)
+		return -ENOMEM;
+
+	platform_set_drvdata(pdev, ndev);
+	SET_NETDEV_DEV(ndev, dev);
+	priv = netdev_priv(ndev);
+
+	/* The EZ NET specific entries in the device structure. */
+	ndev->netdev_ops = &nps_netdev_ops;
+	ndev->watchdog_timeo = (400 * HZ / 1000);
+	/* FIXME :: no multicast support yet */
+	ndev->flags &= ~IFF_MULTICAST;
+
+	res_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	priv->regs_base = devm_ioremap_resource(dev, res_regs);
+	if (IS_ERR(priv->regs_base)) {
+		err = PTR_ERR(priv->regs_base);
+		goto out_netdev;
+	}
+	dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs_base);
+
+	/* set kernel MAC address to dev */
+	mac_addr = of_get_mac_address(dev->of_node);
+	if (mac_addr)
+		ether_addr_copy(ndev->dev_addr, mac_addr);
+	else
+		eth_hw_addr_random(ndev);
+
+	/* Get IRQ number */
+	priv->irq = platform_get_irq(pdev, 0);
+	if (!priv->irq) {
+		dev_err(dev, "failed to retrieve <irq Rx-Tx> value from device tree\n");
+		err = -ENODEV;
+		goto out_netdev;
+	}
+
+	netif_napi_add(ndev, &priv->napi, nps_enet_poll,
+		       NPS_ENET_NAPI_POLL_WEIGHT);
+
+	/* Register the driver. Should be the last thing in probe */
+	err = register_netdev(ndev);
+	if (err) {
+		dev_err(dev, "Failed to register ndev for %s, err = 0x%08x\n",
+			ndev->name, (s32)err);
+		err = -ENODEV;
+		goto out_netif_api;
+	}
+
+	dev_info(dev, "(rx/tx=%d)\n", priv->irq);
+	return 0;
+
+out_netif_api:
+	netif_napi_del(&priv->napi);
+out_netdev:
+	if (err)
+		free_netdev(ndev);
+
+	return err;
+}
+
+static s32 nps_enet_remove(struct platform_device *pdev)
+{
+	struct net_device *ndev = platform_get_drvdata(pdev);
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	unregister_netdev(ndev);
+	free_netdev(ndev);
+	netif_napi_del(&priv->napi);
+
+	return 0;
+}
+
+static const struct of_device_id nps_enet_dt_ids[] = {
+	{ .compatible = "ezchip,nps-mgt-enet" },
+	{ /* Sentinel */ }
+};
+
+static struct platform_driver nps_enet_driver = {
+	.probe = nps_enet_probe,
+	.remove = nps_enet_remove,
+	.driver = {
+		.name = DRV_NAME,
+		.of_match_table  = nps_enet_dt_ids,
+	},
+};
+
+module_platform_driver(nps_enet_driver);
+
+MODULE_AUTHOR("EZchip Semiconductor");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/net/ethernet/ezchip/nps_enet.h b/drivers/net/ethernet/ezchip/nps_enet.h
new file mode 100644
index 0000000..fc45c9d
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.h
@@ -0,0 +1,336 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#ifndef _NPS_ENET_H
+#define _NPS_ENET_H
+
+/* default values */
+#define NPS_ENET_NAPI_POLL_WEIGHT		0x2
+#define NPS_ENET_MAX_FRAME_LENGTH		0x3FFF
+#define NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR	0x7
+#define NPS_ENET_GE_MAC_CFG_0_RX_IFG		0x5
+#define NPS_ENET_GE_MAC_CFG_0_TX_IFG		0xC
+#define NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN		0x7
+#define NPS_ENET_GE_MAC_CFG_2_STAT_EN		0x3
+#define NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH		0x14
+#define NPS_ENET_GE_MAC_CFG_3_MAX_LEN		0x3FFC
+#define NPS_ENET_ENABLE				1
+#define NPS_ENET_DISABLE			0
+
+/* register definitions  */
+#define NPS_ENET_REG_TX_CTL		0x800
+#define NPS_ENET_REG_TX_BUF		0x808
+#define NPS_ENET_REG_RX_CTL		0x810
+#define NPS_ENET_REG_RX_BUF		0x818
+#define NPS_ENET_REG_BUF_INT_ENABLE	0x8C0
+#define NPS_ENET_REG_BUF_INT_CAUSE	0x8C4
+#define NPS_ENET_REG_GE_MAC_CFG_0	0x1000
+#define NPS_ENET_REG_GE_MAC_CFG_1	0x1004
+#define NPS_ENET_REG_GE_MAC_CFG_2	0x1008
+#define NPS_ENET_REG_GE_MAC_CFG_3	0x100C
+#define NPS_ENET_REG_GE_RST		0x1400
+#define NPS_ENET_REG_PHASE_FIFO_CTL	0x1404
+
+/* Tx control register */
+struct nps_enet_tx_ctl {
+	union {
+		/* ct: SW sets to indicate frame ready in Tx buffer for
+		 *     transmission. HW resets to when transmission done
+		 * et: Transmit error
+		 * nt: Length in bytes of Tx frame loaded to Tx buffer
+		 */
+		struct {
+			u32
+			__reserved_1:16,
+			ct:1,
+			et:1,
+			__reserved_2:3,
+			nt:11;
+		};
+
+		u32 value;
+	};
+};
+
+/* Rx control register */
+struct nps_enet_rx_ctl {
+	union {
+		/* cr:  HW sets to indicate frame ready in Rx buffer.
+		 *      SW resets to indicate host read received frame
+		 *      and new frames can be written to Rx buffer
+		 * er:  Rx error indication
+		 * crc: Rx CRC error indication
+		 * nr:  Length in bytes of Rx frame loaded by MAC to Rx buffer
+		 */
+		struct {
+			u32
+			__reserved_1:16,
+			cr:1,
+			er:1,
+			crc:1,
+			__reserved_2:2,
+			nr:11;
+		};
+
+		u32 value;
+	};
+};
+
+/* Interrupt enable for data buffer events register */
+struct nps_enet_buf_int_enable {
+	union {
+		/* tx_done: Interrupt generation in the case when new frame
+		 *          is ready in Rx buffer
+		 * rx_rdy:  Interrupt generation in the case when current frame
+		 *          was read from TX buffer
+		 */
+		struct {
+			u32
+			__reserved:30,
+			tx_done:1,
+			rx_rdy:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Interrupt cause for data buffer events register */
+struct nps_enet_buf_int_cause {
+	union {
+		/* tx_done: Interrupt in the case when current frame was
+		 *          read from TX buffer.
+		 * rx_rdy:  Interrupt in the case when new frame is ready
+		 *          in RX buffer.
+		 */
+		struct {
+			u32
+			__reserved:30,
+			tx_done:1,
+			rx_rdy:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 0 register */
+struct nps_enet_ge_mac_cfg_0 {
+	union {
+		/* tx_pr_len:          Transmit preamble length in bytes
+		 * tx_ifg_nib:         Tx idle pattern
+		 * nib_mode:           Nibble (4-bit) Mode
+		 * rx_pr_check_en:     Receive preamble Check Enable
+		 * tx_ifg:             Transmit inter-Frame Gap
+		 * rx_ifg:             Receive inter-Frame Gap
+		 * tx_fc_retr:         Transmit Flow Control Retransmit Mode
+		 * rx_length_check_en: Receive Length Check Enable
+		 * rx_crc_ignore:      Results of the CRC check are ignored
+		 * rx_crc_strip:       MAC strips the CRC from received frames
+		 * rx_fc_en:           Receive Flow Control Enable
+		 * tx_crc_en:          Transmit CRC Enabled
+		 * tx_pad_en:          Transmit Padding Enable
+		 * tx_cf_en:           Transmit Flow Control Enable
+		 * tx_en:              Transmit Enable
+		 * rx_en:              Receive Enable
+		 */
+		struct {
+			u32
+			tx_pr_len:4,
+			tx_ifg_nib:4,
+			nib_mode:1,
+			rx_pr_check_en:1,
+			tx_ifg:6,
+			rx_ifg:4,
+			tx_fc_retr:3,
+			rx_length_check_en:1,
+			rx_crc_ignore:1,
+			rx_crc_strip:1,
+			rx_fc_en:1,
+			tx_crc_en:1,
+			tx_pad_en:1,
+			tx_fc_en:1,
+			tx_en:1,
+			rx_en:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 1 register */
+struct nps_enet_ge_mac_cfg_1 {
+	union {
+		/* octet_3: MAC address octet 3
+		 * octet_2: MAC address octet 2
+		 * octet_1: MAC address octet 1
+		 * octet_0: MAC address octet 0
+		 */
+		struct {
+			u32
+			octet_3:8,
+			octet_2:8,
+			octet_1:8,
+			octet_0:8;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 2 register */
+struct nps_enet_ge_mac_cfg_2 {
+	union {
+		/* transmit_flush_en: MAC flush enable
+		 * stat_en:           RMON statistics interface enable
+		 * disc_da:           Discard frames with DA different
+		 *                    from MAC address
+		 * disc_bc:           Discard broadcast frames
+		 * disc_mc:           Discard multicast frames
+		 * octet_5:           MAC address octet 5
+		 * octet_4:           MAC address octet 4
+		 */
+		struct {
+			u32
+			transmit_flush_en:1,
+			__reserved_1:5,
+			stat_en:2,
+			__reserved_2:1,
+			disc_da:1,
+			disc_bc:1,
+			disc_mc:1,
+			__reserved_3:4,
+			octet_5:8,
+			octet_4:8;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 3 register */
+struct nps_enet_ge_mac_cfg_3 {
+	union {
+		/* ext_oob_cbfc_sel:  Selects one of the 4 profiles for
+		 *                    extended OOB in-flow-control indication
+		 * max_len:           Maximum receive frame length in bytes
+		 * tx_cbfc_en:        Enable transmission of class-based
+		 *                    flow control packets
+		 * rx_ifg_th:         Threshold for IFG status reporting via OOB
+		 * cf_timeout:        Configurable time to decrement FC counters
+		 * cf_drop:           Drop control frames
+		 * redirect_cbfc_sel: Selects one of CBFC redirect profiles
+		 * rx_cbfc_redir_en:  Enable Rx class-based flow
+		 *                    control redirect
+		 * rx_cbfc_en:        Enable Rx class-based flow control
+		 * tm_hd_mode:        TM header mode
+		 */
+		struct {
+			u32
+			ext_oob_cbfc_sel:2,
+			max_len:14,
+			tx_cbfc_en:1,
+			rx_ifg_th:5,
+			cf_timeout:4,
+			cf_drop:1,
+			redirect_cbfc_sel:2,
+			rx_cbfc_redir_en:1,
+			rx_cbfc_en:1,
+			tm_hd_mode:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* GE MAC, PCS reset control register */
+struct nps_enet_ge_rst {
+	union {
+		/* gmac_0: GE MAC reset
+		 * spcs_0: SGMII PCS reset
+		 */
+		struct {
+			u32
+			__reserved_1:23,
+			gmac_0:1,
+			__reserved_2:7,
+			spcs_0:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Tx phase sync FIFO control register */
+struct nps_enet_phase_fifo_ctl {
+	union {
+		/* init: initialize serdes TX phase sync FIFO pointers
+		 * rst:  reset serdes TX phase sync FIFO
+		 */
+		struct {
+			u32
+			__reserved:30,
+			init:1,
+			rst:1;
+		};
+
+		u32 value;
+	};
+};
+
+/**
+ * struct nps_enet_priv - Storage of ENET's private information.
+ * @regs_base:      Base address of ENET memory-mapped control registers.
+ * @irq:            For RX/TX IRQ number.
+ * @tx_packet_sent: SW indication if frame is being sent.
+ * @tx_skb:         socket buffer of sent frame.
+ * @napi:           Structure for NAPI.
+ */
+struct nps_enet_priv {
+	void __iomem *regs_base;
+	s32 irq;
+	bool tx_packet_sent;
+	struct sk_buff *tx_skb;
+	struct napi_struct napi;
+	struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 ge_mac_cfg_3;
+};
+
+/**
+ * nps_reg_set - Sets ENET register with provided value.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ * @value:      Value to set in register.
+ */
+static inline void nps_enet_reg_set(struct nps_enet_priv *priv,
+				    s32 reg, s32 value)
+{
+	iowrite32be(value, priv->regs_base + reg);
+}
+
+/**
+ * nps_reg_get - Gets value of specified ENET register.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ *
+ * returns:     Value of requested register.
+ */
+static inline u32 nps_enet_reg_get(struct nps_enet_priv *priv, s32 reg)
+{
+	return ioread32be(priv->regs_base + reg);
+}
+
+#endif /* _NPS_ENET_H */
-- 
1.7.1

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^ permalink raw reply related	[flat|nested] 28+ messages in thread

* [PATCH v6] NET: Add ezchip ethernet driver
@ 2015-06-22 20:51           ` Noam Camus
  0 siblings, 0 replies; 28+ messages in thread
From: Noam Camus @ 2015-06-22 20:51 UTC (permalink / raw)
  To: netdev, linux-kernel
  Cc: Alexey.Brodkin, vgupta, giladb, cmetcalf, Noam Camus, Tal Zilcer

From: Noam Camus <noamc@ezchip.com>

Simple LAN device for debug or management purposes.
Device supports interrupts for RX and TX(completion).
Device does not have DMA ability.

Signed-off-by: Noam Camus <noamc@ezchip.com>
Signed-off-by: Tal Zilcer <talz@ezchip.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
---
Change log for v6:
Below changes are in response for David Miller comments.
I used more recent version of GCC and sparse tools.
The tools reported on several issues which I fixed with following
changes:
1) Fix typo on method name called from nps_enet_poll_controller.
2) Fix casting when using IS_ALIGNED() macro.
3) Add casting when using memcpy_toio()/memcpy_fromio().
4) Remove C99 style of structure members designated initializer.
---
 .../devicetree/bindings/net/ezchip_enet.txt        |   15 +
 drivers/net/ethernet/Kconfig                       |    1 +
 drivers/net/ethernet/Makefile                      |    1 +
 drivers/net/ethernet/ezchip/Kconfig                |   27 +
 drivers/net/ethernet/ezchip/Makefile               |    1 +
 drivers/net/ethernet/ezchip/nps_enet.c             |  658 ++++++++++++++++++++
 drivers/net/ethernet/ezchip/nps_enet.h             |  336 ++++++++++
 7 files changed, 1039 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/ezchip_enet.txt
 create mode 100644 drivers/net/ethernet/ezchip/Kconfig
 create mode 100644 drivers/net/ethernet/ezchip/Makefile
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.c
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.h

diff --git a/Documentation/devicetree/bindings/net/ezchip_enet.txt b/Documentation/devicetree/bindings/net/ezchip_enet.txt
new file mode 100644
index 0000000..4e29b2b
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ezchip_enet.txt
@@ -0,0 +1,15 @@
+* EZchip NPS Management Ethernet port driver
+
+Required properties:
+- compatible: Should be "ezchip,nps-mgt-enet"
+- reg: Address and length of the register set for the device
+- interrupts: Should contain the ENET interrupt
+
+Examples:
+
+	ethernet@f0003000 {
+		compatible = "ezchip,nps-mgt-enet";
+		reg = <0xf0003000 0x44>;
+		interrupts = <7>;
+		mac-address = [ 00 11 22 33 44 55 ];
+	};
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index eadcb05..1a6b1ba 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -66,6 +66,7 @@ config DNET
 source "drivers/net/ethernet/dec/Kconfig"
 source "drivers/net/ethernet/dlink/Kconfig"
 source "drivers/net/ethernet/emulex/Kconfig"
+source "drivers/net/ethernet/ezchip/Kconfig"
 source "drivers/net/ethernet/neterion/Kconfig"
 source "drivers/net/ethernet/faraday/Kconfig"
 source "drivers/net/ethernet/freescale/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 1367afc..489f9cc 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_DNET) += dnet.o
 obj-$(CONFIG_NET_VENDOR_DEC) += dec/
 obj-$(CONFIG_NET_VENDOR_DLINK) += dlink/
 obj-$(CONFIG_NET_VENDOR_EMULEX) += emulex/
+obj-$(CONFIG_NET_VENDOR_EZCHIP) += ezchip/
 obj-$(CONFIG_NET_VENDOR_EXAR) += neterion/
 obj-$(CONFIG_NET_VENDOR_FARADAY) += faraday/
 obj-$(CONFIG_NET_VENDOR_FREESCALE) += freescale/
diff --git a/drivers/net/ethernet/ezchip/Kconfig b/drivers/net/ethernet/ezchip/Kconfig
new file mode 100644
index 0000000..d031177
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Kconfig
@@ -0,0 +1,27 @@
+#
+# EZchip network device configuration
+#
+
+config NET_VENDOR_EZCHIP
+	bool "EZchip devices"
+	default y
+	---help---
+	  If you have a network (Ethernet) device belonging to this class, say Y
+	  and read the Ethernet-HOWTO, available from
+	  <http://www.tldp.org/docs.html#howto>.
+
+	  Note that the answer to this question doesn't directly affect the
+	  kernel: saying N will just cause the configurator to skip all
+	  the questions about EZchip devices. If you say Y, you will be asked for
+	  your specific device in the following questions.
+
+if NET_VENDOR_EZCHIP
+
+config EZCHIP_NPS_MANAGEMENT_ENET
+	tristate "EZchip NPS management enet support"
+	---help---
+	  Simple LAN device for debug or management purposes.
+	  Device supports interrupts for RX and TX(completion).
+	  Device does not have DMA ability.
+
+endif
diff --git a/drivers/net/ethernet/ezchip/Makefile b/drivers/net/ethernet/ezchip/Makefile
new file mode 100644
index 0000000..e490176
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_EZCHIP_NPS_MANAGEMENT_ENET) += nps_enet.o
diff --git a/drivers/net/ethernet/ezchip/nps_enet.c b/drivers/net/ethernet/ezchip/nps_enet.c
new file mode 100644
index 0000000..53e9659
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.c
@@ -0,0 +1,658 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#include <linux/module.h>
+#include <linux/etherdevice.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_net.h>
+#include <linux/of_platform.h>
+#include "nps_enet.h"
+
+#define DRV_NAME			"nps_mgt_enet"
+
+static void nps_enet_clean_rx_fifo(struct net_device *ndev, u32 frame_len)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	u32 i, len = DIV_ROUND_UP(frame_len, sizeof(u32));
+
+	/* Empty Rx FIFO buffer by reading all words */
+	for (i = 0; i < len; i++)
+		nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+}
+
+static void nps_enet_read_rx_fifo(struct net_device *ndev,
+				  unsigned char *dst, u32 length)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	s32 i, last = length & (sizeof(u32) - 1);
+	u32 *reg = (u32 *)dst, len = length / sizeof(u32);
+	bool dst_is_aligned = IS_ALIGNED((unsigned long)dst, sizeof(u32));
+
+	/* In case dst is not aligned we need an intermediate buffer */
+	if (dst_is_aligned)
+		for (i = 0; i < len; i++, reg++)
+			*reg = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+	else { /* !dst_is_aligned */
+		for (i = 0; i < len; i++, reg++) {
+			u32 buf =
+				nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+
+			/* to accommodate word-unaligned address of "reg"
+			 * we have to do memcpy_toio() instead of simple "=".
+			 */
+			memcpy_toio((void __iomem *)reg, &buf, sizeof(buf));
+		}
+	}
+
+	/* copy last bytes (if any) */
+	if (last) {
+		u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+
+		memcpy_toio((void __iomem *)reg, &buf, last);
+	}
+}
+
+static u32 nps_enet_rx_handler(struct net_device *ndev)
+{
+	u32 frame_len, err = 0;
+	u32 work_done = 0;
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct sk_buff *skb;
+	struct nps_enet_rx_ctl rx_ctrl;
+
+	rx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_RX_CTL);
+	frame_len = rx_ctrl.nr;
+
+	/* Check if we got RX */
+	if (!rx_ctrl.cr)
+		return work_done;
+
+	/* If we got here there is a work for us */
+	work_done++;
+
+	/* Check Rx error */
+	if (rx_ctrl.er) {
+		ndev->stats.rx_errors++;
+		err = 1;
+	}
+
+	/* Check Rx CRC error */
+	if (rx_ctrl.crc) {
+		ndev->stats.rx_crc_errors++;
+		ndev->stats.rx_dropped++;
+		err = 1;
+	}
+
+	/* Check Frame length Min 64b */
+	if (unlikely(frame_len < ETH_ZLEN)) {
+		ndev->stats.rx_length_errors++;
+		ndev->stats.rx_dropped++;
+		err = 1;
+	}
+
+	if (err)
+		goto rx_irq_clean;
+
+	/* Skb allocation */
+	skb = netdev_alloc_skb_ip_align(ndev, frame_len);
+	if (unlikely(!skb)) {
+		ndev->stats.rx_errors++;
+		ndev->stats.rx_dropped++;
+		goto rx_irq_clean;
+	}
+
+	/* Copy frame from Rx fifo into the skb */
+	nps_enet_read_rx_fifo(ndev, skb->data, frame_len);
+
+	skb_put(skb, frame_len);
+	skb->protocol = eth_type_trans(skb, ndev);
+	skb->ip_summed = CHECKSUM_UNNECESSARY;
+
+	ndev->stats.rx_packets++;
+	ndev->stats.rx_bytes += frame_len;
+	netif_receive_skb(skb);
+
+	goto rx_irq_frame_done;
+
+rx_irq_clean:
+	/* Clean Rx fifo */
+	nps_enet_clean_rx_fifo(ndev, frame_len);
+
+rx_irq_frame_done:
+	/* Ack Rx ctrl register */
+	nps_enet_reg_set(priv, NPS_ENET_REG_RX_CTL, 0);
+
+	return work_done;
+}
+
+static void nps_enet_tx_handler(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_tx_ctl tx_ctrl;
+
+	tx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_TX_CTL);
+
+	/* Check if we got TX */
+	if (!priv->tx_packet_sent || tx_ctrl.ct)
+		return;
+
+	/* Check Tx transmit error */
+	if (unlikely(tx_ctrl.et)) {
+		ndev->stats.tx_errors++;
+	} else {
+		ndev->stats.tx_packets++;
+		ndev->stats.tx_bytes += tx_ctrl.nt;
+	}
+
+	if (priv->tx_skb) {
+		dev_kfree_skb(priv->tx_skb);
+		priv->tx_skb = NULL;
+	}
+
+	priv->tx_packet_sent = false;
+
+	if (netif_queue_stopped(ndev))
+		netif_wake_queue(ndev);
+}
+
+/**
+ * nps_enet_poll - NAPI poll handler.
+ * @napi:       Pointer to napi_struct structure.
+ * @budget:     How many frames to process on one call.
+ *
+ * returns:     Number of processed frames
+ */
+static int nps_enet_poll(struct napi_struct *napi, int budget)
+{
+	struct net_device *ndev = napi->dev;
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_buf_int_enable buf_int_enable;
+	u32 work_done;
+
+	buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
+	buf_int_enable.tx_done = NPS_ENET_ENABLE;
+	nps_enet_tx_handler(ndev);
+	work_done = nps_enet_rx_handler(ndev);
+	if (work_done < budget) {
+		napi_complete(napi);
+		nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
+				 buf_int_enable.value);
+	}
+
+	return work_done;
+}
+
+/**
+ * nps_enet_irq_handler - Global interrupt handler for ENET.
+ * @irq:                irq number.
+ * @dev_instance:       device instance.
+ *
+ * returns: IRQ_HANDLED for all cases.
+ *
+ * EZchip ENET has 2 interrupt causes, and depending on bits raised in
+ * CTRL registers we may tell what is a reason for interrupt to fire up.
+ * We got one for RX and the other for TX (completion).
+ */
+static irqreturn_t nps_enet_irq_handler(s32 irq, void *dev_instance)
+{
+	struct net_device *ndev = dev_instance;
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_buf_int_cause buf_int_cause;
+
+	buf_int_cause.value =
+			nps_enet_reg_get(priv, NPS_ENET_REG_BUF_INT_CAUSE);
+
+	if (buf_int_cause.tx_done || buf_int_cause.rx_rdy)
+		if (likely(napi_schedule_prep(&priv->napi))) {
+			nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
+			__napi_schedule(&priv->napi);
+		}
+
+	return IRQ_HANDLED;
+}
+
+static void nps_enet_set_hw_mac_address(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_mac_cfg_1 ge_mac_cfg_1;
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
+
+	/* set MAC address in HW */
+	ge_mac_cfg_1.octet_0 = ndev->dev_addr[0];
+	ge_mac_cfg_1.octet_1 = ndev->dev_addr[1];
+	ge_mac_cfg_1.octet_2 = ndev->dev_addr[2];
+	ge_mac_cfg_1.octet_3 = ndev->dev_addr[3];
+	ge_mac_cfg_2->octet_4 = ndev->dev_addr[4];
+	ge_mac_cfg_2->octet_5 = ndev->dev_addr[5];
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_1,
+			 ge_mac_cfg_1.value);
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+}
+
+/**
+ * nps_enet_hw_reset - Reset the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function reset the PCS and TX fifo.
+ * The programming model is to set the relevant reset bits
+ * wait for some time for this to propagate and then unset
+ * the reset bits. This way we ensure that reset procedure
+ * is done successfully by device.
+ */
+static void nps_enet_hw_reset(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_rst ge_rst;
+	struct nps_enet_phase_fifo_ctl phase_fifo_ctl;
+
+	ge_rst.value = 0;
+	phase_fifo_ctl.value = 0;
+	/* Pcs reset sequence*/
+	ge_rst.gmac_0 = NPS_ENET_ENABLE;
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+	usleep_range(10, 20);
+	ge_rst.value = 0;
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+
+	/* Tx fifo reset sequence */
+	phase_fifo_ctl.rst = NPS_ENET_ENABLE;
+	phase_fifo_ctl.init = NPS_ENET_ENABLE;
+	nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+	usleep_range(10, 20);
+	phase_fifo_ctl.value = 0;
+	nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+}
+
+static void nps_enet_hw_enable_control(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_mac_cfg_0 ge_mac_cfg_0;
+	struct nps_enet_buf_int_enable buf_int_enable;
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 *ge_mac_cfg_3 = &priv->ge_mac_cfg_3;
+	s32 max_frame_length;
+
+	ge_mac_cfg_0.value = 0;
+	buf_int_enable.value = 0;
+	/* Enable Rx and Tx statistics */
+	ge_mac_cfg_2->stat_en = NPS_ENET_GE_MAC_CFG_2_STAT_EN;
+
+	/* Discard packets with different MAC address */
+	ge_mac_cfg_2->disc_da = NPS_ENET_ENABLE;
+
+	/* Discard multicast packets */
+	ge_mac_cfg_2->disc_mc = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+
+	/* Discard Packets bigger than max frame length */
+	max_frame_length = ETH_HLEN + ndev->mtu + ETH_FCS_LEN;
+	if (max_frame_length <= NPS_ENET_MAX_FRAME_LENGTH) {
+		ge_mac_cfg_3->max_len = max_frame_length;
+		nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_3,
+				 ge_mac_cfg_3->value);
+	}
+
+	/* Enable interrupts */
+	buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
+	buf_int_enable.tx_done = NPS_ENET_ENABLE;
+	nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
+			 buf_int_enable.value);
+
+	/* Write device MAC address to HW */
+	nps_enet_set_hw_mac_address(ndev);
+
+	/* Rx and Tx HW features */
+	ge_mac_cfg_0.tx_pad_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_crc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_crc_strip = NPS_ENET_ENABLE;
+
+	/* IFG configuration */
+	ge_mac_cfg_0.rx_ifg = NPS_ENET_GE_MAC_CFG_0_RX_IFG;
+	ge_mac_cfg_0.tx_ifg = NPS_ENET_GE_MAC_CFG_0_TX_IFG;
+
+	/* preamble configuration */
+	ge_mac_cfg_0.rx_pr_check_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_pr_len = NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN;
+
+	/* enable flow control frames */
+	ge_mac_cfg_0.tx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_fc_retr = NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR;
+
+	/* Enable Rx and Tx */
+	ge_mac_cfg_0.rx_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_en = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0,
+			 ge_mac_cfg_0.value);
+}
+
+static void nps_enet_hw_disable_control(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	/* Disable interrupts */
+	nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
+
+	/* Disable Rx and Tx */
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0, 0);
+}
+
+static void nps_enet_send_frame(struct net_device *ndev,
+				struct sk_buff *skb)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_tx_ctl tx_ctrl;
+	short length = skb->len;
+	u32 i, len = DIV_ROUND_UP(length, sizeof(u32));
+	u32 *src = (u32 *)virt_to_phys(skb->data);
+	bool src_is_aligned = IS_ALIGNED((unsigned long)src, sizeof(u32));
+
+	tx_ctrl.value = 0;
+	/* In case src is not aligned we need an intermediate buffer */
+	if (src_is_aligned)
+		for (i = 0; i < len; i++, src++)
+			nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, *src);
+	else { /* !src_is_aligned */
+		for (i = 0; i < len; i++, src++) {
+			u32 buf;
+
+			/* to accommodate word-unaligned address of "src"
+			 * we have to do memcpy_fromio() instead of simple "="
+			 */
+			memcpy_fromio(&buf, (void __iomem *)src, sizeof(buf));
+			nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, buf);
+		}
+	}
+	/* Write the length of the Frame */
+	tx_ctrl.nt = length;
+
+	/* Indicate SW is done */
+	priv->tx_packet_sent = true;
+	tx_ctrl.ct = NPS_ENET_ENABLE;
+
+	/* Send Frame */
+	nps_enet_reg_set(priv, NPS_ENET_REG_TX_CTL, tx_ctrl.value);
+}
+
+/**
+ * nps_enet_set_mac_address - Set the MAC address for this device.
+ * @ndev:       Pointer to net_device structure.
+ * @p:          6 byte Address to be written as MAC address.
+ *
+ * This function copies the HW address from the sockaddr structure to the
+ * net_device structure and updates the address in HW.
+ *
+ * returns:     -EBUSY if the net device is busy or 0 if the address is set
+ *              successfully.
+ */
+static s32 nps_enet_set_mac_address(struct net_device *ndev, void *p)
+{
+	struct sockaddr *addr = p;
+	s32 res;
+
+	if (netif_running(ndev))
+		return -EBUSY;
+
+	res = eth_mac_addr(ndev, p);
+	if (!res) {
+		ether_addr_copy(ndev->dev_addr, addr->sa_data);
+		nps_enet_set_hw_mac_address(ndev);
+	}
+
+	return res;
+}
+
+/**
+ * nps_enet_set_rx_mode - Change the receive filtering mode.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function enables/disables promiscuous mode
+ */
+static void nps_enet_set_rx_mode(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
+
+	ge_mac_cfg_2.value = priv->ge_mac_cfg_2.value;
+
+	if (ndev->flags & IFF_PROMISC) {
+		ge_mac_cfg_2.disc_da = NPS_ENET_DISABLE;
+		ge_mac_cfg_2.disc_mc = NPS_ENET_DISABLE;
+	} else {
+		ge_mac_cfg_2.disc_da = NPS_ENET_ENABLE;
+		ge_mac_cfg_2.disc_mc = NPS_ENET_ENABLE;
+	}
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2, ge_mac_cfg_2.value);
+}
+
+/**
+ * nps_enet_open - Open the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * returns: 0, on success or non-zero error value on failure.
+ *
+ * This function enables an IRQs for the ENET device and starts the Tx queue.
+ */
+static s32 nps_enet_open(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	s32 err;
+
+	/* Reset private variables */
+	priv->tx_packet_sent = false;
+	priv->ge_mac_cfg_2.value = 0;
+	priv->ge_mac_cfg_3.value = 0;
+
+	/* ge_mac_cfg_3 default values */
+	priv->ge_mac_cfg_3.rx_ifg_th = NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH;
+	priv->ge_mac_cfg_3.max_len = NPS_ENET_GE_MAC_CFG_3_MAX_LEN;
+
+	/* Disable HW device */
+	nps_enet_hw_disable_control(ndev);
+
+	/* irq Rx allocation */
+	err = request_irq(priv->irq, nps_enet_irq_handler,
+			  0, "enet-rx-tx", ndev);
+	if (err)
+		return err;
+
+	napi_enable(&priv->napi);
+
+	/* Enable HW device */
+	nps_enet_hw_reset(ndev);
+	nps_enet_hw_enable_control(ndev);
+
+	netif_start_queue(ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_stop - Close the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function stops the Tx queue, disables interrupts for the ENET device.
+ */
+static s32 nps_enet_stop(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	napi_disable(&priv->napi);
+	netif_stop_queue(ndev);
+	nps_enet_hw_disable_control(ndev);
+	free_irq(priv->irq, ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_start_xmit - Starts the data transmission.
+ * @skb:        sk_buff pointer that contains data to be Transmitted.
+ * @ndev:       Pointer to net_device structure.
+ *
+ * returns: NETDEV_TX_OK, on success
+ *              NETDEV_TX_BUSY, if any of the descriptors are not free.
+ *
+ * This function is invoked from upper layers to initiate transmission.
+ */
+static netdev_tx_t nps_enet_start_xmit(struct sk_buff *skb,
+				       struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	/* This driver handles one frame at a time  */
+	netif_stop_queue(ndev);
+
+	nps_enet_send_frame(ndev, skb);
+
+	priv->tx_skb = skb;
+
+	return NETDEV_TX_OK;
+}
+
+#ifdef CONFIG_NET_POLL_CONTROLLER
+static void nps_enet_poll_controller(struct net_device *ndev)
+{
+	disable_irq(ndev->irq);
+	nps_enet_irq_handler(ndev->irq, ndev);
+	enable_irq(ndev->irq);
+}
+#endif
+
+static const struct net_device_ops nps_netdev_ops = {
+	.ndo_open		= nps_enet_open,
+	.ndo_stop		= nps_enet_stop,
+	.ndo_start_xmit		= nps_enet_start_xmit,
+	.ndo_set_mac_address	= nps_enet_set_mac_address,
+	.ndo_set_rx_mode        = nps_enet_set_rx_mode,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+	.ndo_poll_controller	= nps_enet_poll_controller,
+#endif
+};
+
+static s32 nps_enet_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct net_device *ndev;
+	struct nps_enet_priv *priv;
+	s32 err = 0;
+	const char *mac_addr;
+	struct resource *res_regs;
+
+	if (!dev->of_node)
+		return -ENODEV;
+
+	ndev = alloc_etherdev(sizeof(struct nps_enet_priv));
+	if (!ndev)
+		return -ENOMEM;
+
+	platform_set_drvdata(pdev, ndev);
+	SET_NETDEV_DEV(ndev, dev);
+	priv = netdev_priv(ndev);
+
+	/* The EZ NET specific entries in the device structure. */
+	ndev->netdev_ops = &nps_netdev_ops;
+	ndev->watchdog_timeo = (400 * HZ / 1000);
+	/* FIXME :: no multicast support yet */
+	ndev->flags &= ~IFF_MULTICAST;
+
+	res_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	priv->regs_base = devm_ioremap_resource(dev, res_regs);
+	if (IS_ERR(priv->regs_base)) {
+		err = PTR_ERR(priv->regs_base);
+		goto out_netdev;
+	}
+	dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs_base);
+
+	/* set kernel MAC address to dev */
+	mac_addr = of_get_mac_address(dev->of_node);
+	if (mac_addr)
+		ether_addr_copy(ndev->dev_addr, mac_addr);
+	else
+		eth_hw_addr_random(ndev);
+
+	/* Get IRQ number */
+	priv->irq = platform_get_irq(pdev, 0);
+	if (!priv->irq) {
+		dev_err(dev, "failed to retrieve <irq Rx-Tx> value from device tree\n");
+		err = -ENODEV;
+		goto out_netdev;
+	}
+
+	netif_napi_add(ndev, &priv->napi, nps_enet_poll,
+		       NPS_ENET_NAPI_POLL_WEIGHT);
+
+	/* Register the driver. Should be the last thing in probe */
+	err = register_netdev(ndev);
+	if (err) {
+		dev_err(dev, "Failed to register ndev for %s, err = 0x%08x\n",
+			ndev->name, (s32)err);
+		err = -ENODEV;
+		goto out_netif_api;
+	}
+
+	dev_info(dev, "(rx/tx=%d)\n", priv->irq);
+	return 0;
+
+out_netif_api:
+	netif_napi_del(&priv->napi);
+out_netdev:
+	if (err)
+		free_netdev(ndev);
+
+	return err;
+}
+
+static s32 nps_enet_remove(struct platform_device *pdev)
+{
+	struct net_device *ndev = platform_get_drvdata(pdev);
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	unregister_netdev(ndev);
+	free_netdev(ndev);
+	netif_napi_del(&priv->napi);
+
+	return 0;
+}
+
+static const struct of_device_id nps_enet_dt_ids[] = {
+	{ .compatible = "ezchip,nps-mgt-enet" },
+	{ /* Sentinel */ }
+};
+
+static struct platform_driver nps_enet_driver = {
+	.probe = nps_enet_probe,
+	.remove = nps_enet_remove,
+	.driver = {
+		.name = DRV_NAME,
+		.of_match_table  = nps_enet_dt_ids,
+	},
+};
+
+module_platform_driver(nps_enet_driver);
+
+MODULE_AUTHOR("EZchip Semiconductor");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/net/ethernet/ezchip/nps_enet.h b/drivers/net/ethernet/ezchip/nps_enet.h
new file mode 100644
index 0000000..fc45c9d
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.h
@@ -0,0 +1,336 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#ifndef _NPS_ENET_H
+#define _NPS_ENET_H
+
+/* default values */
+#define NPS_ENET_NAPI_POLL_WEIGHT		0x2
+#define NPS_ENET_MAX_FRAME_LENGTH		0x3FFF
+#define NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR	0x7
+#define NPS_ENET_GE_MAC_CFG_0_RX_IFG		0x5
+#define NPS_ENET_GE_MAC_CFG_0_TX_IFG		0xC
+#define NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN		0x7
+#define NPS_ENET_GE_MAC_CFG_2_STAT_EN		0x3
+#define NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH		0x14
+#define NPS_ENET_GE_MAC_CFG_3_MAX_LEN		0x3FFC
+#define NPS_ENET_ENABLE				1
+#define NPS_ENET_DISABLE			0
+
+/* register definitions  */
+#define NPS_ENET_REG_TX_CTL		0x800
+#define NPS_ENET_REG_TX_BUF		0x808
+#define NPS_ENET_REG_RX_CTL		0x810
+#define NPS_ENET_REG_RX_BUF		0x818
+#define NPS_ENET_REG_BUF_INT_ENABLE	0x8C0
+#define NPS_ENET_REG_BUF_INT_CAUSE	0x8C4
+#define NPS_ENET_REG_GE_MAC_CFG_0	0x1000
+#define NPS_ENET_REG_GE_MAC_CFG_1	0x1004
+#define NPS_ENET_REG_GE_MAC_CFG_2	0x1008
+#define NPS_ENET_REG_GE_MAC_CFG_3	0x100C
+#define NPS_ENET_REG_GE_RST		0x1400
+#define NPS_ENET_REG_PHASE_FIFO_CTL	0x1404
+
+/* Tx control register */
+struct nps_enet_tx_ctl {
+	union {
+		/* ct: SW sets to indicate frame ready in Tx buffer for
+		 *     transmission. HW resets to when transmission done
+		 * et: Transmit error
+		 * nt: Length in bytes of Tx frame loaded to Tx buffer
+		 */
+		struct {
+			u32
+			__reserved_1:16,
+			ct:1,
+			et:1,
+			__reserved_2:3,
+			nt:11;
+		};
+
+		u32 value;
+	};
+};
+
+/* Rx control register */
+struct nps_enet_rx_ctl {
+	union {
+		/* cr:  HW sets to indicate frame ready in Rx buffer.
+		 *      SW resets to indicate host read received frame
+		 *      and new frames can be written to Rx buffer
+		 * er:  Rx error indication
+		 * crc: Rx CRC error indication
+		 * nr:  Length in bytes of Rx frame loaded by MAC to Rx buffer
+		 */
+		struct {
+			u32
+			__reserved_1:16,
+			cr:1,
+			er:1,
+			crc:1,
+			__reserved_2:2,
+			nr:11;
+		};
+
+		u32 value;
+	};
+};
+
+/* Interrupt enable for data buffer events register */
+struct nps_enet_buf_int_enable {
+	union {
+		/* tx_done: Interrupt generation in the case when new frame
+		 *          is ready in Rx buffer
+		 * rx_rdy:  Interrupt generation in the case when current frame
+		 *          was read from TX buffer
+		 */
+		struct {
+			u32
+			__reserved:30,
+			tx_done:1,
+			rx_rdy:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Interrupt cause for data buffer events register */
+struct nps_enet_buf_int_cause {
+	union {
+		/* tx_done: Interrupt in the case when current frame was
+		 *          read from TX buffer.
+		 * rx_rdy:  Interrupt in the case when new frame is ready
+		 *          in RX buffer.
+		 */
+		struct {
+			u32
+			__reserved:30,
+			tx_done:1,
+			rx_rdy:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 0 register */
+struct nps_enet_ge_mac_cfg_0 {
+	union {
+		/* tx_pr_len:          Transmit preamble length in bytes
+		 * tx_ifg_nib:         Tx idle pattern
+		 * nib_mode:           Nibble (4-bit) Mode
+		 * rx_pr_check_en:     Receive preamble Check Enable
+		 * tx_ifg:             Transmit inter-Frame Gap
+		 * rx_ifg:             Receive inter-Frame Gap
+		 * tx_fc_retr:         Transmit Flow Control Retransmit Mode
+		 * rx_length_check_en: Receive Length Check Enable
+		 * rx_crc_ignore:      Results of the CRC check are ignored
+		 * rx_crc_strip:       MAC strips the CRC from received frames
+		 * rx_fc_en:           Receive Flow Control Enable
+		 * tx_crc_en:          Transmit CRC Enabled
+		 * tx_pad_en:          Transmit Padding Enable
+		 * tx_cf_en:           Transmit Flow Control Enable
+		 * tx_en:              Transmit Enable
+		 * rx_en:              Receive Enable
+		 */
+		struct {
+			u32
+			tx_pr_len:4,
+			tx_ifg_nib:4,
+			nib_mode:1,
+			rx_pr_check_en:1,
+			tx_ifg:6,
+			rx_ifg:4,
+			tx_fc_retr:3,
+			rx_length_check_en:1,
+			rx_crc_ignore:1,
+			rx_crc_strip:1,
+			rx_fc_en:1,
+			tx_crc_en:1,
+			tx_pad_en:1,
+			tx_fc_en:1,
+			tx_en:1,
+			rx_en:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 1 register */
+struct nps_enet_ge_mac_cfg_1 {
+	union {
+		/* octet_3: MAC address octet 3
+		 * octet_2: MAC address octet 2
+		 * octet_1: MAC address octet 1
+		 * octet_0: MAC address octet 0
+		 */
+		struct {
+			u32
+			octet_3:8,
+			octet_2:8,
+			octet_1:8,
+			octet_0:8;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 2 register */
+struct nps_enet_ge_mac_cfg_2 {
+	union {
+		/* transmit_flush_en: MAC flush enable
+		 * stat_en:           RMON statistics interface enable
+		 * disc_da:           Discard frames with DA different
+		 *                    from MAC address
+		 * disc_bc:           Discard broadcast frames
+		 * disc_mc:           Discard multicast frames
+		 * octet_5:           MAC address octet 5
+		 * octet_4:           MAC address octet 4
+		 */
+		struct {
+			u32
+			transmit_flush_en:1,
+			__reserved_1:5,
+			stat_en:2,
+			__reserved_2:1,
+			disc_da:1,
+			disc_bc:1,
+			disc_mc:1,
+			__reserved_3:4,
+			octet_5:8,
+			octet_4:8;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 3 register */
+struct nps_enet_ge_mac_cfg_3 {
+	union {
+		/* ext_oob_cbfc_sel:  Selects one of the 4 profiles for
+		 *                    extended OOB in-flow-control indication
+		 * max_len:           Maximum receive frame length in bytes
+		 * tx_cbfc_en:        Enable transmission of class-based
+		 *                    flow control packets
+		 * rx_ifg_th:         Threshold for IFG status reporting via OOB
+		 * cf_timeout:        Configurable time to decrement FC counters
+		 * cf_drop:           Drop control frames
+		 * redirect_cbfc_sel: Selects one of CBFC redirect profiles
+		 * rx_cbfc_redir_en:  Enable Rx class-based flow
+		 *                    control redirect
+		 * rx_cbfc_en:        Enable Rx class-based flow control
+		 * tm_hd_mode:        TM header mode
+		 */
+		struct {
+			u32
+			ext_oob_cbfc_sel:2,
+			max_len:14,
+			tx_cbfc_en:1,
+			rx_ifg_th:5,
+			cf_timeout:4,
+			cf_drop:1,
+			redirect_cbfc_sel:2,
+			rx_cbfc_redir_en:1,
+			rx_cbfc_en:1,
+			tm_hd_mode:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* GE MAC, PCS reset control register */
+struct nps_enet_ge_rst {
+	union {
+		/* gmac_0: GE MAC reset
+		 * spcs_0: SGMII PCS reset
+		 */
+		struct {
+			u32
+			__reserved_1:23,
+			gmac_0:1,
+			__reserved_2:7,
+			spcs_0:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Tx phase sync FIFO control register */
+struct nps_enet_phase_fifo_ctl {
+	union {
+		/* init: initialize serdes TX phase sync FIFO pointers
+		 * rst:  reset serdes TX phase sync FIFO
+		 */
+		struct {
+			u32
+			__reserved:30,
+			init:1,
+			rst:1;
+		};
+
+		u32 value;
+	};
+};
+
+/**
+ * struct nps_enet_priv - Storage of ENET's private information.
+ * @regs_base:      Base address of ENET memory-mapped control registers.
+ * @irq:            For RX/TX IRQ number.
+ * @tx_packet_sent: SW indication if frame is being sent.
+ * @tx_skb:         socket buffer of sent frame.
+ * @napi:           Structure for NAPI.
+ */
+struct nps_enet_priv {
+	void __iomem *regs_base;
+	s32 irq;
+	bool tx_packet_sent;
+	struct sk_buff *tx_skb;
+	struct napi_struct napi;
+	struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 ge_mac_cfg_3;
+};
+
+/**
+ * nps_reg_set - Sets ENET register with provided value.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ * @value:      Value to set in register.
+ */
+static inline void nps_enet_reg_set(struct nps_enet_priv *priv,
+				    s32 reg, s32 value)
+{
+	iowrite32be(value, priv->regs_base + reg);
+}
+
+/**
+ * nps_reg_get - Gets value of specified ENET register.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ *
+ * returns:     Value of requested register.
+ */
+static inline u32 nps_enet_reg_get(struct nps_enet_priv *priv, s32 reg)
+{
+	return ioread32be(priv->regs_base + reg);
+}
+
+#endif /* _NPS_ENET_H */
-- 
1.7.1

^ permalink raw reply related	[flat|nested] 28+ messages in thread

* Re: [PATCH v6] NET: Add ezchip ethernet driver
  2015-06-22 20:51           ` Noam Camus
@ 2015-06-22 21:04             ` Rami Rosen
  -1 siblings, 0 replies; 28+ messages in thread
From: Rami Rosen @ 2015-06-22 21:04 UTC (permalink / raw)
  To: Noam Camus
  Cc: Netdev, linux-kernel, Alexey.Brodkin, vgupta, giladb, cmetcalf,
	Tal Zilcer

Hi, Noam,

Just a typo and a nitpick:

+/**
+ * nps_enet_open - Open the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * returns: 0, on success or non-zero error value on failure.
+ *

Maybe better:  This function enables IRQs

+ * This function enables an IRQs for the ENET device and starts the Tx queue.



+static s32 nps_enet_probe(struct platform_device *pdev)
+{
+       struct device *dev = &pdev->dev;
+       struct net_device *ndev;
+       struct nps_enet_priv *priv;
+       s32 err = 0;
+       const char *mac_addr;
+       struct resource *res_regs;
+
+       if (!dev->of_node)
+               return -ENODEV;
+
+       ndev = alloc_etherdev(sizeof(struct nps_enet_priv));
+       if (!ndev)
+               return -ENOMEM;
+
+       platform_set_drvdata(pdev, ndev);
+       SET_NETDEV_DEV(ndev, dev);
+       priv = netdev_priv(ndev);
+
+       /* The EZ NET specific entries in the device structure. */
+       ndev->netdev_ops = &nps_netdev_ops;
+       ndev->watchdog_timeo = (400 * HZ / 1000);
+       /* FIXME :: no multicast support yet */
+       ndev->flags &= ~IFF_MULTICAST;
+
+       res_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       priv->regs_base = devm_ioremap_resource(dev, res_regs);
+       if (IS_ERR(priv->regs_base)) {
+               err = PTR_ERR(priv->regs_base);
+               goto out_netdev;
+       }
+       dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs_base);
+
+       /* set kernel MAC address to dev */
+       mac_addr = of_get_mac_address(dev->of_node);
+       if (mac_addr)
+               ether_addr_copy(ndev->dev_addr, mac_addr);
+       else
+               eth_hw_addr_random(ndev);
+
+       /* Get IRQ number */
+       priv->irq = platform_get_irq(pdev, 0);
+       if (!priv->irq) {
+               dev_err(dev, "failed to retrieve <irq Rx-Tx> value
from device tree\n");
+               err = -ENODEV;
+               goto out_netdev;
+       }
+
+       netif_napi_add(ndev, &priv->napi, nps_enet_poll,
+                      NPS_ENET_NAPI_POLL_WEIGHT);

+
+       /* Register the driver. Should be the last thing in probe */
+       err = register_netdev(ndev);
+       if (err) {
+               dev_err(dev, "Failed to register ndev for %s, err = 0x%08x\n",
+                       ndev->name, (s32)err);

Wouldn't it be better not to assign any value at this point to err, so
that the returned err will reflect the true return value of
register_netdev(), which can have various error values ?

+               err = -ENODEV;
+               goto out_netif_api;
+       }
+
+       dev_info(dev, "(rx/tx=%d)\n", priv->irq);
+       return 0;
+
+out_netif_api:
+       netif_napi_del(&priv->napi);
+out_netdev:
+       if (err)
+               free_netdev(ndev);
+
+       return err;
+}


Regards,
Rami Rosen
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
Please read the FAQ at  http://www.tux.org/lkml/

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v6] NET: Add ezchip ethernet driver
@ 2015-06-22 21:04             ` Rami Rosen
  0 siblings, 0 replies; 28+ messages in thread
From: Rami Rosen @ 2015-06-22 21:04 UTC (permalink / raw)
  To: Noam Camus
  Cc: Netdev, linux-kernel, Alexey.Brodkin, vgupta, giladb, cmetcalf,
	Tal Zilcer

Hi, Noam,

Just a typo and a nitpick:

+/**
+ * nps_enet_open - Open the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * returns: 0, on success or non-zero error value on failure.
+ *

Maybe better:  This function enables IRQs

+ * This function enables an IRQs for the ENET device and starts the Tx queue.



+static s32 nps_enet_probe(struct platform_device *pdev)
+{
+       struct device *dev = &pdev->dev;
+       struct net_device *ndev;
+       struct nps_enet_priv *priv;
+       s32 err = 0;
+       const char *mac_addr;
+       struct resource *res_regs;
+
+       if (!dev->of_node)
+               return -ENODEV;
+
+       ndev = alloc_etherdev(sizeof(struct nps_enet_priv));
+       if (!ndev)
+               return -ENOMEM;
+
+       platform_set_drvdata(pdev, ndev);
+       SET_NETDEV_DEV(ndev, dev);
+       priv = netdev_priv(ndev);
+
+       /* The EZ NET specific entries in the device structure. */
+       ndev->netdev_ops = &nps_netdev_ops;
+       ndev->watchdog_timeo = (400 * HZ / 1000);
+       /* FIXME :: no multicast support yet */
+       ndev->flags &= ~IFF_MULTICAST;
+
+       res_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       priv->regs_base = devm_ioremap_resource(dev, res_regs);
+       if (IS_ERR(priv->regs_base)) {
+               err = PTR_ERR(priv->regs_base);
+               goto out_netdev;
+       }
+       dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs_base);
+
+       /* set kernel MAC address to dev */
+       mac_addr = of_get_mac_address(dev->of_node);
+       if (mac_addr)
+               ether_addr_copy(ndev->dev_addr, mac_addr);
+       else
+               eth_hw_addr_random(ndev);
+
+       /* Get IRQ number */
+       priv->irq = platform_get_irq(pdev, 0);
+       if (!priv->irq) {
+               dev_err(dev, "failed to retrieve <irq Rx-Tx> value
from device tree\n");
+               err = -ENODEV;
+               goto out_netdev;
+       }
+
+       netif_napi_add(ndev, &priv->napi, nps_enet_poll,
+                      NPS_ENET_NAPI_POLL_WEIGHT);

+
+       /* Register the driver. Should be the last thing in probe */
+       err = register_netdev(ndev);
+       if (err) {
+               dev_err(dev, "Failed to register ndev for %s, err = 0x%08x\n",
+                       ndev->name, (s32)err);

Wouldn't it be better not to assign any value at this point to err, so
that the returned err will reflect the true return value of
register_netdev(), which can have various error values ?

+               err = -ENODEV;
+               goto out_netif_api;
+       }
+
+       dev_info(dev, "(rx/tx=%d)\n", priv->irq);
+       return 0;
+
+out_netif_api:
+       netif_napi_del(&priv->napi);
+out_netdev:
+       if (err)
+               free_netdev(ndev);
+
+       return err;
+}


Regards,
Rami Rosen

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v5] NET: Add ezchip ethernet driver
  2015-06-22 17:45           ` Mahesh Bandewar
@ 2015-06-22 23:47             ` Paul Gortmaker
  -1 siblings, 0 replies; 28+ messages in thread
From: Paul Gortmaker @ 2015-06-22 23:47 UTC (permalink / raw)
  To: Mahesh Bandewar
  Cc: Noam Camus, linux-netdev, linux-kernel, Alexey.Brodkin, vgupta,
	giladb, cmetcalf, Tal Zilcer

[Re: [PATCH v5] NET: Add ezchip ethernet driver] On 22/06/2015 (Mon 10:45) Mahesh Bandewar wrote:

> On Tue, Jun 16, 2015 at 7:35 AM, Noam Camus <noamc@ezchip.com> wrote:
> >
> > From: Noam Camus <noamc@ezchip.com>
> >
> > Simple LAN device for debug or management purposes.
> > Device supports interrupts for RX and TX(completion).
> > Device does not have DMA ability.
> >
> > Signed-off-by: Noam Camus <noamc@ezchip.com>
> > Signed-off-by: Tal Zilcer <talz@ezchip.com>
> > Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
> > ---
> > Change log for v5:
> > Basically its all based on Florian comments.
> > Main items are:
> > 1) Move all interrupt chore to bottom-half
> > 2) use memcpy_toio/fromio
> > 3) dev_kfree_skb() moved to bottom-half
> > 4) add set_rx_mode callback
> > 5) use platform api toward non-DT platforms
> > ---

[...]

> > diff --git a/drivers/net/ethernet/ezchip/Kconfig b/drivers/net/ethernet/ezchip/Kconfig
> > new file mode 100644
> > index 0000000..d031177
> > --- /dev/null
> > +++ b/drivers/net/ethernet/ezchip/Kconfig
> > @@ -0,0 +1,27 @@
> > +#
> > +# EZchip network device configuration
> > +#
> > +
> > +config NET_VENDOR_EZCHIP
> > +       bool "EZchip devices"
> > +       default y
> >
> Why this has to be included in the default build? Shouldn't it be
> either "m" or "N" by default?
> 

Mahesh, in the future please don't quote 1200 lines of code in its
entirety just to add these two lines of comment, which in this case
happen to also be incorrect.  It is a NET_VENDOR_<name> option which
is just the lead in as it clearly states below if we go look...

> > +       ---help---
> > +         If you have a network (Ethernet) device belonging to this class, say Y
> > +         and read the Ethernet-HOWTO, available from
> > +         <http://www.tldp.org/docs.html#howto>.

Noam, since you are unlikely to get this in final from before net-next
closes (happening any time now), please delete the Howto reference when
you resubmit in two weeks, assuming that my cleanup here:

   https://patchwork.ozlabs.org/patch/487080/

gets applied to this release.

> > +
> > +         Note that the answer to this question doesn't directly affect the
> > +         kernel: saying N will just cause the configurator to skip all
> > +         the questions about EZchip devices. If you say Y, you will be asked for
> > +         your specific device in the following questions.

Mahesh, here above.  So he's not doing a "default y" on an actual driver
(which, if he were, yes that would be wrong.)  What worries me more
though, is that ...

> > +
> > +if NET_VENDOR_EZCHIP
> > +
> > +config EZCHIP_NPS_MANAGEMENT_ENET
> > +       tristate "EZchip NPS management enet support"

...there is no dependency line here.  None.  Noam - this implicitly
means that you expect this to build on all arch for all combinations of
.config files.  At a quick glance I see a dts fragment, and I also see a
call to of_get_mac_address() so I'm thinking there needs to be some
dependency here, on OF or OF_NET, or... ?

Paul.
--

> > +       ---help---
> > +         Simple LAN device for debug or management purposes.
> > +         Device supports interrupts for RX and TX(completion).
> > +         Device does not have DMA ability.
> > +
> > +endif
> > diff --git a/drivers/net/ethernet/ezchip/Makefile b/drivers/net/ethernet/ezchip/Makefile
> > new file mode 100644
> > index 0000000..e490176
> > --- /dev/null
> > +++ b/drivers/net/ethernet/ezchip/Makefile

[snip]
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
Please read the FAQ at  http://www.tux.org/lkml/

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v5] NET: Add ezchip ethernet driver
@ 2015-06-22 23:47             ` Paul Gortmaker
  0 siblings, 0 replies; 28+ messages in thread
From: Paul Gortmaker @ 2015-06-22 23:47 UTC (permalink / raw)
  To: Mahesh Bandewar
  Cc: Noam Camus, linux-netdev, linux-kernel, Alexey.Brodkin, vgupta,
	giladb, cmetcalf, Tal Zilcer

[Re: [PATCH v5] NET: Add ezchip ethernet driver] On 22/06/2015 (Mon 10:45) Mahesh Bandewar wrote:

> On Tue, Jun 16, 2015 at 7:35 AM, Noam Camus <noamc@ezchip.com> wrote:
> >
> > From: Noam Camus <noamc@ezchip.com>
> >
> > Simple LAN device for debug or management purposes.
> > Device supports interrupts for RX and TX(completion).
> > Device does not have DMA ability.
> >
> > Signed-off-by: Noam Camus <noamc@ezchip.com>
> > Signed-off-by: Tal Zilcer <talz@ezchip.com>
> > Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
> > ---
> > Change log for v5:
> > Basically its all based on Florian comments.
> > Main items are:
> > 1) Move all interrupt chore to bottom-half
> > 2) use memcpy_toio/fromio
> > 3) dev_kfree_skb() moved to bottom-half
> > 4) add set_rx_mode callback
> > 5) use platform api toward non-DT platforms
> > ---

[...]

> > diff --git a/drivers/net/ethernet/ezchip/Kconfig b/drivers/net/ethernet/ezchip/Kconfig
> > new file mode 100644
> > index 0000000..d031177
> > --- /dev/null
> > +++ b/drivers/net/ethernet/ezchip/Kconfig
> > @@ -0,0 +1,27 @@
> > +#
> > +# EZchip network device configuration
> > +#
> > +
> > +config NET_VENDOR_EZCHIP
> > +       bool "EZchip devices"
> > +       default y
> >
> Why this has to be included in the default build? Shouldn't it be
> either "m" or "N" by default?
> 

Mahesh, in the future please don't quote 1200 lines of code in its
entirety just to add these two lines of comment, which in this case
happen to also be incorrect.  It is a NET_VENDOR_<name> option which
is just the lead in as it clearly states below if we go look...

> > +       ---help---
> > +         If you have a network (Ethernet) device belonging to this class, say Y
> > +         and read the Ethernet-HOWTO, available from
> > +         <http://www.tldp.org/docs.html#howto>.

Noam, since you are unlikely to get this in final from before net-next
closes (happening any time now), please delete the Howto reference when
you resubmit in two weeks, assuming that my cleanup here:

   https://patchwork.ozlabs.org/patch/487080/

gets applied to this release.

> > +
> > +         Note that the answer to this question doesn't directly affect the
> > +         kernel: saying N will just cause the configurator to skip all
> > +         the questions about EZchip devices. If you say Y, you will be asked for
> > +         your specific device in the following questions.

Mahesh, here above.  So he's not doing a "default y" on an actual driver
(which, if he were, yes that would be wrong.)  What worries me more
though, is that ...

> > +
> > +if NET_VENDOR_EZCHIP
> > +
> > +config EZCHIP_NPS_MANAGEMENT_ENET
> > +       tristate "EZchip NPS management enet support"

...there is no dependency line here.  None.  Noam - this implicitly
means that you expect this to build on all arch for all combinations of
.config files.  At a quick glance I see a dts fragment, and I also see a
call to of_get_mac_address() so I'm thinking there needs to be some
dependency here, on OF or OF_NET, or... ?

Paul.
--

> > +       ---help---
> > +         Simple LAN device for debug or management purposes.
> > +         Device supports interrupts for RX and TX(completion).
> > +         Device does not have DMA ability.
> > +
> > +endif
> > diff --git a/drivers/net/ethernet/ezchip/Makefile b/drivers/net/ethernet/ezchip/Makefile
> > new file mode 100644
> > index 0000000..e490176
> > --- /dev/null
> > +++ b/drivers/net/ethernet/ezchip/Makefile

[snip]

^ permalink raw reply	[flat|nested] 28+ messages in thread

* RE: [PATCH v5] NET: Add ezchip ethernet driver
  2015-06-22 17:45           ` Mahesh Bandewar
@ 2015-06-23  6:05             ` Noam Camus
  -1 siblings, 0 replies; 28+ messages in thread
From: Noam Camus @ 2015-06-23  6:05 UTC (permalink / raw)
  To: Mahesh Bandewar
  Cc: linux-netdev, linux-kernel, Alexey.Brodkin, vgupta,
	Gilad Ben Yossef, Chris Metcalf, Tal Zilcer

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 716 bytes --]

From: Mahesh Bandewar [mailto:maheshb@google.com] 
Sent: Monday, June 22, 2015 8:45 PM

> > a/drivers/net/ethernet/ezchip/Kconfig 
> > b/drivers/net/ethernet/ezchip/Kconfig
> > new file mode 100644
> > index 0000000..d031177
> > --- /dev/null
> > +++ b/drivers/net/ethernet/ezchip/Kconfig
> > @@ -0,0 +1,27 @@
> > +#
> > +# EZchip network device configuration #
> > +
> > +config NET_VENDOR_EZCHIP
> > +       bool "EZchip devices"
> > +       default y
> >
> Why this has to be included in the default build? Shouldn't it be either "m" or "N" by default?

>From what I see this is the common practice for all Ethernet devices.

Noam
ÿôèº{.nÇ+‰·Ÿ®‰­†+%ŠËÿ±éݶ\x17¥Šwÿº{.nÇ+‰·¥Š{±þG«éÿŠsåy«\x1e­æ¶\x17…\x01\x06­†ÛiÿÿðÃ\x0fí»\x1fè®\x0få’i\x7f

^ permalink raw reply	[flat|nested] 28+ messages in thread

* RE: [PATCH v5] NET: Add ezchip ethernet driver
@ 2015-06-23  6:05             ` Noam Camus
  0 siblings, 0 replies; 28+ messages in thread
From: Noam Camus @ 2015-06-23  6:05 UTC (permalink / raw)
  To: Mahesh Bandewar
  Cc: linux-netdev, linux-kernel, Alexey.Brodkin, vgupta,
	Gilad Ben Yossef, Chris Metcalf, Tal Zilcer

From: Mahesh Bandewar [mailto:maheshb@google.com] 
Sent: Monday, June 22, 2015 8:45 PM

> > a/drivers/net/ethernet/ezchip/Kconfig 
> > b/drivers/net/ethernet/ezchip/Kconfig
> > new file mode 100644
> > index 0000000..d031177
> > --- /dev/null
> > +++ b/drivers/net/ethernet/ezchip/Kconfig
> > @@ -0,0 +1,27 @@
> > +#
> > +# EZchip network device configuration #
> > +
> > +config NET_VENDOR_EZCHIP
> > +       bool "EZchip devices"
> > +       default y
> >
> Why this has to be included in the default build? Shouldn't it be either "m" or "N" by default?

From what I see this is the common practice for all Ethernet devices.

Noam

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v5] NET: Add ezchip ethernet driver
  2015-06-22 17:45           ` Mahesh Bandewar
@ 2015-06-23  7:31             ` David Miller
  -1 siblings, 0 replies; 28+ messages in thread
From: David Miller @ 2015-06-23  7:31 UTC (permalink / raw)
  To: maheshb
  Cc: noamc, netdev, linux-kernel, Alexey.Brodkin, vgupta, giladb,
	cmetcalf, talz

From: Mahesh Bandewar <maheshb@google.com>
Date: Mon, 22 Jun 2015 10:45:15 -0700

> On Tue, Jun 16, 2015 at 7:35 AM, Noam Camus <noamc@ezchip.com> wrote:
>> @@ -0,0 +1,27 @@
>> +#
>> +# EZchip network device configuration
>> +#
>> +
>> +config NET_VENDOR_EZCHIP
>> +       bool "EZchip devices"
>> +       default y
>>
> Why this has to be included in the default build? Shouldn't it be
> either "m" or "N" by default?

It's a vendor guard, which are always enabled yes by default.
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
Please read the FAQ at  http://www.tux.org/lkml/

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v5] NET: Add ezchip ethernet driver
@ 2015-06-23  7:31             ` David Miller
  0 siblings, 0 replies; 28+ messages in thread
From: David Miller @ 2015-06-23  7:31 UTC (permalink / raw)
  To: maheshb
  Cc: noamc, netdev, linux-kernel, Alexey.Brodkin, vgupta, giladb,
	cmetcalf, talz

From: Mahesh Bandewar <maheshb@google.com>
Date: Mon, 22 Jun 2015 10:45:15 -0700

> On Tue, Jun 16, 2015 at 7:35 AM, Noam Camus <noamc@ezchip.com> wrote:
>> @@ -0,0 +1,27 @@
>> +#
>> +# EZchip network device configuration
>> +#
>> +
>> +config NET_VENDOR_EZCHIP
>> +       bool "EZchip devices"
>> +       default y
>>
> Why this has to be included in the default build? Shouldn't it be
> either "m" or "N" by default?

It's a vendor guard, which are always enabled yes by default.

^ permalink raw reply	[flat|nested] 28+ messages in thread

* [PATCH v7] NET: Add ezchip ethernet driver
  2015-06-22 20:51           ` Noam Camus
  (?)
  (?)
@ 2015-06-23  8:43           ` Noam Camus
  2015-06-23 14:17             ` David Miller
  2015-06-24  3:40             ` Paul Gortmaker
  -1 siblings, 2 replies; 28+ messages in thread
From: Noam Camus @ 2015-06-23  8:43 UTC (permalink / raw)
  To: netdev, linux-kernel
  Cc: Alexey.Brodkin, vgupta, giladb, cmetcalf, Noam Camus, Tal Zilcer

From: Noam Camus <noamc@ezchip.com>

Simple LAN device for debug or management purposes.
Device supports interrupts for RX and TX(completion).
Device does not have DMA ability.

Signed-off-by: Noam Camus <noamc@ezchip.com>
Signed-off-by: Tal Zilcer <talz@ezchip.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
---
Change log for v7:

1) Update nps_enet_open() comment header. (Rami Rosen)
2) fix return value of nps_enet_probe() when register_netdev() fails. (Rami Rosen)
3) Fix Kconfig Help and add dependencies. (Paul Gortmaker)

NOTE: with new dependencies,OF && OF_NET need to be in your configuration.
Otherwise the driver will not be chosen and built.
---
 .../devicetree/bindings/net/ezchip_enet.txt        |   15 +
 drivers/net/ethernet/Kconfig                       |    1 +
 drivers/net/ethernet/Makefile                      |    1 +
 drivers/net/ethernet/ezchip/Kconfig                |   26 +
 drivers/net/ethernet/ezchip/Makefile               |    1 +
 drivers/net/ethernet/ezchip/nps_enet.c             |  658 ++++++++++++++++++++
 drivers/net/ethernet/ezchip/nps_enet.h             |  336 ++++++++++
 7 files changed, 1038 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/ezchip_enet.txt
 create mode 100644 drivers/net/ethernet/ezchip/Kconfig
 create mode 100644 drivers/net/ethernet/ezchip/Makefile
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.c
 create mode 100644 drivers/net/ethernet/ezchip/nps_enet.h

diff --git a/Documentation/devicetree/bindings/net/ezchip_enet.txt b/Documentation/devicetree/bindings/net/ezchip_enet.txt
new file mode 100644
index 0000000..4e29b2b
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ezchip_enet.txt
@@ -0,0 +1,15 @@
+* EZchip NPS Management Ethernet port driver
+
+Required properties:
+- compatible: Should be "ezchip,nps-mgt-enet"
+- reg: Address and length of the register set for the device
+- interrupts: Should contain the ENET interrupt
+
+Examples:
+
+	ethernet@f0003000 {
+		compatible = "ezchip,nps-mgt-enet";
+		reg = <0xf0003000 0x44>;
+		interrupts = <7>;
+		mac-address = [ 00 11 22 33 44 55 ];
+	};
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index eadcb05..1a6b1ba 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -66,6 +66,7 @@ config DNET
 source "drivers/net/ethernet/dec/Kconfig"
 source "drivers/net/ethernet/dlink/Kconfig"
 source "drivers/net/ethernet/emulex/Kconfig"
+source "drivers/net/ethernet/ezchip/Kconfig"
 source "drivers/net/ethernet/neterion/Kconfig"
 source "drivers/net/ethernet/faraday/Kconfig"
 source "drivers/net/ethernet/freescale/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 1367afc..489f9cc 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_DNET) += dnet.o
 obj-$(CONFIG_NET_VENDOR_DEC) += dec/
 obj-$(CONFIG_NET_VENDOR_DLINK) += dlink/
 obj-$(CONFIG_NET_VENDOR_EMULEX) += emulex/
+obj-$(CONFIG_NET_VENDOR_EZCHIP) += ezchip/
 obj-$(CONFIG_NET_VENDOR_EXAR) += neterion/
 obj-$(CONFIG_NET_VENDOR_FARADAY) += faraday/
 obj-$(CONFIG_NET_VENDOR_FREESCALE) += freescale/
diff --git a/drivers/net/ethernet/ezchip/Kconfig b/drivers/net/ethernet/ezchip/Kconfig
new file mode 100644
index 0000000..48ecbc8
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Kconfig
@@ -0,0 +1,26 @@
+#
+# EZchip network device configuration
+#
+
+config NET_VENDOR_EZCHIP
+	bool "EZchip devices"
+	default y
+	---help---
+	  If you have a network (Ethernet) device belonging to this class, say Y.
+
+	  Note that the answer to this question doesn't directly affect the
+	  kernel: saying N will just cause the configurator to skip all
+	  the questions about EZchip devices. If you say Y, you will be asked for
+	  your specific device in the following questions.
+
+if NET_VENDOR_EZCHIP
+
+config EZCHIP_NPS_MANAGEMENT_ENET
+	tristate "EZchip NPS management enet support"
+	depends on OF_IRQ && OF_NET
+	---help---
+	  Simple LAN device for debug or management purposes.
+	  Device supports interrupts for RX and TX(completion).
+	  Device does not have DMA ability.
+
+endif
diff --git a/drivers/net/ethernet/ezchip/Makefile b/drivers/net/ethernet/ezchip/Makefile
new file mode 100644
index 0000000..e490176
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_EZCHIP_NPS_MANAGEMENT_ENET) += nps_enet.o
diff --git a/drivers/net/ethernet/ezchip/nps_enet.c b/drivers/net/ethernet/ezchip/nps_enet.c
new file mode 100644
index 0000000..24a85b2
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.c
@@ -0,0 +1,658 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#include <linux/module.h>
+#include <linux/etherdevice.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of_net.h>
+#include <linux/of_platform.h>
+#include "nps_enet.h"
+
+#define DRV_NAME			"nps_mgt_enet"
+
+static void nps_enet_clean_rx_fifo(struct net_device *ndev, u32 frame_len)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	u32 i, len = DIV_ROUND_UP(frame_len, sizeof(u32));
+
+	/* Empty Rx FIFO buffer by reading all words */
+	for (i = 0; i < len; i++)
+		nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+}
+
+static void nps_enet_read_rx_fifo(struct net_device *ndev,
+				  unsigned char *dst, u32 length)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	s32 i, last = length & (sizeof(u32) - 1);
+	u32 *reg = (u32 *)dst, len = length / sizeof(u32);
+	bool dst_is_aligned = IS_ALIGNED((unsigned long)dst, sizeof(u32));
+
+	/* In case dst is not aligned we need an intermediate buffer */
+	if (dst_is_aligned)
+		for (i = 0; i < len; i++, reg++)
+			*reg = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+	else { /* !dst_is_aligned */
+		for (i = 0; i < len; i++, reg++) {
+			u32 buf =
+				nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+
+			/* to accommodate word-unaligned address of "reg"
+			 * we have to do memcpy_toio() instead of simple "=".
+			 */
+			memcpy_toio((void __iomem *)reg, &buf, sizeof(buf));
+		}
+	}
+
+	/* copy last bytes (if any) */
+	if (last) {
+		u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
+
+		memcpy_toio((void __iomem *)reg, &buf, last);
+	}
+}
+
+static u32 nps_enet_rx_handler(struct net_device *ndev)
+{
+	u32 frame_len, err = 0;
+	u32 work_done = 0;
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct sk_buff *skb;
+	struct nps_enet_rx_ctl rx_ctrl;
+
+	rx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_RX_CTL);
+	frame_len = rx_ctrl.nr;
+
+	/* Check if we got RX */
+	if (!rx_ctrl.cr)
+		return work_done;
+
+	/* If we got here there is a work for us */
+	work_done++;
+
+	/* Check Rx error */
+	if (rx_ctrl.er) {
+		ndev->stats.rx_errors++;
+		err = 1;
+	}
+
+	/* Check Rx CRC error */
+	if (rx_ctrl.crc) {
+		ndev->stats.rx_crc_errors++;
+		ndev->stats.rx_dropped++;
+		err = 1;
+	}
+
+	/* Check Frame length Min 64b */
+	if (unlikely(frame_len < ETH_ZLEN)) {
+		ndev->stats.rx_length_errors++;
+		ndev->stats.rx_dropped++;
+		err = 1;
+	}
+
+	if (err)
+		goto rx_irq_clean;
+
+	/* Skb allocation */
+	skb = netdev_alloc_skb_ip_align(ndev, frame_len);
+	if (unlikely(!skb)) {
+		ndev->stats.rx_errors++;
+		ndev->stats.rx_dropped++;
+		goto rx_irq_clean;
+	}
+
+	/* Copy frame from Rx fifo into the skb */
+	nps_enet_read_rx_fifo(ndev, skb->data, frame_len);
+
+	skb_put(skb, frame_len);
+	skb->protocol = eth_type_trans(skb, ndev);
+	skb->ip_summed = CHECKSUM_UNNECESSARY;
+
+	ndev->stats.rx_packets++;
+	ndev->stats.rx_bytes += frame_len;
+	netif_receive_skb(skb);
+
+	goto rx_irq_frame_done;
+
+rx_irq_clean:
+	/* Clean Rx fifo */
+	nps_enet_clean_rx_fifo(ndev, frame_len);
+
+rx_irq_frame_done:
+	/* Ack Rx ctrl register */
+	nps_enet_reg_set(priv, NPS_ENET_REG_RX_CTL, 0);
+
+	return work_done;
+}
+
+static void nps_enet_tx_handler(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_tx_ctl tx_ctrl;
+
+	tx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_TX_CTL);
+
+	/* Check if we got TX */
+	if (!priv->tx_packet_sent || tx_ctrl.ct)
+		return;
+
+	/* Check Tx transmit error */
+	if (unlikely(tx_ctrl.et)) {
+		ndev->stats.tx_errors++;
+	} else {
+		ndev->stats.tx_packets++;
+		ndev->stats.tx_bytes += tx_ctrl.nt;
+	}
+
+	if (priv->tx_skb) {
+		dev_kfree_skb(priv->tx_skb);
+		priv->tx_skb = NULL;
+	}
+
+	priv->tx_packet_sent = false;
+
+	if (netif_queue_stopped(ndev))
+		netif_wake_queue(ndev);
+}
+
+/**
+ * nps_enet_poll - NAPI poll handler.
+ * @napi:       Pointer to napi_struct structure.
+ * @budget:     How many frames to process on one call.
+ *
+ * returns:     Number of processed frames
+ */
+static int nps_enet_poll(struct napi_struct *napi, int budget)
+{
+	struct net_device *ndev = napi->dev;
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_buf_int_enable buf_int_enable;
+	u32 work_done;
+
+	buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
+	buf_int_enable.tx_done = NPS_ENET_ENABLE;
+	nps_enet_tx_handler(ndev);
+	work_done = nps_enet_rx_handler(ndev);
+	if (work_done < budget) {
+		napi_complete(napi);
+		nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
+				 buf_int_enable.value);
+	}
+
+	return work_done;
+}
+
+/**
+ * nps_enet_irq_handler - Global interrupt handler for ENET.
+ * @irq:                irq number.
+ * @dev_instance:       device instance.
+ *
+ * returns: IRQ_HANDLED for all cases.
+ *
+ * EZchip ENET has 2 interrupt causes, and depending on bits raised in
+ * CTRL registers we may tell what is a reason for interrupt to fire up.
+ * We got one for RX and the other for TX (completion).
+ */
+static irqreturn_t nps_enet_irq_handler(s32 irq, void *dev_instance)
+{
+	struct net_device *ndev = dev_instance;
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_buf_int_cause buf_int_cause;
+
+	buf_int_cause.value =
+			nps_enet_reg_get(priv, NPS_ENET_REG_BUF_INT_CAUSE);
+
+	if (buf_int_cause.tx_done || buf_int_cause.rx_rdy)
+		if (likely(napi_schedule_prep(&priv->napi))) {
+			nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
+			__napi_schedule(&priv->napi);
+		}
+
+	return IRQ_HANDLED;
+}
+
+static void nps_enet_set_hw_mac_address(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_mac_cfg_1 ge_mac_cfg_1;
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
+
+	/* set MAC address in HW */
+	ge_mac_cfg_1.octet_0 = ndev->dev_addr[0];
+	ge_mac_cfg_1.octet_1 = ndev->dev_addr[1];
+	ge_mac_cfg_1.octet_2 = ndev->dev_addr[2];
+	ge_mac_cfg_1.octet_3 = ndev->dev_addr[3];
+	ge_mac_cfg_2->octet_4 = ndev->dev_addr[4];
+	ge_mac_cfg_2->octet_5 = ndev->dev_addr[5];
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_1,
+			 ge_mac_cfg_1.value);
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+}
+
+/**
+ * nps_enet_hw_reset - Reset the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function reset the PCS and TX fifo.
+ * The programming model is to set the relevant reset bits
+ * wait for some time for this to propagate and then unset
+ * the reset bits. This way we ensure that reset procedure
+ * is done successfully by device.
+ */
+static void nps_enet_hw_reset(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_rst ge_rst;
+	struct nps_enet_phase_fifo_ctl phase_fifo_ctl;
+
+	ge_rst.value = 0;
+	phase_fifo_ctl.value = 0;
+	/* Pcs reset sequence*/
+	ge_rst.gmac_0 = NPS_ENET_ENABLE;
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+	usleep_range(10, 20);
+	ge_rst.value = 0;
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
+
+	/* Tx fifo reset sequence */
+	phase_fifo_ctl.rst = NPS_ENET_ENABLE;
+	phase_fifo_ctl.init = NPS_ENET_ENABLE;
+	nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+	usleep_range(10, 20);
+	phase_fifo_ctl.value = 0;
+	nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
+			 phase_fifo_ctl.value);
+}
+
+static void nps_enet_hw_enable_control(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_mac_cfg_0 ge_mac_cfg_0;
+	struct nps_enet_buf_int_enable buf_int_enable;
+	struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 *ge_mac_cfg_3 = &priv->ge_mac_cfg_3;
+	s32 max_frame_length;
+
+	ge_mac_cfg_0.value = 0;
+	buf_int_enable.value = 0;
+	/* Enable Rx and Tx statistics */
+	ge_mac_cfg_2->stat_en = NPS_ENET_GE_MAC_CFG_2_STAT_EN;
+
+	/* Discard packets with different MAC address */
+	ge_mac_cfg_2->disc_da = NPS_ENET_ENABLE;
+
+	/* Discard multicast packets */
+	ge_mac_cfg_2->disc_mc = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
+			 ge_mac_cfg_2->value);
+
+	/* Discard Packets bigger than max frame length */
+	max_frame_length = ETH_HLEN + ndev->mtu + ETH_FCS_LEN;
+	if (max_frame_length <= NPS_ENET_MAX_FRAME_LENGTH) {
+		ge_mac_cfg_3->max_len = max_frame_length;
+		nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_3,
+				 ge_mac_cfg_3->value);
+	}
+
+	/* Enable interrupts */
+	buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
+	buf_int_enable.tx_done = NPS_ENET_ENABLE;
+	nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
+			 buf_int_enable.value);
+
+	/* Write device MAC address to HW */
+	nps_enet_set_hw_mac_address(ndev);
+
+	/* Rx and Tx HW features */
+	ge_mac_cfg_0.tx_pad_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_crc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_crc_strip = NPS_ENET_ENABLE;
+
+	/* IFG configuration */
+	ge_mac_cfg_0.rx_ifg = NPS_ENET_GE_MAC_CFG_0_RX_IFG;
+	ge_mac_cfg_0.tx_ifg = NPS_ENET_GE_MAC_CFG_0_TX_IFG;
+
+	/* preamble configuration */
+	ge_mac_cfg_0.rx_pr_check_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_pr_len = NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN;
+
+	/* enable flow control frames */
+	ge_mac_cfg_0.tx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.rx_fc_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_fc_retr = NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR;
+
+	/* Enable Rx and Tx */
+	ge_mac_cfg_0.rx_en = NPS_ENET_ENABLE;
+	ge_mac_cfg_0.tx_en = NPS_ENET_ENABLE;
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0,
+			 ge_mac_cfg_0.value);
+}
+
+static void nps_enet_hw_disable_control(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	/* Disable interrupts */
+	nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
+
+	/* Disable Rx and Tx */
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0, 0);
+}
+
+static void nps_enet_send_frame(struct net_device *ndev,
+				struct sk_buff *skb)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_tx_ctl tx_ctrl;
+	short length = skb->len;
+	u32 i, len = DIV_ROUND_UP(length, sizeof(u32));
+	u32 *src = (u32 *)virt_to_phys(skb->data);
+	bool src_is_aligned = IS_ALIGNED((unsigned long)src, sizeof(u32));
+
+	tx_ctrl.value = 0;
+	/* In case src is not aligned we need an intermediate buffer */
+	if (src_is_aligned)
+		for (i = 0; i < len; i++, src++)
+			nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, *src);
+	else { /* !src_is_aligned */
+		for (i = 0; i < len; i++, src++) {
+			u32 buf;
+
+			/* to accommodate word-unaligned address of "src"
+			 * we have to do memcpy_fromio() instead of simple "="
+			 */
+			memcpy_fromio(&buf, (void __iomem *)src, sizeof(buf));
+			nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, buf);
+		}
+	}
+	/* Write the length of the Frame */
+	tx_ctrl.nt = length;
+
+	/* Indicate SW is done */
+	priv->tx_packet_sent = true;
+	tx_ctrl.ct = NPS_ENET_ENABLE;
+
+	/* Send Frame */
+	nps_enet_reg_set(priv, NPS_ENET_REG_TX_CTL, tx_ctrl.value);
+}
+
+/**
+ * nps_enet_set_mac_address - Set the MAC address for this device.
+ * @ndev:       Pointer to net_device structure.
+ * @p:          6 byte Address to be written as MAC address.
+ *
+ * This function copies the HW address from the sockaddr structure to the
+ * net_device structure and updates the address in HW.
+ *
+ * returns:     -EBUSY if the net device is busy or 0 if the address is set
+ *              successfully.
+ */
+static s32 nps_enet_set_mac_address(struct net_device *ndev, void *p)
+{
+	struct sockaddr *addr = p;
+	s32 res;
+
+	if (netif_running(ndev))
+		return -EBUSY;
+
+	res = eth_mac_addr(ndev, p);
+	if (!res) {
+		ether_addr_copy(ndev->dev_addr, addr->sa_data);
+		nps_enet_set_hw_mac_address(ndev);
+	}
+
+	return res;
+}
+
+/**
+ * nps_enet_set_rx_mode - Change the receive filtering mode.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function enables/disables promiscuous mode
+ */
+static void nps_enet_set_rx_mode(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
+
+	ge_mac_cfg_2.value = priv->ge_mac_cfg_2.value;
+
+	if (ndev->flags & IFF_PROMISC) {
+		ge_mac_cfg_2.disc_da = NPS_ENET_DISABLE;
+		ge_mac_cfg_2.disc_mc = NPS_ENET_DISABLE;
+	} else {
+		ge_mac_cfg_2.disc_da = NPS_ENET_ENABLE;
+		ge_mac_cfg_2.disc_mc = NPS_ENET_ENABLE;
+	}
+
+	nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2, ge_mac_cfg_2.value);
+}
+
+/**
+ * nps_enet_open - Open the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * returns: 0, on success or non-zero error value on failure.
+ *
+ * This function sets the MAC address, requests and enables an IRQ
+ * for the ENET device and starts the Tx queue.
+ */
+static s32 nps_enet_open(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+	s32 err;
+
+	/* Reset private variables */
+	priv->tx_packet_sent = false;
+	priv->ge_mac_cfg_2.value = 0;
+	priv->ge_mac_cfg_3.value = 0;
+
+	/* ge_mac_cfg_3 default values */
+	priv->ge_mac_cfg_3.rx_ifg_th = NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH;
+	priv->ge_mac_cfg_3.max_len = NPS_ENET_GE_MAC_CFG_3_MAX_LEN;
+
+	/* Disable HW device */
+	nps_enet_hw_disable_control(ndev);
+
+	/* irq Rx allocation */
+	err = request_irq(priv->irq, nps_enet_irq_handler,
+			  0, "enet-rx-tx", ndev);
+	if (err)
+		return err;
+
+	napi_enable(&priv->napi);
+
+	/* Enable HW device */
+	nps_enet_hw_reset(ndev);
+	nps_enet_hw_enable_control(ndev);
+
+	netif_start_queue(ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_stop - Close the network device.
+ * @ndev:       Pointer to the network device.
+ *
+ * This function stops the Tx queue, disables interrupts for the ENET device.
+ */
+static s32 nps_enet_stop(struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	napi_disable(&priv->napi);
+	netif_stop_queue(ndev);
+	nps_enet_hw_disable_control(ndev);
+	free_irq(priv->irq, ndev);
+
+	return 0;
+}
+
+/**
+ * nps_enet_start_xmit - Starts the data transmission.
+ * @skb:        sk_buff pointer that contains data to be Transmitted.
+ * @ndev:       Pointer to net_device structure.
+ *
+ * returns: NETDEV_TX_OK, on success
+ *              NETDEV_TX_BUSY, if any of the descriptors are not free.
+ *
+ * This function is invoked from upper layers to initiate transmission.
+ */
+static netdev_tx_t nps_enet_start_xmit(struct sk_buff *skb,
+				       struct net_device *ndev)
+{
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	/* This driver handles one frame at a time  */
+	netif_stop_queue(ndev);
+
+	nps_enet_send_frame(ndev, skb);
+
+	priv->tx_skb = skb;
+
+	return NETDEV_TX_OK;
+}
+
+#ifdef CONFIG_NET_POLL_CONTROLLER
+static void nps_enet_poll_controller(struct net_device *ndev)
+{
+	disable_irq(ndev->irq);
+	nps_enet_irq_handler(ndev->irq, ndev);
+	enable_irq(ndev->irq);
+}
+#endif
+
+static const struct net_device_ops nps_netdev_ops = {
+	.ndo_open		= nps_enet_open,
+	.ndo_stop		= nps_enet_stop,
+	.ndo_start_xmit		= nps_enet_start_xmit,
+	.ndo_set_mac_address	= nps_enet_set_mac_address,
+	.ndo_set_rx_mode        = nps_enet_set_rx_mode,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+	.ndo_poll_controller	= nps_enet_poll_controller,
+#endif
+};
+
+static s32 nps_enet_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct net_device *ndev;
+	struct nps_enet_priv *priv;
+	s32 err = 0;
+	const char *mac_addr;
+	struct resource *res_regs;
+
+	if (!dev->of_node)
+		return -ENODEV;
+
+	ndev = alloc_etherdev(sizeof(struct nps_enet_priv));
+	if (!ndev)
+		return -ENOMEM;
+
+	platform_set_drvdata(pdev, ndev);
+	SET_NETDEV_DEV(ndev, dev);
+	priv = netdev_priv(ndev);
+
+	/* The EZ NET specific entries in the device structure. */
+	ndev->netdev_ops = &nps_netdev_ops;
+	ndev->watchdog_timeo = (400 * HZ / 1000);
+	/* FIXME :: no multicast support yet */
+	ndev->flags &= ~IFF_MULTICAST;
+
+	res_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	priv->regs_base = devm_ioremap_resource(dev, res_regs);
+	if (IS_ERR(priv->regs_base)) {
+		err = PTR_ERR(priv->regs_base);
+		goto out_netdev;
+	}
+	dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs_base);
+
+	/* set kernel MAC address to dev */
+	mac_addr = of_get_mac_address(dev->of_node);
+	if (mac_addr)
+		ether_addr_copy(ndev->dev_addr, mac_addr);
+	else
+		eth_hw_addr_random(ndev);
+
+	/* Get IRQ number */
+	priv->irq = platform_get_irq(pdev, 0);
+	if (!priv->irq) {
+		dev_err(dev, "failed to retrieve <irq Rx-Tx> value from device tree\n");
+		err = -ENODEV;
+		goto out_netdev;
+	}
+
+	netif_napi_add(ndev, &priv->napi, nps_enet_poll,
+		       NPS_ENET_NAPI_POLL_WEIGHT);
+
+	/* Register the driver. Should be the last thing in probe */
+	err = register_netdev(ndev);
+	if (err) {
+		dev_err(dev, "Failed to register ndev for %s, err = 0x%08x\n",
+			ndev->name, (s32)err);
+		goto out_netif_api;
+	}
+
+	dev_info(dev, "(rx/tx=%d)\n", priv->irq);
+	return 0;
+
+out_netif_api:
+	netif_napi_del(&priv->napi);
+out_netdev:
+	if (err)
+		free_netdev(ndev);
+
+	return err;
+}
+
+static s32 nps_enet_remove(struct platform_device *pdev)
+{
+	struct net_device *ndev = platform_get_drvdata(pdev);
+	struct nps_enet_priv *priv = netdev_priv(ndev);
+
+	unregister_netdev(ndev);
+	free_netdev(ndev);
+	netif_napi_del(&priv->napi);
+
+	return 0;
+}
+
+static const struct of_device_id nps_enet_dt_ids[] = {
+	{ .compatible = "ezchip,nps-mgt-enet" },
+	{ /* Sentinel */ }
+};
+
+static struct platform_driver nps_enet_driver = {
+	.probe = nps_enet_probe,
+	.remove = nps_enet_remove,
+	.driver = {
+		.name = DRV_NAME,
+		.of_match_table  = nps_enet_dt_ids,
+	},
+};
+
+module_platform_driver(nps_enet_driver);
+
+MODULE_AUTHOR("EZchip Semiconductor");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/net/ethernet/ezchip/nps_enet.h b/drivers/net/ethernet/ezchip/nps_enet.h
new file mode 100644
index 0000000..fc45c9d
--- /dev/null
+++ b/drivers/net/ethernet/ezchip/nps_enet.h
@@ -0,0 +1,336 @@
+/*
+ * Copyright(c) 2015 EZchip Technologies.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ */
+
+#ifndef _NPS_ENET_H
+#define _NPS_ENET_H
+
+/* default values */
+#define NPS_ENET_NAPI_POLL_WEIGHT		0x2
+#define NPS_ENET_MAX_FRAME_LENGTH		0x3FFF
+#define NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR	0x7
+#define NPS_ENET_GE_MAC_CFG_0_RX_IFG		0x5
+#define NPS_ENET_GE_MAC_CFG_0_TX_IFG		0xC
+#define NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN		0x7
+#define NPS_ENET_GE_MAC_CFG_2_STAT_EN		0x3
+#define NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH		0x14
+#define NPS_ENET_GE_MAC_CFG_3_MAX_LEN		0x3FFC
+#define NPS_ENET_ENABLE				1
+#define NPS_ENET_DISABLE			0
+
+/* register definitions  */
+#define NPS_ENET_REG_TX_CTL		0x800
+#define NPS_ENET_REG_TX_BUF		0x808
+#define NPS_ENET_REG_RX_CTL		0x810
+#define NPS_ENET_REG_RX_BUF		0x818
+#define NPS_ENET_REG_BUF_INT_ENABLE	0x8C0
+#define NPS_ENET_REG_BUF_INT_CAUSE	0x8C4
+#define NPS_ENET_REG_GE_MAC_CFG_0	0x1000
+#define NPS_ENET_REG_GE_MAC_CFG_1	0x1004
+#define NPS_ENET_REG_GE_MAC_CFG_2	0x1008
+#define NPS_ENET_REG_GE_MAC_CFG_3	0x100C
+#define NPS_ENET_REG_GE_RST		0x1400
+#define NPS_ENET_REG_PHASE_FIFO_CTL	0x1404
+
+/* Tx control register */
+struct nps_enet_tx_ctl {
+	union {
+		/* ct: SW sets to indicate frame ready in Tx buffer for
+		 *     transmission. HW resets to when transmission done
+		 * et: Transmit error
+		 * nt: Length in bytes of Tx frame loaded to Tx buffer
+		 */
+		struct {
+			u32
+			__reserved_1:16,
+			ct:1,
+			et:1,
+			__reserved_2:3,
+			nt:11;
+		};
+
+		u32 value;
+	};
+};
+
+/* Rx control register */
+struct nps_enet_rx_ctl {
+	union {
+		/* cr:  HW sets to indicate frame ready in Rx buffer.
+		 *      SW resets to indicate host read received frame
+		 *      and new frames can be written to Rx buffer
+		 * er:  Rx error indication
+		 * crc: Rx CRC error indication
+		 * nr:  Length in bytes of Rx frame loaded by MAC to Rx buffer
+		 */
+		struct {
+			u32
+			__reserved_1:16,
+			cr:1,
+			er:1,
+			crc:1,
+			__reserved_2:2,
+			nr:11;
+		};
+
+		u32 value;
+	};
+};
+
+/* Interrupt enable for data buffer events register */
+struct nps_enet_buf_int_enable {
+	union {
+		/* tx_done: Interrupt generation in the case when new frame
+		 *          is ready in Rx buffer
+		 * rx_rdy:  Interrupt generation in the case when current frame
+		 *          was read from TX buffer
+		 */
+		struct {
+			u32
+			__reserved:30,
+			tx_done:1,
+			rx_rdy:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Interrupt cause for data buffer events register */
+struct nps_enet_buf_int_cause {
+	union {
+		/* tx_done: Interrupt in the case when current frame was
+		 *          read from TX buffer.
+		 * rx_rdy:  Interrupt in the case when new frame is ready
+		 *          in RX buffer.
+		 */
+		struct {
+			u32
+			__reserved:30,
+			tx_done:1,
+			rx_rdy:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 0 register */
+struct nps_enet_ge_mac_cfg_0 {
+	union {
+		/* tx_pr_len:          Transmit preamble length in bytes
+		 * tx_ifg_nib:         Tx idle pattern
+		 * nib_mode:           Nibble (4-bit) Mode
+		 * rx_pr_check_en:     Receive preamble Check Enable
+		 * tx_ifg:             Transmit inter-Frame Gap
+		 * rx_ifg:             Receive inter-Frame Gap
+		 * tx_fc_retr:         Transmit Flow Control Retransmit Mode
+		 * rx_length_check_en: Receive Length Check Enable
+		 * rx_crc_ignore:      Results of the CRC check are ignored
+		 * rx_crc_strip:       MAC strips the CRC from received frames
+		 * rx_fc_en:           Receive Flow Control Enable
+		 * tx_crc_en:          Transmit CRC Enabled
+		 * tx_pad_en:          Transmit Padding Enable
+		 * tx_cf_en:           Transmit Flow Control Enable
+		 * tx_en:              Transmit Enable
+		 * rx_en:              Receive Enable
+		 */
+		struct {
+			u32
+			tx_pr_len:4,
+			tx_ifg_nib:4,
+			nib_mode:1,
+			rx_pr_check_en:1,
+			tx_ifg:6,
+			rx_ifg:4,
+			tx_fc_retr:3,
+			rx_length_check_en:1,
+			rx_crc_ignore:1,
+			rx_crc_strip:1,
+			rx_fc_en:1,
+			tx_crc_en:1,
+			tx_pad_en:1,
+			tx_fc_en:1,
+			tx_en:1,
+			rx_en:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 1 register */
+struct nps_enet_ge_mac_cfg_1 {
+	union {
+		/* octet_3: MAC address octet 3
+		 * octet_2: MAC address octet 2
+		 * octet_1: MAC address octet 1
+		 * octet_0: MAC address octet 0
+		 */
+		struct {
+			u32
+			octet_3:8,
+			octet_2:8,
+			octet_1:8,
+			octet_0:8;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 2 register */
+struct nps_enet_ge_mac_cfg_2 {
+	union {
+		/* transmit_flush_en: MAC flush enable
+		 * stat_en:           RMON statistics interface enable
+		 * disc_da:           Discard frames with DA different
+		 *                    from MAC address
+		 * disc_bc:           Discard broadcast frames
+		 * disc_mc:           Discard multicast frames
+		 * octet_5:           MAC address octet 5
+		 * octet_4:           MAC address octet 4
+		 */
+		struct {
+			u32
+			transmit_flush_en:1,
+			__reserved_1:5,
+			stat_en:2,
+			__reserved_2:1,
+			disc_da:1,
+			disc_bc:1,
+			disc_mc:1,
+			__reserved_3:4,
+			octet_5:8,
+			octet_4:8;
+		};
+
+		u32 value;
+	};
+};
+
+/* Gbps Eth MAC Configuration 3 register */
+struct nps_enet_ge_mac_cfg_3 {
+	union {
+		/* ext_oob_cbfc_sel:  Selects one of the 4 profiles for
+		 *                    extended OOB in-flow-control indication
+		 * max_len:           Maximum receive frame length in bytes
+		 * tx_cbfc_en:        Enable transmission of class-based
+		 *                    flow control packets
+		 * rx_ifg_th:         Threshold for IFG status reporting via OOB
+		 * cf_timeout:        Configurable time to decrement FC counters
+		 * cf_drop:           Drop control frames
+		 * redirect_cbfc_sel: Selects one of CBFC redirect profiles
+		 * rx_cbfc_redir_en:  Enable Rx class-based flow
+		 *                    control redirect
+		 * rx_cbfc_en:        Enable Rx class-based flow control
+		 * tm_hd_mode:        TM header mode
+		 */
+		struct {
+			u32
+			ext_oob_cbfc_sel:2,
+			max_len:14,
+			tx_cbfc_en:1,
+			rx_ifg_th:5,
+			cf_timeout:4,
+			cf_drop:1,
+			redirect_cbfc_sel:2,
+			rx_cbfc_redir_en:1,
+			rx_cbfc_en:1,
+			tm_hd_mode:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* GE MAC, PCS reset control register */
+struct nps_enet_ge_rst {
+	union {
+		/* gmac_0: GE MAC reset
+		 * spcs_0: SGMII PCS reset
+		 */
+		struct {
+			u32
+			__reserved_1:23,
+			gmac_0:1,
+			__reserved_2:7,
+			spcs_0:1;
+		};
+
+		u32 value;
+	};
+};
+
+/* Tx phase sync FIFO control register */
+struct nps_enet_phase_fifo_ctl {
+	union {
+		/* init: initialize serdes TX phase sync FIFO pointers
+		 * rst:  reset serdes TX phase sync FIFO
+		 */
+		struct {
+			u32
+			__reserved:30,
+			init:1,
+			rst:1;
+		};
+
+		u32 value;
+	};
+};
+
+/**
+ * struct nps_enet_priv - Storage of ENET's private information.
+ * @regs_base:      Base address of ENET memory-mapped control registers.
+ * @irq:            For RX/TX IRQ number.
+ * @tx_packet_sent: SW indication if frame is being sent.
+ * @tx_skb:         socket buffer of sent frame.
+ * @napi:           Structure for NAPI.
+ */
+struct nps_enet_priv {
+	void __iomem *regs_base;
+	s32 irq;
+	bool tx_packet_sent;
+	struct sk_buff *tx_skb;
+	struct napi_struct napi;
+	struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
+	struct nps_enet_ge_mac_cfg_3 ge_mac_cfg_3;
+};
+
+/**
+ * nps_reg_set - Sets ENET register with provided value.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ * @value:      Value to set in register.
+ */
+static inline void nps_enet_reg_set(struct nps_enet_priv *priv,
+				    s32 reg, s32 value)
+{
+	iowrite32be(value, priv->regs_base + reg);
+}
+
+/**
+ * nps_reg_get - Gets value of specified ENET register.
+ * @priv:       Pointer to EZchip ENET private data structure.
+ * @reg:        Register offset from base address.
+ *
+ * returns:     Value of requested register.
+ */
+static inline u32 nps_enet_reg_get(struct nps_enet_priv *priv, s32 reg)
+{
+	return ioread32be(priv->regs_base + reg);
+}
+
+#endif /* _NPS_ENET_H */
-- 
1.7.1


^ permalink raw reply related	[flat|nested] 28+ messages in thread

* Re: [PATCH v7] NET: Add ezchip ethernet driver
  2015-06-23  8:43           ` [PATCH v7] " Noam Camus
@ 2015-06-23 14:17             ` David Miller
  2015-06-24  3:40             ` Paul Gortmaker
  1 sibling, 0 replies; 28+ messages in thread
From: David Miller @ 2015-06-23 14:17 UTC (permalink / raw)
  To: noamc
  Cc: netdev, linux-kernel, Alexey.Brodkin, vgupta, giladb, cmetcalf, talz

From: Noam Camus <noamc@ezchip.com>
Date: Tue, 23 Jun 2015 11:43:53 +0300

> From: Noam Camus <noamc@ezchip.com>
> 
> Simple LAN device for debug or management purposes.
> Device supports interrupts for RX and TX(completion).
> Device does not have DMA ability.
> 
> Signed-off-by: Noam Camus <noamc@ezchip.com>
> Signed-off-by: Tal Zilcer <talz@ezchip.com>
> Acked-by: Alexey Brodkin <abrodkin@synopsys.com>

Applied, thanks.

^ permalink raw reply	[flat|nested] 28+ messages in thread

* Re: [PATCH v7] NET: Add ezchip ethernet driver
  2015-06-23  8:43           ` [PATCH v7] " Noam Camus
  2015-06-23 14:17             ` David Miller
@ 2015-06-24  3:40             ` Paul Gortmaker
  1 sibling, 0 replies; 28+ messages in thread
From: Paul Gortmaker @ 2015-06-24  3:40 UTC (permalink / raw)
  To: Noam Camus
  Cc: netdev, LKML, Alexey.Brodkin, vgupta, giladb, cmetcalf, Tal Zilcer

On Tue, Jun 23, 2015 at 4:43 AM, Noam Camus <noamc@ezchip.com> wrote:
> From: Noam Camus <noamc@ezchip.com>
>
> Simple LAN device for debug or management purposes.
> Device supports interrupts for RX and TX(completion).
> Device does not have DMA ability.
>
> Signed-off-by: Noam Camus <noamc@ezchip.com>
> Signed-off-by: Tal Zilcer <talz@ezchip.com>
> Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
> ---
> Change log for v7
>
> 1) Update nps_enet_open() comment header. (Rami Rosen)
> 2) fix return value of nps_enet_probe() when register_netdev() fails. (Rami Rosen)
> 3) Fix Kconfig Help and add dependencies. (Paul Gortmaker)

Hi Noam,

Thanks for making the changes I suggested.  But in the future, if you
get review comments from bob.smith@somewhere.com on version
N of your patchset, then add bob.smith@somewhere.com to the v(N+1)
send of the revised patch set.  There is a lot of mail traffic and if the
above does not happen, then your updates may not be seen.

Thanks,
P.
--

>
> NOTE: with new dependencies,OF && OF_NET need to be in your configuration.
> Otherwise the driver will not be chosen and built.
> ---
>  .../devicetree/bindings/net/ezchip_enet.txt        |   15 +
>  drivers/net/ethernet/Kconfig                       |    1 +
>  drivers/net/ethernet/Makefile                      |    1 +
>  drivers/net/ethernet/ezchip/Kconfig                |   26 +
>  drivers/net/ethernet/ezchip/Makefile               |    1 +
>  drivers/net/ethernet/ezchip/nps_enet.c             |  658 ++++++++++++++++++++
>  drivers/net/ethernet/ezchip/nps_enet.h             |  336 ++++++++++
>  7 files changed, 1038 insertions(+), 0 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/net/ezchip_enet.txt
>  create mode 100644 drivers/net/ethernet/ezchip/Kconfig
>  create mode 100644 drivers/net/ethernet/ezchip/Makefile
>  create mode 100644 drivers/net/ethernet/ezchip/nps_enet.c
>  create mode 100644 drivers/net/ethernet/ezchip/nps_enet.h
>
> diff --git a/Documentation/devicetree/bindings/net/ezchip_enet.txt b/Documentation/devicetree/bindings/net/ezchip_enet.txt
> new file mode 100644
> index 0000000..4e29b2b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/ezchip_enet.txt
> @@ -0,0 +1,15 @@
> +* EZchip NPS Management Ethernet port driver
> +
> +Required properties:
> +- compatible: Should be "ezchip,nps-mgt-enet"
> +- reg: Address and length of the register set for the device
> +- interrupts: Should contain the ENET interrupt
> +
> +Examples:
> +
> +       ethernet@f0003000 {
> +               compatible = "ezchip,nps-mgt-enet";
> +               reg = <0xf0003000 0x44>;
> +               interrupts = <7>;
> +               mac-address = [ 00 11 22 33 44 55 ];
> +       };
> diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
> index eadcb05..1a6b1ba 100644
> --- a/drivers/net/ethernet/Kconfig
> +++ b/drivers/net/ethernet/Kconfig
> @@ -66,6 +66,7 @@ config DNET
>  source "drivers/net/ethernet/dec/Kconfig"
>  source "drivers/net/ethernet/dlink/Kconfig"
>  source "drivers/net/ethernet/emulex/Kconfig"
> +source "drivers/net/ethernet/ezchip/Kconfig"
>  source "drivers/net/ethernet/neterion/Kconfig"
>  source "drivers/net/ethernet/faraday/Kconfig"
>  source "drivers/net/ethernet/freescale/Kconfig"
> diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
> index 1367afc..489f9cc 100644
> --- a/drivers/net/ethernet/Makefile
> +++ b/drivers/net/ethernet/Makefile
> @@ -29,6 +29,7 @@ obj-$(CONFIG_DNET) += dnet.o
>  obj-$(CONFIG_NET_VENDOR_DEC) += dec/
>  obj-$(CONFIG_NET_VENDOR_DLINK) += dlink/
>  obj-$(CONFIG_NET_VENDOR_EMULEX) += emulex/
> +obj-$(CONFIG_NET_VENDOR_EZCHIP) += ezchip/
>  obj-$(CONFIG_NET_VENDOR_EXAR) += neterion/
>  obj-$(CONFIG_NET_VENDOR_FARADAY) += faraday/
>  obj-$(CONFIG_NET_VENDOR_FREESCALE) += freescale/
> diff --git a/drivers/net/ethernet/ezchip/Kconfig b/drivers/net/ethernet/ezchip/Kconfig
> new file mode 100644
> index 0000000..48ecbc8
> --- /dev/null
> +++ b/drivers/net/ethernet/ezchip/Kconfig
> @@ -0,0 +1,26 @@
> +#
> +# EZchip network device configuration
> +#
> +
> +config NET_VENDOR_EZCHIP
> +       bool "EZchip devices"
> +       default y
> +       ---help---
> +         If you have a network (Ethernet) device belonging to this class, say Y.
> +
> +         Note that the answer to this question doesn't directly affect the
> +         kernel: saying N will just cause the configurator to skip all
> +         the questions about EZchip devices. If you say Y, you will be asked for
> +         your specific device in the following questions.
> +
> +if NET_VENDOR_EZCHIP
> +
> +config EZCHIP_NPS_MANAGEMENT_ENET
> +       tristate "EZchip NPS management enet support"
> +       depends on OF_IRQ && OF_NET
> +       ---help---
> +         Simple LAN device for debug or management purposes.
> +         Device supports interrupts for RX and TX(completion).
> +         Device does not have DMA ability.
> +
> +endif
> diff --git a/drivers/net/ethernet/ezchip/Makefile b/drivers/net/ethernet/ezchip/Makefile
> new file mode 100644
> index 0000000..e490176
> --- /dev/null
> +++ b/drivers/net/ethernet/ezchip/Makefile
> @@ -0,0 +1 @@
> +obj-$(CONFIG_EZCHIP_NPS_MANAGEMENT_ENET) += nps_enet.o
> diff --git a/drivers/net/ethernet/ezchip/nps_enet.c b/drivers/net/ethernet/ezchip/nps_enet.c
> new file mode 100644
> index 0000000..24a85b2
> --- /dev/null
> +++ b/drivers/net/ethernet/ezchip/nps_enet.c
> @@ -0,0 +1,658 @@
> +/*
> + * Copyright(c) 2015 EZchip Technologies.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + * The full GNU General Public License is included in this distribution in
> + * the file called "COPYING".
> + */
> +
> +#include <linux/module.h>
> +#include <linux/etherdevice.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/of_net.h>
> +#include <linux/of_platform.h>
> +#include "nps_enet.h"
> +
> +#define DRV_NAME                       "nps_mgt_enet"
> +
> +static void nps_enet_clean_rx_fifo(struct net_device *ndev, u32 frame_len)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       u32 i, len = DIV_ROUND_UP(frame_len, sizeof(u32));
> +
> +       /* Empty Rx FIFO buffer by reading all words */
> +       for (i = 0; i < len; i++)
> +               nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
> +}
> +
> +static void nps_enet_read_rx_fifo(struct net_device *ndev,
> +                                 unsigned char *dst, u32 length)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       s32 i, last = length & (sizeof(u32) - 1);
> +       u32 *reg = (u32 *)dst, len = length / sizeof(u32);
> +       bool dst_is_aligned = IS_ALIGNED((unsigned long)dst, sizeof(u32));
> +
> +       /* In case dst is not aligned we need an intermediate buffer */
> +       if (dst_is_aligned)
> +               for (i = 0; i < len; i++, reg++)
> +                       *reg = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
> +       else { /* !dst_is_aligned */
> +               for (i = 0; i < len; i++, reg++) {
> +                       u32 buf =
> +                               nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
> +
> +                       /* to accommodate word-unaligned address of "reg"
> +                        * we have to do memcpy_toio() instead of simple "=".
> +                        */
> +                       memcpy_toio((void __iomem *)reg, &buf, sizeof(buf));
> +               }
> +       }
> +
> +       /* copy last bytes (if any) */
> +       if (last) {
> +               u32 buf = nps_enet_reg_get(priv, NPS_ENET_REG_RX_BUF);
> +
> +               memcpy_toio((void __iomem *)reg, &buf, last);
> +       }
> +}
> +
> +static u32 nps_enet_rx_handler(struct net_device *ndev)
> +{
> +       u32 frame_len, err = 0;
> +       u32 work_done = 0;
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct sk_buff *skb;
> +       struct nps_enet_rx_ctl rx_ctrl;
> +
> +       rx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_RX_CTL);
> +       frame_len = rx_ctrl.nr;
> +
> +       /* Check if we got RX */
> +       if (!rx_ctrl.cr)
> +               return work_done;
> +
> +       /* If we got here there is a work for us */
> +       work_done++;
> +
> +       /* Check Rx error */
> +       if (rx_ctrl.er) {
> +               ndev->stats.rx_errors++;
> +               err = 1;
> +       }
> +
> +       /* Check Rx CRC error */
> +       if (rx_ctrl.crc) {
> +               ndev->stats.rx_crc_errors++;
> +               ndev->stats.rx_dropped++;
> +               err = 1;
> +       }
> +
> +       /* Check Frame length Min 64b */
> +       if (unlikely(frame_len < ETH_ZLEN)) {
> +               ndev->stats.rx_length_errors++;
> +               ndev->stats.rx_dropped++;
> +               err = 1;
> +       }
> +
> +       if (err)
> +               goto rx_irq_clean;
> +
> +       /* Skb allocation */
> +       skb = netdev_alloc_skb_ip_align(ndev, frame_len);
> +       if (unlikely(!skb)) {
> +               ndev->stats.rx_errors++;
> +               ndev->stats.rx_dropped++;
> +               goto rx_irq_clean;
> +       }
> +
> +       /* Copy frame from Rx fifo into the skb */
> +       nps_enet_read_rx_fifo(ndev, skb->data, frame_len);
> +
> +       skb_put(skb, frame_len);
> +       skb->protocol = eth_type_trans(skb, ndev);
> +       skb->ip_summed = CHECKSUM_UNNECESSARY;
> +
> +       ndev->stats.rx_packets++;
> +       ndev->stats.rx_bytes += frame_len;
> +       netif_receive_skb(skb);
> +
> +       goto rx_irq_frame_done;
> +
> +rx_irq_clean:
> +       /* Clean Rx fifo */
> +       nps_enet_clean_rx_fifo(ndev, frame_len);
> +
> +rx_irq_frame_done:
> +       /* Ack Rx ctrl register */
> +       nps_enet_reg_set(priv, NPS_ENET_REG_RX_CTL, 0);
> +
> +       return work_done;
> +}
> +
> +static void nps_enet_tx_handler(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_tx_ctl tx_ctrl;
> +
> +       tx_ctrl.value = nps_enet_reg_get(priv, NPS_ENET_REG_TX_CTL);
> +
> +       /* Check if we got TX */
> +       if (!priv->tx_packet_sent || tx_ctrl.ct)
> +               return;
> +
> +       /* Check Tx transmit error */
> +       if (unlikely(tx_ctrl.et)) {
> +               ndev->stats.tx_errors++;
> +       } else {
> +               ndev->stats.tx_packets++;
> +               ndev->stats.tx_bytes += tx_ctrl.nt;
> +       }
> +
> +       if (priv->tx_skb) {
> +               dev_kfree_skb(priv->tx_skb);
> +               priv->tx_skb = NULL;
> +       }
> +
> +       priv->tx_packet_sent = false;
> +
> +       if (netif_queue_stopped(ndev))
> +               netif_wake_queue(ndev);
> +}
> +
> +/**
> + * nps_enet_poll - NAPI poll handler.
> + * @napi:       Pointer to napi_struct structure.
> + * @budget:     How many frames to process on one call.
> + *
> + * returns:     Number of processed frames
> + */
> +static int nps_enet_poll(struct napi_struct *napi, int budget)
> +{
> +       struct net_device *ndev = napi->dev;
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_buf_int_enable buf_int_enable;
> +       u32 work_done;
> +
> +       buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
> +       buf_int_enable.tx_done = NPS_ENET_ENABLE;
> +       nps_enet_tx_handler(ndev);
> +       work_done = nps_enet_rx_handler(ndev);
> +       if (work_done < budget) {
> +               napi_complete(napi);
> +               nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
> +                                buf_int_enable.value);
> +       }
> +
> +       return work_done;
> +}
> +
> +/**
> + * nps_enet_irq_handler - Global interrupt handler for ENET.
> + * @irq:                irq number.
> + * @dev_instance:       device instance.
> + *
> + * returns: IRQ_HANDLED for all cases.
> + *
> + * EZchip ENET has 2 interrupt causes, and depending on bits raised in
> + * CTRL registers we may tell what is a reason for interrupt to fire up.
> + * We got one for RX and the other for TX (completion).
> + */
> +static irqreturn_t nps_enet_irq_handler(s32 irq, void *dev_instance)
> +{
> +       struct net_device *ndev = dev_instance;
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_buf_int_cause buf_int_cause;
> +
> +       buf_int_cause.value =
> +                       nps_enet_reg_get(priv, NPS_ENET_REG_BUF_INT_CAUSE);
> +
> +       if (buf_int_cause.tx_done || buf_int_cause.rx_rdy)
> +               if (likely(napi_schedule_prep(&priv->napi))) {
> +                       nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
> +                       __napi_schedule(&priv->napi);
> +               }
> +
> +       return IRQ_HANDLED;
> +}
> +
> +static void nps_enet_set_hw_mac_address(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_ge_mac_cfg_1 ge_mac_cfg_1;
> +       struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
> +
> +       /* set MAC address in HW */
> +       ge_mac_cfg_1.octet_0 = ndev->dev_addr[0];
> +       ge_mac_cfg_1.octet_1 = ndev->dev_addr[1];
> +       ge_mac_cfg_1.octet_2 = ndev->dev_addr[2];
> +       ge_mac_cfg_1.octet_3 = ndev->dev_addr[3];
> +       ge_mac_cfg_2->octet_4 = ndev->dev_addr[4];
> +       ge_mac_cfg_2->octet_5 = ndev->dev_addr[5];
> +
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_1,
> +                        ge_mac_cfg_1.value);
> +
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
> +                        ge_mac_cfg_2->value);
> +}
> +
> +/**
> + * nps_enet_hw_reset - Reset the network device.
> + * @ndev:       Pointer to the network device.
> + *
> + * This function reset the PCS and TX fifo.
> + * The programming model is to set the relevant reset bits
> + * wait for some time for this to propagate and then unset
> + * the reset bits. This way we ensure that reset procedure
> + * is done successfully by device.
> + */
> +static void nps_enet_hw_reset(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_ge_rst ge_rst;
> +       struct nps_enet_phase_fifo_ctl phase_fifo_ctl;
> +
> +       ge_rst.value = 0;
> +       phase_fifo_ctl.value = 0;
> +       /* Pcs reset sequence*/
> +       ge_rst.gmac_0 = NPS_ENET_ENABLE;
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
> +       usleep_range(10, 20);
> +       ge_rst.value = 0;
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_RST, ge_rst.value);
> +
> +       /* Tx fifo reset sequence */
> +       phase_fifo_ctl.rst = NPS_ENET_ENABLE;
> +       phase_fifo_ctl.init = NPS_ENET_ENABLE;
> +       nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
> +                        phase_fifo_ctl.value);
> +       usleep_range(10, 20);
> +       phase_fifo_ctl.value = 0;
> +       nps_enet_reg_set(priv, NPS_ENET_REG_PHASE_FIFO_CTL,
> +                        phase_fifo_ctl.value);
> +}
> +
> +static void nps_enet_hw_enable_control(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_ge_mac_cfg_0 ge_mac_cfg_0;
> +       struct nps_enet_buf_int_enable buf_int_enable;
> +       struct nps_enet_ge_mac_cfg_2 *ge_mac_cfg_2 = &priv->ge_mac_cfg_2;
> +       struct nps_enet_ge_mac_cfg_3 *ge_mac_cfg_3 = &priv->ge_mac_cfg_3;
> +       s32 max_frame_length;
> +
> +       ge_mac_cfg_0.value = 0;
> +       buf_int_enable.value = 0;
> +       /* Enable Rx and Tx statistics */
> +       ge_mac_cfg_2->stat_en = NPS_ENET_GE_MAC_CFG_2_STAT_EN;
> +
> +       /* Discard packets with different MAC address */
> +       ge_mac_cfg_2->disc_da = NPS_ENET_ENABLE;
> +
> +       /* Discard multicast packets */
> +       ge_mac_cfg_2->disc_mc = NPS_ENET_ENABLE;
> +
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2,
> +                        ge_mac_cfg_2->value);
> +
> +       /* Discard Packets bigger than max frame length */
> +       max_frame_length = ETH_HLEN + ndev->mtu + ETH_FCS_LEN;
> +       if (max_frame_length <= NPS_ENET_MAX_FRAME_LENGTH) {
> +               ge_mac_cfg_3->max_len = max_frame_length;
> +               nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_3,
> +                                ge_mac_cfg_3->value);
> +       }
> +
> +       /* Enable interrupts */
> +       buf_int_enable.rx_rdy = NPS_ENET_ENABLE;
> +       buf_int_enable.tx_done = NPS_ENET_ENABLE;
> +       nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE,
> +                        buf_int_enable.value);
> +
> +       /* Write device MAC address to HW */
> +       nps_enet_set_hw_mac_address(ndev);
> +
> +       /* Rx and Tx HW features */
> +       ge_mac_cfg_0.tx_pad_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.tx_crc_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.rx_crc_strip = NPS_ENET_ENABLE;
> +
> +       /* IFG configuration */
> +       ge_mac_cfg_0.rx_ifg = NPS_ENET_GE_MAC_CFG_0_RX_IFG;
> +       ge_mac_cfg_0.tx_ifg = NPS_ENET_GE_MAC_CFG_0_TX_IFG;
> +
> +       /* preamble configuration */
> +       ge_mac_cfg_0.rx_pr_check_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.tx_pr_len = NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN;
> +
> +       /* enable flow control frames */
> +       ge_mac_cfg_0.tx_fc_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.rx_fc_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.tx_fc_retr = NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR;
> +
> +       /* Enable Rx and Tx */
> +       ge_mac_cfg_0.rx_en = NPS_ENET_ENABLE;
> +       ge_mac_cfg_0.tx_en = NPS_ENET_ENABLE;
> +
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0,
> +                        ge_mac_cfg_0.value);
> +}
> +
> +static void nps_enet_hw_disable_control(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +
> +       /* Disable interrupts */
> +       nps_enet_reg_set(priv, NPS_ENET_REG_BUF_INT_ENABLE, 0);
> +
> +       /* Disable Rx and Tx */
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_0, 0);
> +}
> +
> +static void nps_enet_send_frame(struct net_device *ndev,
> +                               struct sk_buff *skb)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_tx_ctl tx_ctrl;
> +       short length = skb->len;
> +       u32 i, len = DIV_ROUND_UP(length, sizeof(u32));
> +       u32 *src = (u32 *)virt_to_phys(skb->data);
> +       bool src_is_aligned = IS_ALIGNED((unsigned long)src, sizeof(u32));
> +
> +       tx_ctrl.value = 0;
> +       /* In case src is not aligned we need an intermediate buffer */
> +       if (src_is_aligned)
> +               for (i = 0; i < len; i++, src++)
> +                       nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, *src);
> +       else { /* !src_is_aligned */
> +               for (i = 0; i < len; i++, src++) {
> +                       u32 buf;
> +
> +                       /* to accommodate word-unaligned address of "src"
> +                        * we have to do memcpy_fromio() instead of simple "="
> +                        */
> +                       memcpy_fromio(&buf, (void __iomem *)src, sizeof(buf));
> +                       nps_enet_reg_set(priv, NPS_ENET_REG_TX_BUF, buf);
> +               }
> +       }
> +       /* Write the length of the Frame */
> +       tx_ctrl.nt = length;
> +
> +       /* Indicate SW is done */
> +       priv->tx_packet_sent = true;
> +       tx_ctrl.ct = NPS_ENET_ENABLE;
> +
> +       /* Send Frame */
> +       nps_enet_reg_set(priv, NPS_ENET_REG_TX_CTL, tx_ctrl.value);
> +}
> +
> +/**
> + * nps_enet_set_mac_address - Set the MAC address for this device.
> + * @ndev:       Pointer to net_device structure.
> + * @p:          6 byte Address to be written as MAC address.
> + *
> + * This function copies the HW address from the sockaddr structure to the
> + * net_device structure and updates the address in HW.
> + *
> + * returns:     -EBUSY if the net device is busy or 0 if the address is set
> + *              successfully.
> + */
> +static s32 nps_enet_set_mac_address(struct net_device *ndev, void *p)
> +{
> +       struct sockaddr *addr = p;
> +       s32 res;
> +
> +       if (netif_running(ndev))
> +               return -EBUSY;
> +
> +       res = eth_mac_addr(ndev, p);
> +       if (!res) {
> +               ether_addr_copy(ndev->dev_addr, addr->sa_data);
> +               nps_enet_set_hw_mac_address(ndev);
> +       }
> +
> +       return res;
> +}
> +
> +/**
> + * nps_enet_set_rx_mode - Change the receive filtering mode.
> + * @ndev:       Pointer to the network device.
> + *
> + * This function enables/disables promiscuous mode
> + */
> +static void nps_enet_set_rx_mode(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
> +
> +       ge_mac_cfg_2.value = priv->ge_mac_cfg_2.value;
> +
> +       if (ndev->flags & IFF_PROMISC) {
> +               ge_mac_cfg_2.disc_da = NPS_ENET_DISABLE;
> +               ge_mac_cfg_2.disc_mc = NPS_ENET_DISABLE;
> +       } else {
> +               ge_mac_cfg_2.disc_da = NPS_ENET_ENABLE;
> +               ge_mac_cfg_2.disc_mc = NPS_ENET_ENABLE;
> +       }
> +
> +       nps_enet_reg_set(priv, NPS_ENET_REG_GE_MAC_CFG_2, ge_mac_cfg_2.value);
> +}
> +
> +/**
> + * nps_enet_open - Open the network device.
> + * @ndev:       Pointer to the network device.
> + *
> + * returns: 0, on success or non-zero error value on failure.
> + *
> + * This function sets the MAC address, requests and enables an IRQ
> + * for the ENET device and starts the Tx queue.
> + */
> +static s32 nps_enet_open(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +       s32 err;
> +
> +       /* Reset private variables */
> +       priv->tx_packet_sent = false;
> +       priv->ge_mac_cfg_2.value = 0;
> +       priv->ge_mac_cfg_3.value = 0;
> +
> +       /* ge_mac_cfg_3 default values */
> +       priv->ge_mac_cfg_3.rx_ifg_th = NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH;
> +       priv->ge_mac_cfg_3.max_len = NPS_ENET_GE_MAC_CFG_3_MAX_LEN;
> +
> +       /* Disable HW device */
> +       nps_enet_hw_disable_control(ndev);
> +
> +       /* irq Rx allocation */
> +       err = request_irq(priv->irq, nps_enet_irq_handler,
> +                         0, "enet-rx-tx", ndev);
> +       if (err)
> +               return err;
> +
> +       napi_enable(&priv->napi);
> +
> +       /* Enable HW device */
> +       nps_enet_hw_reset(ndev);
> +       nps_enet_hw_enable_control(ndev);
> +
> +       netif_start_queue(ndev);
> +
> +       return 0;
> +}
> +
> +/**
> + * nps_enet_stop - Close the network device.
> + * @ndev:       Pointer to the network device.
> + *
> + * This function stops the Tx queue, disables interrupts for the ENET device.
> + */
> +static s32 nps_enet_stop(struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +
> +       napi_disable(&priv->napi);
> +       netif_stop_queue(ndev);
> +       nps_enet_hw_disable_control(ndev);
> +       free_irq(priv->irq, ndev);
> +
> +       return 0;
> +}
> +
> +/**
> + * nps_enet_start_xmit - Starts the data transmission.
> + * @skb:        sk_buff pointer that contains data to be Transmitted.
> + * @ndev:       Pointer to net_device structure.
> + *
> + * returns: NETDEV_TX_OK, on success
> + *              NETDEV_TX_BUSY, if any of the descriptors are not free.
> + *
> + * This function is invoked from upper layers to initiate transmission.
> + */
> +static netdev_tx_t nps_enet_start_xmit(struct sk_buff *skb,
> +                                      struct net_device *ndev)
> +{
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +
> +       /* This driver handles one frame at a time  */
> +       netif_stop_queue(ndev);
> +
> +       nps_enet_send_frame(ndev, skb);
> +
> +       priv->tx_skb = skb;
> +
> +       return NETDEV_TX_OK;
> +}
> +
> +#ifdef CONFIG_NET_POLL_CONTROLLER
> +static void nps_enet_poll_controller(struct net_device *ndev)
> +{
> +       disable_irq(ndev->irq);
> +       nps_enet_irq_handler(ndev->irq, ndev);
> +       enable_irq(ndev->irq);
> +}
> +#endif
> +
> +static const struct net_device_ops nps_netdev_ops = {
> +       .ndo_open               = nps_enet_open,
> +       .ndo_stop               = nps_enet_stop,
> +       .ndo_start_xmit         = nps_enet_start_xmit,
> +       .ndo_set_mac_address    = nps_enet_set_mac_address,
> +       .ndo_set_rx_mode        = nps_enet_set_rx_mode,
> +#ifdef CONFIG_NET_POLL_CONTROLLER
> +       .ndo_poll_controller    = nps_enet_poll_controller,
> +#endif
> +};
> +
> +static s32 nps_enet_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct net_device *ndev;
> +       struct nps_enet_priv *priv;
> +       s32 err = 0;
> +       const char *mac_addr;
> +       struct resource *res_regs;
> +
> +       if (!dev->of_node)
> +               return -ENODEV;
> +
> +       ndev = alloc_etherdev(sizeof(struct nps_enet_priv));
> +       if (!ndev)
> +               return -ENOMEM;
> +
> +       platform_set_drvdata(pdev, ndev);
> +       SET_NETDEV_DEV(ndev, dev);
> +       priv = netdev_priv(ndev);
> +
> +       /* The EZ NET specific entries in the device structure. */
> +       ndev->netdev_ops = &nps_netdev_ops;
> +       ndev->watchdog_timeo = (400 * HZ / 1000);
> +       /* FIXME :: no multicast support yet */
> +       ndev->flags &= ~IFF_MULTICAST;
> +
> +       res_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +       priv->regs_base = devm_ioremap_resource(dev, res_regs);
> +       if (IS_ERR(priv->regs_base)) {
> +               err = PTR_ERR(priv->regs_base);
> +               goto out_netdev;
> +       }
> +       dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs_base);
> +
> +       /* set kernel MAC address to dev */
> +       mac_addr = of_get_mac_address(dev->of_node);
> +       if (mac_addr)
> +               ether_addr_copy(ndev->dev_addr, mac_addr);
> +       else
> +               eth_hw_addr_random(ndev);
> +
> +       /* Get IRQ number */
> +       priv->irq = platform_get_irq(pdev, 0);
> +       if (!priv->irq) {
> +               dev_err(dev, "failed to retrieve <irq Rx-Tx> value from device tree\n");
> +               err = -ENODEV;
> +               goto out_netdev;
> +       }
> +
> +       netif_napi_add(ndev, &priv->napi, nps_enet_poll,
> +                      NPS_ENET_NAPI_POLL_WEIGHT);
> +
> +       /* Register the driver. Should be the last thing in probe */
> +       err = register_netdev(ndev);
> +       if (err) {
> +               dev_err(dev, "Failed to register ndev for %s, err = 0x%08x\n",
> +                       ndev->name, (s32)err);
> +               goto out_netif_api;
> +       }
> +
> +       dev_info(dev, "(rx/tx=%d)\n", priv->irq);
> +       return 0;
> +
> +out_netif_api:
> +       netif_napi_del(&priv->napi);
> +out_netdev:
> +       if (err)
> +               free_netdev(ndev);
> +
> +       return err;
> +}
> +
> +static s32 nps_enet_remove(struct platform_device *pdev)
> +{
> +       struct net_device *ndev = platform_get_drvdata(pdev);
> +       struct nps_enet_priv *priv = netdev_priv(ndev);
> +
> +       unregister_netdev(ndev);
> +       free_netdev(ndev);
> +       netif_napi_del(&priv->napi);
> +
> +       return 0;
> +}
> +
> +static const struct of_device_id nps_enet_dt_ids[] = {
> +       { .compatible = "ezchip,nps-mgt-enet" },
> +       { /* Sentinel */ }
> +};
> +
> +static struct platform_driver nps_enet_driver = {
> +       .probe = nps_enet_probe,
> +       .remove = nps_enet_remove,
> +       .driver = {
> +               .name = DRV_NAME,
> +               .of_match_table  = nps_enet_dt_ids,
> +       },
> +};
> +
> +module_platform_driver(nps_enet_driver);
> +
> +MODULE_AUTHOR("EZchip Semiconductor");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/net/ethernet/ezchip/nps_enet.h b/drivers/net/ethernet/ezchip/nps_enet.h
> new file mode 100644
> index 0000000..fc45c9d
> --- /dev/null
> +++ b/drivers/net/ethernet/ezchip/nps_enet.h
> @@ -0,0 +1,336 @@
> +/*
> + * Copyright(c) 2015 EZchip Technologies.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + * The full GNU General Public License is included in this distribution in
> + * the file called "COPYING".
> + */
> +
> +#ifndef _NPS_ENET_H
> +#define _NPS_ENET_H
> +
> +/* default values */
> +#define NPS_ENET_NAPI_POLL_WEIGHT              0x2
> +#define NPS_ENET_MAX_FRAME_LENGTH              0x3FFF
> +#define NPS_ENET_GE_MAC_CFG_0_TX_FC_RETR       0x7
> +#define NPS_ENET_GE_MAC_CFG_0_RX_IFG           0x5
> +#define NPS_ENET_GE_MAC_CFG_0_TX_IFG           0xC
> +#define NPS_ENET_GE_MAC_CFG_0_TX_PR_LEN                0x7
> +#define NPS_ENET_GE_MAC_CFG_2_STAT_EN          0x3
> +#define NPS_ENET_GE_MAC_CFG_3_RX_IFG_TH                0x14
> +#define NPS_ENET_GE_MAC_CFG_3_MAX_LEN          0x3FFC
> +#define NPS_ENET_ENABLE                                1
> +#define NPS_ENET_DISABLE                       0
> +
> +/* register definitions  */
> +#define NPS_ENET_REG_TX_CTL            0x800
> +#define NPS_ENET_REG_TX_BUF            0x808
> +#define NPS_ENET_REG_RX_CTL            0x810
> +#define NPS_ENET_REG_RX_BUF            0x818
> +#define NPS_ENET_REG_BUF_INT_ENABLE    0x8C0
> +#define NPS_ENET_REG_BUF_INT_CAUSE     0x8C4
> +#define NPS_ENET_REG_GE_MAC_CFG_0      0x1000
> +#define NPS_ENET_REG_GE_MAC_CFG_1      0x1004
> +#define NPS_ENET_REG_GE_MAC_CFG_2      0x1008
> +#define NPS_ENET_REG_GE_MAC_CFG_3      0x100C
> +#define NPS_ENET_REG_GE_RST            0x1400
> +#define NPS_ENET_REG_PHASE_FIFO_CTL    0x1404
> +
> +/* Tx control register */
> +struct nps_enet_tx_ctl {
> +       union {
> +               /* ct: SW sets to indicate frame ready in Tx buffer for
> +                *     transmission. HW resets to when transmission done
> +                * et: Transmit error
> +                * nt: Length in bytes of Tx frame loaded to Tx buffer
> +                */
> +               struct {
> +                       u32
> +                       __reserved_1:16,
> +                       ct:1,
> +                       et:1,
> +                       __reserved_2:3,
> +                       nt:11;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Rx control register */
> +struct nps_enet_rx_ctl {
> +       union {
> +               /* cr:  HW sets to indicate frame ready in Rx buffer.
> +                *      SW resets to indicate host read received frame
> +                *      and new frames can be written to Rx buffer
> +                * er:  Rx error indication
> +                * crc: Rx CRC error indication
> +                * nr:  Length in bytes of Rx frame loaded by MAC to Rx buffer
> +                */
> +               struct {
> +                       u32
> +                       __reserved_1:16,
> +                       cr:1,
> +                       er:1,
> +                       crc:1,
> +                       __reserved_2:2,
> +                       nr:11;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Interrupt enable for data buffer events register */
> +struct nps_enet_buf_int_enable {
> +       union {
> +               /* tx_done: Interrupt generation in the case when new frame
> +                *          is ready in Rx buffer
> +                * rx_rdy:  Interrupt generation in the case when current frame
> +                *          was read from TX buffer
> +                */
> +               struct {
> +                       u32
> +                       __reserved:30,
> +                       tx_done:1,
> +                       rx_rdy:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Interrupt cause for data buffer events register */
> +struct nps_enet_buf_int_cause {
> +       union {
> +               /* tx_done: Interrupt in the case when current frame was
> +                *          read from TX buffer.
> +                * rx_rdy:  Interrupt in the case when new frame is ready
> +                *          in RX buffer.
> +                */
> +               struct {
> +                       u32
> +                       __reserved:30,
> +                       tx_done:1,
> +                       rx_rdy:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Gbps Eth MAC Configuration 0 register */
> +struct nps_enet_ge_mac_cfg_0 {
> +       union {
> +               /* tx_pr_len:          Transmit preamble length in bytes
> +                * tx_ifg_nib:         Tx idle pattern
> +                * nib_mode:           Nibble (4-bit) Mode
> +                * rx_pr_check_en:     Receive preamble Check Enable
> +                * tx_ifg:             Transmit inter-Frame Gap
> +                * rx_ifg:             Receive inter-Frame Gap
> +                * tx_fc_retr:         Transmit Flow Control Retransmit Mode
> +                * rx_length_check_en: Receive Length Check Enable
> +                * rx_crc_ignore:      Results of the CRC check are ignored
> +                * rx_crc_strip:       MAC strips the CRC from received frames
> +                * rx_fc_en:           Receive Flow Control Enable
> +                * tx_crc_en:          Transmit CRC Enabled
> +                * tx_pad_en:          Transmit Padding Enable
> +                * tx_cf_en:           Transmit Flow Control Enable
> +                * tx_en:              Transmit Enable
> +                * rx_en:              Receive Enable
> +                */
> +               struct {
> +                       u32
> +                       tx_pr_len:4,
> +                       tx_ifg_nib:4,
> +                       nib_mode:1,
> +                       rx_pr_check_en:1,
> +                       tx_ifg:6,
> +                       rx_ifg:4,
> +                       tx_fc_retr:3,
> +                       rx_length_check_en:1,
> +                       rx_crc_ignore:1,
> +                       rx_crc_strip:1,
> +                       rx_fc_en:1,
> +                       tx_crc_en:1,
> +                       tx_pad_en:1,
> +                       tx_fc_en:1,
> +                       tx_en:1,
> +                       rx_en:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Gbps Eth MAC Configuration 1 register */
> +struct nps_enet_ge_mac_cfg_1 {
> +       union {
> +               /* octet_3: MAC address octet 3
> +                * octet_2: MAC address octet 2
> +                * octet_1: MAC address octet 1
> +                * octet_0: MAC address octet 0
> +                */
> +               struct {
> +                       u32
> +                       octet_3:8,
> +                       octet_2:8,
> +                       octet_1:8,
> +                       octet_0:8;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Gbps Eth MAC Configuration 2 register */
> +struct nps_enet_ge_mac_cfg_2 {
> +       union {
> +               /* transmit_flush_en: MAC flush enable
> +                * stat_en:           RMON statistics interface enable
> +                * disc_da:           Discard frames with DA different
> +                *                    from MAC address
> +                * disc_bc:           Discard broadcast frames
> +                * disc_mc:           Discard multicast frames
> +                * octet_5:           MAC address octet 5
> +                * octet_4:           MAC address octet 4
> +                */
> +               struct {
> +                       u32
> +                       transmit_flush_en:1,
> +                       __reserved_1:5,
> +                       stat_en:2,
> +                       __reserved_2:1,
> +                       disc_da:1,
> +                       disc_bc:1,
> +                       disc_mc:1,
> +                       __reserved_3:4,
> +                       octet_5:8,
> +                       octet_4:8;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Gbps Eth MAC Configuration 3 register */
> +struct nps_enet_ge_mac_cfg_3 {
> +       union {
> +               /* ext_oob_cbfc_sel:  Selects one of the 4 profiles for
> +                *                    extended OOB in-flow-control indication
> +                * max_len:           Maximum receive frame length in bytes
> +                * tx_cbfc_en:        Enable transmission of class-based
> +                *                    flow control packets
> +                * rx_ifg_th:         Threshold for IFG status reporting via OOB
> +                * cf_timeout:        Configurable time to decrement FC counters
> +                * cf_drop:           Drop control frames
> +                * redirect_cbfc_sel: Selects one of CBFC redirect profiles
> +                * rx_cbfc_redir_en:  Enable Rx class-based flow
> +                *                    control redirect
> +                * rx_cbfc_en:        Enable Rx class-based flow control
> +                * tm_hd_mode:        TM header mode
> +                */
> +               struct {
> +                       u32
> +                       ext_oob_cbfc_sel:2,
> +                       max_len:14,
> +                       tx_cbfc_en:1,
> +                       rx_ifg_th:5,
> +                       cf_timeout:4,
> +                       cf_drop:1,
> +                       redirect_cbfc_sel:2,
> +                       rx_cbfc_redir_en:1,
> +                       rx_cbfc_en:1,
> +                       tm_hd_mode:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* GE MAC, PCS reset control register */
> +struct nps_enet_ge_rst {
> +       union {
> +               /* gmac_0: GE MAC reset
> +                * spcs_0: SGMII PCS reset
> +                */
> +               struct {
> +                       u32
> +                       __reserved_1:23,
> +                       gmac_0:1,
> +                       __reserved_2:7,
> +                       spcs_0:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/* Tx phase sync FIFO control register */
> +struct nps_enet_phase_fifo_ctl {
> +       union {
> +               /* init: initialize serdes TX phase sync FIFO pointers
> +                * rst:  reset serdes TX phase sync FIFO
> +                */
> +               struct {
> +                       u32
> +                       __reserved:30,
> +                       init:1,
> +                       rst:1;
> +               };
> +
> +               u32 value;
> +       };
> +};
> +
> +/**
> + * struct nps_enet_priv - Storage of ENET's private information.
> + * @regs_base:      Base address of ENET memory-mapped control registers.
> + * @irq:            For RX/TX IRQ number.
> + * @tx_packet_sent: SW indication if frame is being sent.
> + * @tx_skb:         socket buffer of sent frame.
> + * @napi:           Structure for NAPI.
> + */
> +struct nps_enet_priv {
> +       void __iomem *regs_base;
> +       s32 irq;
> +       bool tx_packet_sent;
> +       struct sk_buff *tx_skb;
> +       struct napi_struct napi;
> +       struct nps_enet_ge_mac_cfg_2 ge_mac_cfg_2;
> +       struct nps_enet_ge_mac_cfg_3 ge_mac_cfg_3;
> +};
> +
> +/**
> + * nps_reg_set - Sets ENET register with provided value.
> + * @priv:       Pointer to EZchip ENET private data structure.
> + * @reg:        Register offset from base address.
> + * @value:      Value to set in register.
> + */
> +static inline void nps_enet_reg_set(struct nps_enet_priv *priv,
> +                                   s32 reg, s32 value)
> +{
> +       iowrite32be(value, priv->regs_base + reg);
> +}
> +
> +/**
> + * nps_reg_get - Gets value of specified ENET register.
> + * @priv:       Pointer to EZchip ENET private data structure.
> + * @reg:        Register offset from base address.
> + *
> + * returns:     Value of requested register.
> + */
> +static inline u32 nps_enet_reg_get(struct nps_enet_priv *priv, s32 reg)
> +{
> +       return ioread32be(priv->regs_base + reg);
> +}
> +
> +#endif /* _NPS_ENET_H */
> --
> 1.7.1
>
> --
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^ permalink raw reply	[flat|nested] 28+ messages in thread

end of thread, other threads:[~2015-06-24  3:41 UTC | newest]

Thread overview: 28+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-06-09 12:44 [PATCH] NET: Add ezchip ethernet driver Noam Camus
2015-06-09 14:11 ` Alexey Brodkin
2015-06-10  7:54 ` Paul Bolle
2015-06-11  8:33 ` [PATCH v2] " Noam Camus
2015-06-11 17:41   ` [PATCH v3] " Noam Camus
2015-06-14  6:26     ` [PATCH v4] " Noam Camus
2015-06-14 20:25       ` Florian Fainelli
2015-06-16 14:35       ` [PATCH v5] " Noam Camus
2015-06-21 16:22         ` David Miller
2015-06-21 16:22           ` David Miller
2015-06-22 14:52           ` Noam Camus
2015-06-22 14:52             ` Noam Camus
2015-06-22 17:45         ` Mahesh Bandewar
2015-06-22 17:45           ` Mahesh Bandewar
2015-06-22 23:47           ` Paul Gortmaker
2015-06-22 23:47             ` Paul Gortmaker
2015-06-23  6:05           ` Noam Camus
2015-06-23  6:05             ` Noam Camus
2015-06-23  7:31           ` David Miller
2015-06-23  7:31             ` David Miller
2015-06-22 20:51         ` [PATCH v6] " Noam Camus
2015-06-22 20:51           ` Noam Camus
2015-06-22 21:04           ` Rami Rosen
2015-06-22 21:04             ` Rami Rosen
2015-06-23  8:43           ` [PATCH v7] " Noam Camus
2015-06-23 14:17             ` David Miller
2015-06-24  3:40             ` Paul Gortmaker
2015-06-11 22:43   ` [PATCH v2] " David Miller

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