From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51759) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZkGkR-0007QS-Uy for qemu-devel@nongnu.org; Thu, 08 Oct 2015 15:21:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZkGkP-0008Le-Bg for qemu-devel@nongnu.org; Thu, 08 Oct 2015 15:21:03 -0400 Received: from mail-pa0-x229.google.com ([2607:f8b0:400e:c03::229]:36158) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZkGkP-0008LU-6E for qemu-devel@nongnu.org; Thu, 08 Oct 2015 15:21:01 -0400 Received: by pablk4 with SMTP id lk4so62674093pab.3 for ; Thu, 08 Oct 2015 12:21:00 -0700 (PDT) Date: Thu, 8 Oct 2015 12:16:18 -0700 From: "Edgar E. Iglesias" Message-ID: <20151008191618.GH24839@toto> References: <1443911939-2825-1-git-send-email-edgar.iglesias@gmail.com> <1443911939-2825-2-git-send-email-edgar.iglesias@gmail.com> <87ziztwwm7.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <87ziztwwm7.fsf@linaro.org> Subject: Re: [Qemu-devel] [PATCH v3 1/9] target-arm: Add HPFAR_EL2 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alex =?iso-8859-1?Q?Benn=E9e?= Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, qemu-devel@nongnu.org, agraf@suse.de, laurent.desnogues@gmail.com, serge.fdrv@gmail.com On Thu, Oct 08, 2015 at 10:14:08AM +0100, Alex Bennée wrote: > > Edgar E. Iglesias writes: > > > From: "Edgar E. Iglesias" > > > > Signed-off-by: Edgar E. Iglesias > > Now Peter has pointed out I can't read ;-) > > Reviewed-by: Alex Bennée Thanks for all the clarifications, I'll add your RB to my series. Best regards, Edgar > > > --- > > target-arm/cpu.h | 1 + > > target-arm/helper.c | 12 ++++++++++++ > > 2 files changed, 13 insertions(+) > > > > diff --git a/target-arm/cpu.h b/target-arm/cpu.h > > index cc1578c..895f2c2 100644 > > --- a/target-arm/cpu.h > > +++ b/target-arm/cpu.h > > @@ -278,6 +278,7 @@ typedef struct CPUARMState { > > }; > > uint64_t far_el[4]; > > }; > > + uint64_t hpfar_el2; > > union { /* Translation result. */ > > struct { > > uint64_t _unused_par_0; > > diff --git a/target-arm/helper.c b/target-arm/helper.c > > index 8367997..5a5e5f0 100644 > > --- a/target-arm/helper.c > > +++ b/target-arm/helper.c > > @@ -3223,6 +3223,10 @@ static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = { > > { .name = "CNTHP_CTL_EL2", .state = ARM_CP_STATE_BOTH, > > .opc0 = 3, .opc1 = 4, .crn = 14, .crm = 2, .opc2 = 1, > > .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, > > + { .name = "HPFAR_EL2", .state = ARM_CP_STATE_BOTH, > > + .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, > > + .access = PL2_RW, .accessfn = access_el3_aa32ns_aa64any, > > + .type = ARM_CP_CONST, .resetvalue = 0 }, > > REGINFO_SENTINEL > > }; > > > > @@ -3444,6 +3448,14 @@ static const ARMCPRegInfo el2_cp_reginfo[] = { > > .resetvalue = 0, > > .writefn = gt_hyp_ctl_write, .raw_writefn = raw_write }, > > #endif > > + { .name = "HPFAR", .state = ARM_CP_STATE_AA32, > > + .cp = 15, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, > > + .access = PL2_RW, .accessfn = access_el3_aa32ns, > > + .fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) }, > > + { .name = "HPFAR_EL2", .state = ARM_CP_STATE_AA64, > > + .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 4, > > + .access = PL2_RW, > > + .fieldoffset = offsetof(CPUARMState, cp15.hpfar_el2) }, > > REGINFO_SENTINEL > > }; > > -- > Alex Bennée