All of lore.kernel.org
 help / color / mirror / Atom feed
From: Brian Norris <computersforpeace@gmail.com>
To: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Archit Taneja <architt@codeaurora.org>,
	dehrenberg@google.com, linux-arm-msm@vger.kernel.org,
	cernekee@gmail.com, sboyd@codeaurora.org,
	linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
	agross@codeaurora.org, Andrea Scian <andrea.scian@dave.eu>
Subject: Re: [PATCH v4 1/5] mtd: nand: Create a BBT flag to access bad block markers in raw mode
Date: Sun, 11 Oct 2015 13:03:21 -0700	[thread overview]
Message-ID: <20151011200321.GC3696@localhost> (raw)
In-Reply-To: <20151002082738.1b325860@bbrezillon>

Hi Boris,

On Fri, Oct 02, 2015 at 08:27:38AM +0200, Boris Brezillon wrote:
> Brian, Archit,
> 
> On Thu, 1 Oct 2015 19:44:34 -0700
> Brian Norris <computersforpeace@gmail.com> wrote:
> 
> > On Wed, Aug 19, 2015 at 10:19:02AM +0530, Archit Taneja wrote:
> > > Some controllers can access the factory bad block marker from OOB only
> > > when they read it in raw mode. When ECC is enabled, these controllers
> > > discard reading/writing bad block markers, preventing access to them
> > > altogether.
> > > 
> > > The bbt driver assumes MTD_OPS_PLACE_OOB when scanning for bad blocks.
> > > This results in the nand driver's ecc->read_oob() op to be called, which
> > > works with ECC enabled.
> > > 
> > > Create a new BBT option flag that tells nand_bbt to force the mode to
> > > MTD_OPS_RAW. This would result in the correct op being called for the
> > > underlying nand controller driver.
> 
> Actually I have the same kind of patch in my local tree (for a
> different reason though: the HW randomizer can mess up with the BBM
> byte if it's not disabled, and the only way to disable it in my current
> implementation is to switch to raw mode).
> 
> > 
> > MTD_OPS_RAW is probably the best way to do this, and we should switch
> > back to it for all users (rather than a new flag).
> 
> I'm fine with this solution, but will that be acceptable for everybody?
> I mean, some NAND controllers are able to protect some OOB bytes, and
> the BBM might fall in those OOB bytes. In this case, shouldn't we rely
> on the ECC protection instead of reading the OOB in raw mode?

I think ECC is kind of misused a bit here. It's not really meant for
protecting BBMs, and it's also really not sufficient, esp. given
bitflips in erased areas.

> > But to do this, we
> > need to fix up some things. Particularly, we need to extend
> > 'badblockbits' support so that it is applied consistently in all places
> > (I recall there is one code path in which bad block scanning does take
> > this into account, and one that doesn't.)
> 
> Yes, IIRC Andrea has posted a patch addressing that problem [1].
> Another problem I see is that badblockbits is currently assigned a
> fixed value by the NAND controller driver (or a default value of 8).
> There's no specific logic to correlate it to the required ECC strength.
> IMO, we should not let each NAND controller driver decide what is the
> appropriate value for each chip but rather implement the logic in
> nand_base.c based on ecc->strength and ecc->size, and IIRC this was
> the question Andrea asked when he posted his proposal. 
> 
> > 
> > About badblockbits: it allows us to do a relaxed heuristic on matching
> > bad block markers, where we say the BBM is "bad" if more than fewer than
> > N bits are '1'. Right now, we just say that if there are any 0 bits in
> > the Bad Block Marker (BBM) region, then the block is bad. But this is
> > problematic for pages that have been worn down and might have bitflips.
> > So right now, part of a (bad) solution is to read with ECC, so worn
> > blocks that have data won't be later interpreted as bad blocks if we
> > rescan the BBMs (ECC will correct the bitflips, if the OOB is
> > protected).
> > 
> > But that solution is not really good, since ECC is not really a panacea
> > for misinterpreted BBMs. And HW like yours apparently won't work like
> > this.
> 
> Okay, I see you gave pretty much the same explanation, which makes mine
> useless :-).
> 
> > 
> > So in summary: if we can consistently make BBM checks look for 6 or 7
> > "one" bits (rather than a full 8 bits, i.e. BBM == 0xff), then we can
> > just unconditionally switch to RAW rather than PLACE_OOB. And we don't
> > need a flag like this pach introduces.
> 
> I guess it all depends whether we want to let NAND controllers that can
> protect their BBM keep doing it (which IMO is not such a bad idea).

I think I was the only one consciously trying to do this. (Though I
guess it's possible some people discreetly hacked it in by not
supporting raw mode properly.) And for my cases, I'm pretty sure a
properly-improved raw mode BBM scan would be just as good, or actually
better. So I'm not sure anyone would really notice if we switched back
and properly accounted for flips.

Brian

  reply	other threads:[~2015-10-11 20:03 UTC|newest]

Thread overview: 145+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-16 14:48 [PATCH 0/5] mtd: Qualcomm NAND controller driver Archit Taneja
2015-01-16 14:48 ` Archit Taneja
2015-01-16 14:48 ` [PATCH 1/5] clk: qcom: Add EBI2 clocks for IPQ806x Archit Taneja
2015-01-16 14:48   ` Archit Taneja
2015-01-16 21:56   ` Stephen Boyd
2015-01-16 21:56     ` Stephen Boyd
2015-01-19 10:32     ` Archit Taneja
2015-01-19 10:32       ` Archit Taneja
2015-01-29 22:21   ` Stephen Boyd
2015-01-29 22:21     ` Stephen Boyd
2015-01-16 14:48 ` [PATCH 2/5] mtd: nand: Add qcom nand controller driver Archit Taneja
2015-01-16 14:48   ` Archit Taneja
2015-01-21  0:54   ` Daniel Ehrenberg
2015-01-21  0:54     ` Daniel Ehrenberg
2015-01-22  6:36     ` Archit Taneja
2015-01-22  6:36       ` Archit Taneja
2015-01-26 21:05       ` Kevin Cernekee
2015-01-26 21:05         ` Kevin Cernekee
2015-01-27  3:56         ` Archit Taneja
     [not found] ` <1421419702-17812-1-git-send-email-architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2015-01-16 14:48   ` [PATCH 3/5] Documentaion: dt: add DT bindings for Qualcomm NAND controller Archit Taneja
2015-01-16 14:48     ` Archit Taneja
2015-01-16 14:48     ` Archit Taneja
2015-01-16 14:48 ` [PATCH 4/5] arm: qcom: dts: Add NAND controller node for ipq806x Archit Taneja
2015-01-16 14:48   ` Archit Taneja
2015-01-16 14:48 ` [PATCH 5/5] arm: qcom: dts: Enale NAND node on IPQ8064 AP148 pplatform Archit Taneja
2015-01-16 14:48   ` Archit Taneja
2015-02-18  6:03 ` [PATCH 0/5] mtd: Qualcomm NAND controller driver Archit Taneja
2015-02-18  6:03   ` Archit Taneja
2015-07-21 10:34 ` [PATCH v2 " Archit Taneja
2015-07-21 10:34   ` [PATCH v2 1/5] mtd: nand: Create a BBT flag to access bad block markers in raw mode Archit Taneja
2015-07-21 10:34     ` Archit Taneja
2015-07-24 19:01     ` Andy Gross
2015-07-21 10:34   ` [PATCH v2 2/5] mtd: nand: Qualcomm NAND controller driver Archit Taneja
2015-07-24 19:39     ` Andy Gross
2015-07-25  0:51     ` Stephen Boyd
2015-07-28  4:34       ` Archit Taneja
2015-07-29  1:48         ` Stephen Boyd
2015-07-29  5:14           ` Archit Taneja
2015-07-29 18:33             ` Stephen Boyd
2015-07-30  6:53               ` Archit Taneja
2015-07-21 10:34   ` [PATCH v2 3/5] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja
2015-07-24 18:57     ` Andy Gross
2015-07-24 19:37     ` Stephen Boyd
2015-07-21 10:34   ` [PATCH v2 4/5] arm: qcom: dts: Add NAND controller node for ipq806x Archit Taneja
2015-07-24 19:01     ` Andy Gross
2015-07-21 10:34   ` [PATCH v2 5/5] arm: qcom: dts: Enale NAND node on IPQ8064 AP148 platform Archit Taneja
2015-07-24 18:58     ` Andy Gross
2015-07-24 18:59     ` Andy Gross
2015-08-03  5:08 ` [PATCH v3 0/5] mtd: Qualcomm NAND controller driver Archit Taneja
2015-08-03  5:08   ` [PATCH v3 1/5] mtd: nand: Create a BBT flag to access bad block markers in raw mode Archit Taneja
2015-08-03  5:08   ` [PATCH v3 2/5] mtd: nand: Qualcomm NAND controller driver Archit Taneja
2015-08-03 23:38     ` Stephen Boyd
2015-08-04 15:04       ` Archit Taneja
2015-08-04 17:53         ` Stephen Boyd
2015-08-03  5:08   ` [PATCH v3 3/5] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja
2015-08-03  5:08   ` [PATCH v3 4/5] arm: qcom: dts: Add NAND controller node for ipq806x Archit Taneja
     [not found]   ` <1438578498-32254-1-git-send-email-architt-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2015-08-03  5:08     ` [PATCH v3 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148 platform Archit Taneja
2015-08-03  5:08       ` Archit Taneja
2015-08-03 19:35       ` Andy Gross
2015-08-04 15:05         ` Archit Taneja
2015-08-03 20:58       ` Stephen Boyd
2015-08-04 15:06         ` Archit Taneja
2015-08-19  4:49   ` [PATCH v4 0/5] mtd: Qualcomm NAND controller driver Archit Taneja
2015-08-19  4:49     ` [PATCH v4 1/5] mtd: nand: Create a BBT flag to access bad block markers in raw mode Archit Taneja
2015-10-02  2:44       ` Brian Norris
2015-10-02  6:27         ` Boris Brezillon
2015-10-02  6:27           ` Boris Brezillon
2015-10-11 20:03           ` Brian Norris [this message]
2015-11-10  5:13             ` Archit Taneja
2015-08-19  4:49     ` [PATCH v4 2/5] mtd: nand: Qualcomm NAND controller driver Archit Taneja
2015-08-26 23:37       ` Stephen Boyd
2015-09-13 13:42         ` Archit Taneja
2015-10-02  3:05       ` Brian Norris
2015-10-05  6:51         ` Archit Taneja
2015-10-06  9:17           ` Brian Norris
2015-10-07  4:11             ` Archit Taneja
2015-10-02 17:31       ` Brian Norris
2015-12-16  9:15       ` Boris Brezillon
2015-12-16 11:57         ` Archit Taneja
2015-12-16 14:18           ` Boris Brezillon
2015-12-16 14:18             ` Boris Brezillon
2015-12-17  9:48             ` Archit Taneja
2015-12-18 18:48               ` Boris Brezillon
2015-12-16 19:16           ` Brian Norris
2015-08-19  4:49     ` [PATCH v4 3/5] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja
2015-12-16  6:33       ` Boris Brezillon
2015-12-16  8:11         ` Archit Taneja
2015-08-19  4:49     ` [PATCH v4 4/5] arm: qcom: dts: Add NAND controller node for ipq806x Archit Taneja
2015-08-19  4:49     ` [PATCH v4 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148 platform Archit Taneja
2016-01-05  5:24     ` [PATCH v5 0/3] mtd: Qualcomm NAND controller driver Archit Taneja
2016-01-05  5:24       ` [PATCH v5 1/3] mtd: nand: don't select chip in nand_chip's block_bad op Archit Taneja
2016-01-06 16:05         ` Boris Brezillon
2016-01-07  4:27           ` Archit Taneja
2016-01-05  5:25       ` [PATCH v5 2/3] mtd: nand: Qualcomm NAND controller driver Archit Taneja
2016-01-06 17:05         ` Boris Brezillon
2016-01-08  6:33           ` Archit Taneja
2016-01-08  8:01             ` Boris Brezillon
2016-01-08 10:23               ` Archit Taneja
2016-01-08 10:31                 ` Boris Brezillon
2016-01-08 10:42                   ` Archit Taneja
2016-01-05  5:25       ` [PATCH v5 3/3] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja
2016-01-06 15:05         ` Boris Brezillon
2016-01-06 15:14         ` Rob Herring
2016-01-06 15:37           ` Boris Brezillon
2016-01-06 16:13             ` Rob Herring
2016-01-06 16:36               ` Boris Brezillon
2016-01-18  9:50       ` [PATCH v6 0/3] mtd: Qualcomm NAND controller driver Archit Taneja
2016-01-18  9:50         ` [PATCH v6 1/3] mtd: nand: don't select chip in nand_chip's block_bad op Archit Taneja
2016-01-18 10:29           ` Boris Brezillon
2016-01-18 10:47             ` Archit Taneja
2016-01-18  9:50         ` [PATCH v6 2/3] mtd: nand: Qualcomm NAND controller driver Archit Taneja
2016-01-18 11:01           ` Boris Brezillon
2016-01-18 11:14             ` Archit Taneja
2016-01-18  9:50         ` [PATCH v6 3/3] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja
2016-01-20 14:46           ` Rob Herring
2016-01-21  7:13         ` [PATCH v7 0/3] mtd: Qualcomm NAND controller driver Archit Taneja
2016-01-21  7:13           ` [PATCH v7 1/3] mtd: nand: don't select chip in nand_chip's block_bad op Archit Taneja
2016-01-21  8:33             ` Boris Brezillon
2016-01-21  7:13           ` [PATCH v7 2/3] mtd: nand: Qualcomm NAND controller driver Archit Taneja
2016-01-21  8:51             ` Boris Brezillon
2016-01-21  9:52               ` Archit Taneja
2016-01-21 10:13                 ` Boris Brezillon
2016-01-21 11:00                   ` Archit Taneja
2016-01-21 12:36                     ` Boris Brezillon
2016-01-21 13:08                       ` Archit Taneja
2016-01-21 13:25                         ` Boris Brezillon
2016-01-25  7:43                           ` Archit Taneja
2016-01-21  7:13           ` [PATCH v7 3/3] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja
2016-01-21  7:23             ` Archit Taneja
2016-02-03  8:59           ` [PATCH v8 0/3] mtd: Qualcomm NAND controller driver Archit Taneja
2016-02-03  8:59             ` [PATCH v8 1/3] mtd: nand: don't select chip in nand_chip's block_bad op Archit Taneja
2016-02-03  8:59             ` [PATCH v8 2/3] mtd: nand: Qualcomm NAND controller driver Archit Taneja
2016-02-04 10:39               ` Boris Brezillon
2016-02-04 16:13                 ` Archit Taneja
2016-02-16  6:50                 ` Archit Taneja
2016-03-08 10:13                   ` Archit Taneja
2016-03-18 15:49               ` Boris Brezillon
2016-03-18 16:48                 ` Boris Brezillon
2016-03-19 10:14                   ` Archit Taneja
2016-03-19 10:34                     ` Boris Brezillon
2016-03-22 13:10                       ` Archit Taneja
2016-03-22 14:05                         ` Boris Brezillon
2016-02-03  8:59             ` [PATCH v8 3/3] dt/bindings: qcom_nandc: Add DT bindings Archit Taneja
2016-03-10 19:47             ` [PATCH v8 0/3] mtd: Qualcomm NAND controller driver Brian Norris
2016-03-16  5:43               ` Archit Taneja

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20151011200321.GC3696@localhost \
    --to=computersforpeace@gmail.com \
    --cc=agross@codeaurora.org \
    --cc=andrea.scian@dave.eu \
    --cc=architt@codeaurora.org \
    --cc=boris.brezillon@free-electrons.com \
    --cc=cernekee@gmail.com \
    --cc=dehrenberg@google.com \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mtd@lists.infradead.org \
    --cc=sboyd@codeaurora.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.