From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754849AbbJ1AT1 (ORCPT ); Tue, 27 Oct 2015 20:19:27 -0400 Received: from mail-pa0-f53.google.com ([209.85.220.53]:32982 "EHLO mail-pa0-f53.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754211AbbJ1ATX (ORCPT ); Tue, 27 Oct 2015 20:19:23 -0400 Date: Tue, 27 Oct 2015 17:19:20 -0700 From: Brian Norris To: Anup Patel Cc: David Woodhouse , Linux MTD , Rob Herring , Pawel Moll , Mark Rutland , Catalin Marinas , Will Deacon , Sudeep Holla , Ian Campbell , Kumar Gala , Ray Jui , Scott Branden , Florian Fainelli , Pramod KUMAR , Vikram Prakash , Sandeep Tripathy , Linux ARM Kernel , Device Tree , Linux Kernel , BCM Kernel Feedback Subject: Re: [PATCH v3 2/2] arm64: dts: Add BRCM IPROC NAND DT node for NS2 Message-ID: <20151028001920.GY13239@google.com> References: <1445577373-21252-1-git-send-email-anup.patel@broadcom.com> <1445577373-21252-3-git-send-email-anup.patel@broadcom.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1445577373-21252-3-git-send-email-anup.patel@broadcom.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Oct 23, 2015 at 10:46:13AM +0530, Anup Patel wrote: > The NAND controller on NS2 SoC is compatible with existing > BRCM IPROC NAND driver so let's enable it in NS2 DT and > NS2 SVK DT. > > This patch also fixes use of node labels in ns2-svk.dts. > > Signed-off-by: Anup Patel > Reviewed-by: Ray Jui > Reviewed-by: Scott Branden > --- > arch/arm64/boot/dts/broadcom/ns2-svk.dts | 30 ++++++++++++++++++++---------- > arch/arm64/boot/dts/broadcom/ns2.dtsi | 14 ++++++++++++++ > 2 files changed, 34 insertions(+), 10 deletions(-) > > diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts > index e5950d5..6bb3d4d 100644 > --- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts > +++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts > @@ -50,18 +50,28 @@ > device_type = "memory"; > reg = <0x000000000 0x80000000 0x00000000 0x40000000>; > }; > +}; > > - soc: soc { > - i2c0: i2c@66080000 { > - status = "ok"; > - }; > +&i2c0 { > + status = "ok"; > +}; > > - i2c1: i2c@660b0000 { > - status = "ok"; > - }; > +&i2c1 { > + status = "ok"; > +}; > + > +&uart3 { > + status = "ok"; > +}; > > - uart3: serial@66130000 { > - status = "ok"; > - }; > +&nand { > + nandcs@0 { > + compatible = "brcm,nandcs"; > + reg = <0>; > + nand-ecc-mode = "hw"; > + nand-ecc-strength = <8>; > + nand-ecc-step-size = <512>; > + #address-cells = <1>; > + #size-cells = <1>; > }; > }; > diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi > index f603277..9610822 100644 > --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi > +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi > @@ -212,5 +212,19 @@ > compatible = "brcm,iproc-rng200"; > reg = <0x66220000 0x28>; > }; > + > + nand: nand@66460000 { > + compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; Technically, the binding says you should also have "brcm,brcmnand" as a last resort. Otherwise (for the NAND parts): Reviewed-by: Brian Norris > + reg = <0x66460000 0x600>, > + <0x67015408 0x600>, > + <0x66460f00 0x20>; > + reg-names = "nand", "iproc-idm", "iproc-ext"; > + interrupts = ; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + brcm,nand-has-wp; > + }; > }; > }; > -- > 1.9.1 > From mboxrd@z Thu Jan 1 00:00:00 1970 From: Brian Norris Subject: Re: [PATCH v3 2/2] arm64: dts: Add BRCM IPROC NAND DT node for NS2 Date: Tue, 27 Oct 2015 17:19:20 -0700 Message-ID: <20151028001920.GY13239@google.com> References: <1445577373-21252-1-git-send-email-anup.patel@broadcom.com> <1445577373-21252-3-git-send-email-anup.patel@broadcom.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1445577373-21252-3-git-send-email-anup.patel-dY08KVG/lbpWk0Htik3J/w@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Anup Patel Cc: David Woodhouse , Linux MTD , Rob Herring , Pawel Moll , Mark Rutland , Catalin Marinas , Will Deacon , Sudeep Holla , Ian Campbell , Kumar Gala , Ray Jui , Scott Branden , Florian Fainelli , Pramod KUMAR , Vikram Prakash , Sandeep Tripathy , Linux ARM Kernel , Device Tree , Linux Kernel , BCM Kernel Feedback List-Id: devicetree@vger.kernel.org On Fri, Oct 23, 2015 at 10:46:13AM +0530, Anup Patel wrote: > The NAND controller on NS2 SoC is compatible with existing > BRCM IPROC NAND driver so let's enable it in NS2 DT and > NS2 SVK DT. > > This patch also fixes use of node labels in ns2-svk.dts. > > Signed-off-by: Anup Patel > Reviewed-by: Ray Jui > Reviewed-by: Scott Branden > --- > arch/arm64/boot/dts/broadcom/ns2-svk.dts | 30 ++++++++++++++++++++---------- > arch/arm64/boot/dts/broadcom/ns2.dtsi | 14 ++++++++++++++ > 2 files changed, 34 insertions(+), 10 deletions(-) > > diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts > index e5950d5..6bb3d4d 100644 > --- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts > +++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts > @@ -50,18 +50,28 @@ > device_type = "memory"; > reg = <0x000000000 0x80000000 0x00000000 0x40000000>; > }; > +}; > > - soc: soc { > - i2c0: i2c@66080000 { > - status = "ok"; > - }; > +&i2c0 { > + status = "ok"; > +}; > > - i2c1: i2c@660b0000 { > - status = "ok"; > - }; > +&i2c1 { > + status = "ok"; > +}; > + > +&uart3 { > + status = "ok"; > +}; > > - uart3: serial@66130000 { > - status = "ok"; > - }; > +&nand { > + nandcs@0 { > + compatible = "brcm,nandcs"; > + reg = <0>; > + nand-ecc-mode = "hw"; > + nand-ecc-strength = <8>; > + nand-ecc-step-size = <512>; > + #address-cells = <1>; > + #size-cells = <1>; > }; > }; > diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi > index f603277..9610822 100644 > --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi > +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi > @@ -212,5 +212,19 @@ > compatible = "brcm,iproc-rng200"; > reg = <0x66220000 0x28>; > }; > + > + nand: nand@66460000 { > + compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; Technically, the binding says you should also have "brcm,brcmnand" as a last resort. Otherwise (for the NAND parts): Reviewed-by: Brian Norris > + reg = <0x66460000 0x600>, > + <0x67015408 0x600>, > + <0x66460f00 0x20>; > + reg-names = "nand", "iproc-idm", "iproc-ext"; > + interrupts = ; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + brcm,nand-has-wp; > + }; > }; > }; > -- > 1.9.1 > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: computersforpeace@gmail.com (Brian Norris) Date: Tue, 27 Oct 2015 17:19:20 -0700 Subject: [PATCH v3 2/2] arm64: dts: Add BRCM IPROC NAND DT node for NS2 In-Reply-To: <1445577373-21252-3-git-send-email-anup.patel@broadcom.com> References: <1445577373-21252-1-git-send-email-anup.patel@broadcom.com> <1445577373-21252-3-git-send-email-anup.patel@broadcom.com> Message-ID: <20151028001920.GY13239@google.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, Oct 23, 2015 at 10:46:13AM +0530, Anup Patel wrote: > The NAND controller on NS2 SoC is compatible with existing > BRCM IPROC NAND driver so let's enable it in NS2 DT and > NS2 SVK DT. > > This patch also fixes use of node labels in ns2-svk.dts. > > Signed-off-by: Anup Patel > Reviewed-by: Ray Jui > Reviewed-by: Scott Branden > --- > arch/arm64/boot/dts/broadcom/ns2-svk.dts | 30 ++++++++++++++++++++---------- > arch/arm64/boot/dts/broadcom/ns2.dtsi | 14 ++++++++++++++ > 2 files changed, 34 insertions(+), 10 deletions(-) > > diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts > index e5950d5..6bb3d4d 100644 > --- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts > +++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts > @@ -50,18 +50,28 @@ > device_type = "memory"; > reg = <0x000000000 0x80000000 0x00000000 0x40000000>; > }; > +}; > > - soc: soc { > - i2c0: i2c at 66080000 { > - status = "ok"; > - }; > +&i2c0 { > + status = "ok"; > +}; > > - i2c1: i2c at 660b0000 { > - status = "ok"; > - }; > +&i2c1 { > + status = "ok"; > +}; > + > +&uart3 { > + status = "ok"; > +}; > > - uart3: serial at 66130000 { > - status = "ok"; > - }; > +&nand { > + nandcs at 0 { > + compatible = "brcm,nandcs"; > + reg = <0>; > + nand-ecc-mode = "hw"; > + nand-ecc-strength = <8>; > + nand-ecc-step-size = <512>; > + #address-cells = <1>; > + #size-cells = <1>; > }; > }; > diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi > index f603277..9610822 100644 > --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi > +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi > @@ -212,5 +212,19 @@ > compatible = "brcm,iproc-rng200"; > reg = <0x66220000 0x28>; > }; > + > + nand: nand at 66460000 { > + compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; Technically, the binding says you should also have "brcm,brcmnand" as a last resort. Otherwise (for the NAND parts): Reviewed-by: Brian Norris > + reg = <0x66460000 0x600>, > + <0x67015408 0x600>, > + <0x66460f00 0x20>; > + reg-names = "nand", "iproc-idm", "iproc-ext"; > + interrupts = ; > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + brcm,nand-has-wp; > + }; > }; > }; > -- > 1.9.1 >