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From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Tomasz Nowicki <tn@semihalf.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Hanjun Guo <hanjun.guo@linaro.org>,
	Liviu Dudau <Liviu.Dudau@arm.com>,
	linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, x86@kernel.org
Subject: Re: [Patch v7 4/7] PCI/ACPI: Add interface acpi_pci_root_create()
Date: Fri, 6 Nov 2015 12:51:07 +0000	[thread overview]
Message-ID: <20151106125107.GB5146@red-moon> (raw)
In-Reply-To: <563C6A5F.5030500@linux.intel.com>

On Fri, Nov 06, 2015 at 04:52:47PM +0800, Jiang Liu wrote:

[...]

> >>> +int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
> >>> +{
> >>> +	int ret;
> >>> +	struct list_head *list = &info->resources;
> >>> +	struct acpi_device *device = info->bridge;
> >>> +	struct resource_entry *entry, *tmp;
> >>> +	unsigned long flags;
> >>> +
> >>> +	flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT;
> >>> +	ret = acpi_dev_get_resources(device, list,
> >>> +				     acpi_dev_filter_resource_type_cb,
> >>> +				     (void *)flags);
> >>> +	if (ret < 0)
> >>> +		dev_warn(&device->dev,
> >>> +			 "failed to parse _CRS method, error code %d\n", ret);
> >>> +	else if (ret == 0)
> >>> +		dev_dbg(&device->dev,
> >>> +			"no IO and memory resources present in _CRS\n");
> >>> +	else {
> >>> +		resource_list_for_each_entry_safe(entry, tmp, list) {
> >>> +			if (entry->res->flags & IORESOURCE_DISABLED)
> >>> +				resource_list_destroy_entry(entry);
> >>> +			else
> >>> +				entry->res->name = info->name;
> >>> +		}
> >>> +		acpi_pci_root_validate_resources(&device->dev, list,
> >>> +						 IORESOURCE_MEM);
> >>> +		acpi_pci_root_validate_resources(&device->dev, list,
> >>> +						 IORESOURCE_IO);
> >>
> >> It is not clear to me why we need these two calls above ^^^. We are
> >> using pci_acpi_root_add_resources(info) later. Is it not enough?
> >>
> >> Also, I cannot use acpi_pci_probe_root_resources() in my ARM64 PCI
> >> driver. It is because acpi_dev_get_resources is adding
> >> translation_offset to IO ranges start address and then:
> >> acpi_pci_root_validate_resources(&device->dev, list,
> >> 				 IORESOURCE_IO);
> >> rejects that IO regions as it is out of my 0x0-SZ_16M window.
> >>
> >> Does acpi_pci_probe_root_resources meant to be x86 specific and I
> >> should avoid using it?
> > 
> > IIUC, you _have_ to have the proper translation_offset to map the bridge
> > window into the IO address space:
> > 
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/348708.html
> > 
> > Then, using the offset, you should do something ia64 does, namely,
> > retrieve the CPU address corresponding to IO space (see arch/ia64/pci/pci.c
> > - add_io_space()) and map it in the physical address space by using
> > pci_remap_iospace(), it is similar to what we have to do with DT.
> > 
> > It is extremely confusing and I am not sure I got it right myself,
> > I am still grokking ia64 code to understand what it really does.
> > 
> > So basically, the IO bridge window coming from acpi_dev_get_resource()
> > should represent the IO space in 0 - 16M, IIUC.
> > 
> > By using the offset (that was initialized using translation_offset) and
> > the resource->start, you can retrieve the cpu address that you need to
> > actually map the IO space, since that's what we do on ARM (ie the
> > IO resource is an offset into the virtual address space set aside
> > for IO).
> > 
> > Confusing, to say the least. Jiang, did I get it right ?
> Hi Lorenzo and Tomasz,
> 	With a cup of coffee, I got myself awake eventually:)
> Now we are going to talk about IO port on IA64, really a little
> complex:( Actually there are two types of translation.
> 1) A PCI domain has a 24-bit IO port address space, there may
> be multiple IO port address spaces in systems with multiple PCI
> domains. So the first type of translation is to translate domain
> specific IO port address into system global IO port address
> (iomem_resource) by
>   res->start = acpi_des->start + acpi_des->translation_offset

And that's what I do not understand, or better I do not understand
why the acpi_pci_root_validate_resources (for IO) does not fail on ia64,
since that should work as arm64, namely IO ports are mapped through
MMIO.

I think the check in acpi_pci_root_validate_resources() (for
IORESOURCE_IO) fails at present on ia64 too, correct ?

If not, how can it work ? res->start definitely contains the
CPU physical address mapping IO space after adding the
translation_offset, so the check in acpi_pci_root_validate_resources()
for IO can't succeed.

In add_io_space() ia64 does the same thing as Tomasz has to do,
namely overwriting the res->start and end with the offset into
the virtual address space allocated for IO, which is different from
the CPU physical address allocated to IO space.

Please correct me if I am wrong.

> 2) IA64 needs to map IO port address spaces into MMIO address
> space because it has no instructions to access IO ports directly.
> So IA64 has reserved a MMIO range to map IO port address spaces.
> This type of translation relies on architecture specific information
> instead of ACPI descriptors.

That's how ARM64 works too, the IO space resources are an offset into
a chunk of virtual address space allocated to PCI IO memory, so it
seems to me that arm64 and ia64 should work the same way, and that
at present acpi_pci_root_validate_resources() should fail on ia64 too.

Thanks,
Lorenzo

> 
> On the other hand, ACPI specification has defined  "I/O to Memory
> Translation" flag and "Memory to I/O Translation" flag in
> ACPI Extended Address Space Descriptor, but current implementation
> doesn't really support such a use case. So we need to find a way
> out here. Could you please help to provide more information about
> PCI host bridge resource descriptor implementation details on
> ARM64?
> 
> > 
> > Lorenzo
> > 
> 

  parent reply	other threads:[~2015-11-06 12:51 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-14  6:29 [Patch v7 0/7] Consolidate ACPI PCI root common code into ACPI core Jiang Liu
2015-10-14  6:29 ` [Patch v7 1/7] ACPI/PCI: Enhance ACPI core to support sparse IO space Jiang Liu
2015-10-14  6:29 ` [Patch v7 2/7] ia64/PCI/ACPI: Use common ACPI resource parsing interface for host bridge Jiang Liu
2015-10-14  6:29 ` [Patch v7 3/7] ia64/PCI: Use common struct resource_entry to replace struct iospace_resource Jiang Liu
2015-10-14  6:29 ` [Patch v7 4/7] PCI/ACPI: Add interface acpi_pci_root_create() Jiang Liu
2015-10-15 20:47   ` Bjorn Helgaas
2015-10-21  9:57   ` Tomasz Nowicki
2015-10-21 11:02     ` Liviu Dudau
2015-10-21 11:27       ` Tomasz Nowicki
2015-10-21 11:42         ` Lorenzo Pieralisi
2015-10-21 12:16           ` Tomasz Nowicki
2015-10-21 11:48         ` Liviu Dudau
2015-10-21 11:49         ` Jiang Liu
2015-10-21 11:52           ` Liviu Dudau
2015-10-21 11:52             ` Liviu Dudau
2015-11-05 14:21   ` Tomasz Nowicki
2015-11-05 18:19     ` Lorenzo Pieralisi
2015-11-06  7:55       ` Jiang Liu
2015-11-06  8:52       ` Jiang Liu
2015-11-06 10:37         ` Tomasz Nowicki
2015-11-06 11:46           ` Jiang Liu
2015-11-06 12:40             ` Tomasz Nowicki
2015-11-06 13:22               ` Jiang Liu
2015-11-06 14:45                 ` Lorenzo Pieralisi
2015-11-06 15:32                   ` Jiang Liu
2015-11-06 15:44                     ` Jiang Liu
2015-11-23 15:23                       ` Sinan Kaya
2015-11-09 14:07                 ` Tomasz Nowicki
2015-11-09 17:10                   ` Lorenzo Pieralisi
2015-11-09 20:09                     ` Arnd Bergmann
2015-11-10  5:50                       ` Jiang Liu
2015-11-11 17:46                         ` Lorenzo Pieralisi
2015-11-11 18:12                           ` Liviu Dudau
2015-11-11 18:12                             ` Liviu Dudau
2015-11-11 20:55                           ` Arnd Bergmann
2015-11-12 12:08                             ` Lorenzo Pieralisi
2015-11-12  8:43                           ` Jiang Liu
2015-11-12 13:21                             ` Tomasz Nowicki
2015-11-12 14:04                               ` Jiang Liu
2015-11-12 14:45                                 ` Tomasz Nowicki
2015-11-12 15:05                                   ` Jiang Liu
2015-11-13 12:57                                     ` Tomasz Nowicki
2015-11-13 17:03                                       ` Lorenzo Pieralisi
2015-11-13 17:49                                         ` Jiang Liu
2015-11-20 10:18                                           ` Lorenzo Pieralisi
2015-11-27  6:59                                             ` Tomasz Nowicki
2015-11-06 12:51         ` Lorenzo Pieralisi [this message]
2015-11-06 10:18       ` Tomasz Nowicki
2015-11-06  7:51     ` Jiang Liu
2015-10-14  6:29 ` [Patch v7 5/7] ACPI, PCI: Reset acpi_root_dev->domain to 0 when pci_ignore_seg is set Jiang Liu
2015-10-14  6:29 ` [Patch v7 6/7] x86/PCI/ACPI: Use common interface to support PCI host bridge Jiang Liu
2015-10-15 20:46   ` Bjorn Helgaas
2015-10-14  6:29 ` [Patch v7 7/7] ia64/PCI/ACPI: " Jiang Liu
2015-10-15 20:48 ` [Patch v7 0/7] Consolidate ACPI PCI root common code into ACPI core Bjorn Helgaas
2015-10-15 21:49   ` Rafael J. Wysocki
2015-10-16  1:56     ` Jiang Liu

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