i2c slave support für i.mx6

i2c slave support für i.mx6

[Michael Bachmeier]

I am currently working with a I.mx6 quad-core-processor on Linux 3.19.
I would like to implement the "I2C slave support", by Wolfram Sang, In
this processor.

For this purpose, I would have some comprehension questions.

Do I understand it right, I can set the Master in slave mode and the
new slave get his own i2c-adresse?
Say that, I can connect a Master from the outside, without this
leading to problems?
If the master switch to slave, then stops SCL? Or how does it work?

Is the EEPROM simulator only available if I rewrote "i2c-IMX" drivers
to the slave support?

Does anyone know if anyone is working on this driver?

In the "i.MX 6Dual/6Quad Applications Processor Reference Manual",
from freescale, on the page 1895 the "Hardware"-Slave Mode will be
described.

Would it theoretically be enough to write 0x80 in the "I2Cx_I2CR"
register to set MSTA Bit to
slave mode. "Changing MSTA from 1 to 0 generates a Stop and selects Slave mode."
Or then disturbs the old driver?

best regards

Re: i2c slave support für i.mx6

[Wolfram Sang]

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Hi Michael,

> Do I understand it right, I can set the Master in slave mode and the
> new slave get his own i2c-adresse?

Yes, you can have your own address then. Note that I recently gave a
talk about the slave framework. You can find the slides here:

http://elinux.org/ELCE_2015_Presentations

Search for my name there. And if you wait some more, the video will be
there, too, which will be much more helpful than the slides only. And
there is the regular documentation:

Documentation/i2c/slave-interface

> Say that, I can connect a Master from the outside, without this
> leading to problems?
> If the master switch to slave, then stops SCL? Or how does it work?

I suggest getting the I2C specifications from the web and read about
"multi master" and "bus arbitration" to understand how it works. Please
note that true multi-master busses can in practice be tricky. Shall your
mx6 also be master, or slave only?

> Is the EEPROM simulator only available if I rewrote "i2c-IMX" drivers
> to the slave support?

Yes.

> Does anyone know if anyone is working on this driver?

I don't know of; but I put some more people on CC who regularly work on
Freescale SoCs.

> Would it theoretically be enough to write 0x80 in the "I2Cx_I2CR"
> register to set MSTA Bit to
> slave mode. "Changing MSTA from 1 to 0 generates a Stop and selects Slave mode."
> Or then disturbs the old driver?

You need more to do this. You need to handle slave interrupts. See the
documentation.

Good luck,

   Wolfram


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Re: i2c slave support für i.mx6

[Michael Bachmeier]

Hi,

I'm just going to rewrite your rcar driver for the i.mx6 processor.

thanks to your comments in the rcar driver, I understand the function
of each register. But I'd like a manual of this board. Where is
accurately entered into the individual registers.
The product spectrum from Renesas is very large and actually very
confusing for me.
Had someone for me a manual by the individual registers are explained.
So that I can understand the rcar driver better.


thanks

2015-11-10 9:59 GMT+01:00 Wolfram Sang <wsa@the-dreams.de>:
> Hi Michael,
>
>> Do I understand it right, I can set the Master in slave mode and the
>> new slave get his own i2c-adresse?
>
> Yes, you can have your own address then. Note that I recently gave a
> talk about the slave framework. You can find the slides here:
>
> http://elinux.org/ELCE_2015_Presentations
>
> Search for my name there. And if you wait some more, the video will be
> there, too, which will be much more helpful than the slides only. And
> there is the regular documentation:
>
> Documentation/i2c/slave-interface
>
>> Say that, I can connect a Master from the outside, without this
>> leading to problems?
>> If the master switch to slave, then stops SCL? Or how does it work?
>
> I suggest getting the I2C specifications from the web and read about
> "multi master" and "bus arbitration" to understand how it works. Please
> note that true multi-master busses can in practice be tricky. Shall your
> mx6 also be master, or slave only?
>
>> Is the EEPROM simulator only available if I rewrote "i2c-IMX" drivers
>> to the slave support?
>
> Yes.
>
>> Does anyone know if anyone is working on this driver?
>
> I don't know of; but I put some more people on CC who regularly work on
> Freescale SoCs.
>
>> Would it theoretically be enough to write 0x80 in the "I2Cx_I2CR"
>> register to set MSTA Bit to
>> slave mode. "Changing MSTA from 1 to 0 generates a Stop and selects Slave mode."
>> Or then disturbs the old driver?
>
> You need more to do this. You need to handle slave interrupts. See the
> documentation.
>
> Good luck,
>
>    Wolfram
>

Re: i2c slave support für i.mx6

[Wolfram Sang]

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Hi,

> thanks to your comments in the rcar driver, I understand the function
> of each register. But I'd like a manual of this board. Where is
> accurately entered into the individual registers.

As far as I know, there is no public user manual for RCar SoCs. I can
ask, though.

> Had someone for me a manual by the individual registers are explained.
> So that I can understand the rcar driver better.

However, if you have a specific question, you could ask and I could try
improving the driver's documentation :)

Regards,

   Wolfram


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Re: i2c slave support für i.mx6

[Michael Bachmeier]

Hi,

Is the recognition of IAAS a hardware interrupt (according to manual,
yes)? I set IEN (I2C enable) and IIEN (Interrupt Enable).
I set the slave address to 0x1c (chosen at random). The IMX bus driver
is unchanged. With my external Master I ask for the address on the
bus. But the IAAS bit is never set.
In this test, I want to see if the hardware interrupt work.
Should i modified the bus driver (IRQ handler???) or is this a real
hardware interrupt?

Where is my misconception?

Best regards

2015-11-18 12:11 GMT+01:00 Wolfram Sang <wsa@the-dreams.de>:
> Hi,
>
>> thanks to your comments in the rcar driver, I understand the function
>> of each register. But I'd like a manual of this board. Where is
>> accurately entered into the individual registers.
>
> As far as I know, there is no public user manual for RCar SoCs. I can
> ask, though.
>
>> Had someone for me a manual by the individual registers are explained.
>> So that I can understand the rcar driver better.
>
> However, if you have a specific question, you could ask and I could try
> improving the driver's documentation :)
>
> Regards,
>
>    Wolfram
>

Re: i2c slave support für i.mx6

[Wolfram Sang]

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> Is the recognition of IAAS a hardware interrupt (according to manual,
> yes)? I set IEN (I2C enable) and IIEN (Interrupt Enable).

Ah, I thought you had a question about Renesas hardware. I dunno much
about Freescale anymore.

> I set the slave address to 0x1c (chosen at random). The IMX bus driver
> is unchanged. With my external Master I ask for the address on the
> bus. But the IAAS bit is never set.
> In this test, I want to see if the hardware interrupt work.
> Should i modified the bus driver (IRQ handler???) or is this a real
> hardware interrupt?
> 
> Where is my misconception?

Please send patches what you did. That is easier to talk about.

BTW the video is online now:

https://www.youtube.com/watch?v=JdQ21jlwb58

Regards,

   Wolfram


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