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From: David Gibson <david@gibson.dropbear.id.au>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH 26/77] ppc/pnv: Add skeletton PowerNV platform
Date: Tue, 24 Nov 2015 13:43:51 +1100	[thread overview]
Message-ID: <20151124024351.GF26118@voom.fritz.box> (raw)
In-Reply-To: <1448329548.4574.47.camel@kernel.crashing.org>

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On Tue, Nov 24, 2015 at 12:45:48PM +1100, Benjamin Herrenschmidt wrote:
> On Fri, 2015-11-20 at 19:21 +1100, David Gibson wrote:
> > On Wed, Nov 11, 2015 at 11:27:39AM +1100, Benjamin Herrenschmidt
> > wrote:
> > > No devices yet, not even an interrupt controller, just to get
> > > started.
> > > 
> > > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> > > ---
> > >  default-configs/ppc64-softmmu.mak |   1 +
> > >  hw/ppc/Makefile.objs              |   2 +
> > >  hw/ppc/pnv.c                      | 600
> > > ++++++++++++++++++++++++++++++++++++++
> > >  include/hw/ppc/pnv.h              |  36 +++
> > >  4 files changed, 639 insertions(+)
> > >  create mode 100644 hw/ppc/pnv.c
> > >  create mode 100644 include/hw/ppc/pnv.h
> > 
> > Many of my comments below may be made irrelevant by later patches in
> > the series.
> 
> Heh, well there is where the "meat" of the new platform starts showing
> up :-)
> 
>  .../...
> 
> > > +#define _FDT(exp) \
> > > +    do { \
> > > +        int ret = (exp);                                           \
> > > +        if (ret < 0) {                                             \
> > > +            fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
> > > +                    #exp, fdt_strerror(ret));                      \
> > > +            exit(1);                                               \
> > > +        }                                                          \
> > > +    } while (0)
> > 
> > We should probably make a file where helper routines used by both
> > spapr.c and pnv.c can live.
> 
> Probably but I'd see that as a later cleanup rather than doing it
> in this series...

Ok.

> 
>  .../...
> 
> > > +    if (pcc->l1_dcache_size) {
> > > +        _FDT((fdt_property_cell(fdt, "d-cache-size", pcc->l1_dcache_size)));
> > > +    } else {
> > > +        fprintf(stderr, "Warning: Unknown L1 dcache size for cpu\n");
> > 
> > Hmm (note to self) should probably change a bunch of these both in
> > spapr.c and pnv.c from explicit fprintfs() to modern error_report()
> > and similar.
> 
> That's a train I completely missed, but yes.
> 
>   .../...
> 
> > > +    }
> > > +    _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
> > > +                       servers_prop, sizeof(servers_prop))));
> > > +    _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
> > > +                       gservers_prop, sizeof(gservers_prop))));
> > > +
> > > +    _FDT((fdt_end_node(fdt)));
> > > +}
> > > +
> > > +static void *powernv_create_fdt(PnvSystem *sys, uint32_t initrd_base, uint32_t initrd_size)
> > > +{
> > 
> > So.. does it make sense for qemu to create a device tree for powernv,
> > rather than leaving it to Opal?
> 
> Well, OPAL only creates a device-tree if you are on an FSP machine in
> which case it expects a complex data structure (HDAT) coming from the
> FSP to use as a source of info.
> 
> On OpenPower machines, which is closer to what we simulate here, we
> do get a device-tree as an input in OPAL, it's generated by HostBoot.
> 
> Now, I am not running HostBoot in qemu because most of what it does
> is completely irrelevant to an emulated system (training the various
> links, initializing the memory buffer chips, etc...).
> 
> However we do need to pass a number of platform information to OPAL
> which HB does via the device-tree, such as which cores are enabled,
> the memory map configured for PCI, which PHBs are enabled, etc...  so
> creating a DT in qemu makes sense, it mimmics HB in essence.
> 
> OPAL will enrich that device-tree before starting Linux.

Ok.  Some comments mentioning that you're simulating the exit state
from HostBoot would be good then.

> > > +    /*
> > > +     * Add info to guest to indentify which host is it being run on
> > > +     * and what is the uuid of the guest
> > > +     */
> > > +    if (kvmppc_get_host_model(&buf)) {
> > > +        _FDT((fdt_property_string(fdt, "host-model", buf)));
> > > +        g_free(buf);
> > > +    }
> > > +    if (kvmppc_get_host_serial(&buf)) {
> > > +        _FDT((fdt_property_string(fdt, "host-serial", buf)));
> > > +        g_free(buf);
> > > +    }
> > 
> > Since you're emulating a "bare metal" machine, surely the host
> > properties aren't relevant here.
> 
> They may or may not. But yes, I can take that out.
> 
> > > +    buf = g_strdup_printf(UUID_FMT, qemu_uuid[0], qemu_uuid[1],
> > > +                          qemu_uuid[2], qemu_uuid[3], qemu_uuid[4],
> > > +                          qemu_uuid[5], qemu_uuid[6], qemu_uuid[7],
> > > +                          qemu_uuid[8], qemu_uuid[9], qemu_uuid[10],
> > > +                          qemu_uuid[11], qemu_uuid[12], qemu_uuid[13],
> > > +                          qemu_uuid[14], qemu_uuid[15]);
> > > +
> > > +    _FDT((fdt_property_string(fdt, "vm,uuid", buf)));
> > > +    g_free(buf);
> > > +
> > > +    _FDT((fdt_begin_node(fdt, "chosen")));
> > > +    _FDT((fdt_property(fdt, "linux,initrd-start",
> > > +                       &start_prop, sizeof(start_prop))));
> > > +    _FDT((fdt_property(fdt, "linux,initrd-end",
> > > +                       &end_prop, sizeof(end_prop))));
> > > +    _FDT((fdt_end_node(fdt)));
> > > +
> > > +    _FDT((fdt_property_cell(fdt, "#address-cells", 0x2)));
> > > +    _FDT((fdt_property_cell(fdt, "#size-cells", 0x2)));
> > > +
> > > +    /* cpus */
> > > +    _FDT((fdt_begin_node(fdt, "cpus")));
> > > +    _FDT((fdt_property_cell(fdt, "#address-cells", 0x1)));
> > > +    _FDT((fdt_property_cell(fdt, "#size-cells", 0x0)));
> > > +
> > > +    CPU_FOREACH(cs) {
> > > +        powernv_create_cpu_node(fdt, cs, smt);
> > > +    }
> > > +
> > > +    _FDT((fdt_end_node(fdt)));
> > > +
> > > +    /* Memory */
> > > +    _FDT((powernv_populate_memory(fdt)));
> > > +
> > > +    /* /hypervisor node */
> > > +    if (kvm_enabled()) {
> > > +        uint8_t hypercall[16];
> > > +
> > > +        /* indicate KVM hypercall interface */
> > > +        _FDT((fdt_begin_node(fdt, "hypervisor")));
> > > +        _FDT((fdt_property_string(fdt, "compatible", "linux,kvm")));
> > > +        if (kvmppc_has_cap_fixup_hcalls()) {
> > > +            /*
> > > +             * Older KVM versions with older guest kernels were broken with the
> > > +             * magic page, don't allow the guest to map it.
> > > +             */
> > > +            kvmppc_get_hypercall(first_cpu->env_ptr, hypercall,
> > > +                                 sizeof(hypercall));
> > > +            _FDT((fdt_property(fdt, "hcall-instructions", hypercall,
> > > +                              sizeof(hypercall))));
> > > +        }
> > > +        _FDT((fdt_end_node(fdt)));
> > > +    }
> > 
> > And a hypercall interface surely doesn't make sense for powernv.
> 
> It's qemu paravirt, it exist on G5 too :-) It's for PR KVM, it allows
> to speed up some bits and pieces. But yeah we don't yet really
> "support" it at this point. However we might.

Ah, yes, I forgot about that.

> > > +
> > > +    _FDT((fdt_end_node(fdt))); /* close root node */
> > > +    _FDT((fdt_finish(fdt)));
> > > +
> > > +    return fdt;
> > > +}
> > > +
> > > +static void powernv_cpu_reset(void *opaque)
> > > +{
> > > +    PowerPCCPU *cpu = opaque;
> > > +    CPUState *cs = CPU(cpu);
> > > +    CPUPPCState *env = &cpu->env;
> > > +
> > > +    cpu_reset(cs);
> > > +
> > > +    env->spr[SPR_PIR] = ppc_get_vcpu_dt_id(cpu);
> > > +    env->spr[SPR_HIOR] = 0;
> > > +    env->gpr[3] = FDT_ADDR;
> > > +    env->nip = 0x10;
> > > +    env->msr |= MSR_HVB;
> > > +}
> > 
> > So, I believe the qemu-ishly correct way of doing this is to have the
> > cpu initialization in the cpu code, rather than the platform code, as
> > much as possible.  On PAPR we kind of get away with initialization in
> > the platform code on the grounds that it's a paravirt platform, but
> > powernv doesn't have that excuse.
> > 
> > But this may well be stuff that changes in later patches, so..
> 
> Well no, not really. But here too, we mimmic the state as coming out of
> HostBoot, which isn't quite the same thing. We need to provide the FDT
> entry, etc...
> 
> The "real" reset state of a P8 isn't something we can easily
> simulate... 
> 
> It runs some microcode from a SEEPROM with a small microcontroller
> which initializes a core, which then runs some HB code off it's L3
> cache etc... really not something we want to do in qemu at least
> for now.
> 
> So the initial state here is somewhat in between full virt and
> paravirt, we simulate a platform that has been partially initialized by
> HostBoot, to the state it has when it enters OPAL.

Ok, that makes sense, but I think it needs a bit more explanation in
the code to that effect.

> > > +static const VMStateDescription vmstate_powernv = {
> > > +    .name = "powernv",
> > > +    .version_id = 1,
> > > +    .minimum_version_id = 1,
> > > +};
> > 
> > It might be best to leave out the vmstate entirely until you're ready
> > to implement migration, rather than having a partial, probably not
> > working migration implementation.
> 
> Ok.
> 
> > > +
> > > +static void pnv_create_chip(PnvSystem *sys, unsigned int chip_no)
> > > +{
> > > +    PnvChip *chip = &sys->chips[chip_no];
> > > +
> > > +    if (chip_no >= PNV_MAX_CHIPS) {
> > > +            return;
> > > +    }
> > > +
> > > +    /* XXX Improve chip numbering to better match HW */
> > > +    chip->chip_id = chip_no;
> > 
> > I think modern qemu conventions would suggest creating the chips as
> > QOM objects rather than having a fixed array.
> 
> Yeah, more code & much larger memory footprint for the same result :-)
> 
> I can look into it but it's low priority. I still want to rework some
> of that chip stuff in future patches anyway.
> 
> > > +}
> > > +
> > > +static void ppc_powernv_init(MachineState *machine)
> > > +{
> > > +    ram_addr_t ram_size = machine->ram_size;
> > > +    const char *cpu_model = machine->cpu_model;
> > > +    const char *kernel_filename = machine->kernel_filename;
> > > +    const char *initrd_filename = machine->initrd_filename;
> > > +    uint32_t initrd_base = 0;
> > > +    long initrd_size = 0;
> > > +    PowerPCCPU *cpu;
> > > +    CPUPPCState *env;
> > > +    MemoryRegion *sysmem = get_system_memory();
> > > +    MemoryRegion *ram = g_new(MemoryRegion, 1);
> > > +    sPowerNVMachineState *pnv_machine = POWERNV_MACHINE(machine);
> > > +    PnvSystem *sys = &pnv_machine->sys;
> > > +    long fw_size;
> > > +    char *filename;
> > > +    void *fdt;
> > > +    int i;
> > > +
> > > +    /* init CPUs */
> > > +    if (cpu_model == NULL) {
> > > +        cpu_model = kvm_enabled() ? "host" : "POWER8";
> > > +    }
> > > +
> > > +    for (i = 0; i < smp_cpus; i++) {
> > > +        cpu = cpu_ppc_init(cpu_model);
> > > +        if (cpu == NULL) {
> > > +            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
> > > +            exit(1);
> > > +        }
> > > +        env = &cpu->env;
> > > +
> > > +        /* Set time-base frequency to 512 MHz */
> > > +        cpu_ppc_tb_init(env, TIMEBASE_FREQ);
> > > +
> > > +        /* MSR[IP] doesn't exist nowadays */
> > > +        env->msr_mask &= ~(1 << 6);
> > > +
> > > +        qemu_register_reset(powernv_cpu_reset, cpu);
> > > +    }
> > > +
> > > +    /* allocate RAM */
> > > +    memory_region_allocate_system_memory(ram, NULL, "ppc_powernv.ram", ram_size);
> > > +    memory_region_add_subregion(sysmem, 0, ram);
> > > +
> > > +    /* XXX We should decide how many chips to create based on #cores and
> > > +     * Venice vs. Murano vs. Naples chip type etc..., for now, just create
> > > +     * one chip. Also creation of the CPUs should be done per-chip
> > > +     */
> > > +    sys->num_chips = 1;
> > > +
> > > +    /* Create only one PHB for now until I figure out what's wrong
> > > +     * when I create more (resource assignment failures in Linux)
> > > +     */
> > > +    pnv_create_chip(sys, 0);
> > > +
> > > +    if (bios_name == NULL) {
> > > +        bios_name = FW_FILE_NAME;
> > > +    }
> > > +    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
> > > +    fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
> > > +    if (fw_size < 0) {
> > > +        hw_error("qemu: could not load OPAL '%s'\n", filename);
> > > +        exit(1);
> > > +    }
> > > +    g_free(filename);
> > > +
> > > +
> > > +    if (kernel_filename == NULL) {
> > > +        kernel_filename = KERNEL_FILE_NAME;
> > > +    }
> > > +    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
> > > kernel_filename);
> > 
> > The commit withe Opal image should go in before this, no?
> 
> Now this is a bit of an open discussion at the moment :-)
> 
> The way OPAL is built on OPP machines today is by essentially building
> a complete flash image which contains HostBoot, OPAL and the petitboot-
> based bootloader which contains a Linux kernel etc...
> 
> We could create a target without HB and with a slimmed down Linux but
> it would still probably be about 12MB I reckon, if not more. It feels a
> bit "big" to ship as a binary as part of qemu...
> 
> We would also have to add code to qemu to "find" OPAL in that image,
> and then add a model for the flash controller.
> 
> The other option is to bundle just OPAL itself. However that means
> you can't go anywhere without a -kernel argument, which would then
> be either a petitboot-based bootloader or your actual target kernel.

Hm, ok.  But in order for this to be usable, we need some way to get a
suitable image.  So medium term, I think it makes sense to include
both opal and PetitBoot, so you can boot the guest like a real
machine.

However, including only Opal and requiring -kernel would be a
reasonable interim step.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2015-11-24  6:01 UTC|newest]

Thread overview: 198+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-11  0:27 [Qemu-devel] [PATCH 00/77] ppc: Add "native" POWER8 platform Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 01/77] ppc: Remove MMU_MODEn_SUFFIX definitions Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 02/77] ppc: Use split I/D mmu modes to avoid flushes on interrupts Benjamin Herrenschmidt
2015-11-16  4:49   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-16 10:10     ` Benjamin Herrenschmidt
2015-11-16 12:42       ` David Gibson
2015-11-27 10:29   ` Alexander Graf
2015-11-27 12:15     ` Paolo Bonzini
2015-11-11  0:27 ` [Qemu-devel] [PATCH 03/77] ppc: Do some batching of TCG tlb flushes Benjamin Herrenschmidt
2015-11-16  5:00   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-16 10:16     ` Benjamin Herrenschmidt
2015-11-19  6:09       ` David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 04/77] target-ppc: Use sensible POWER8/POWER8E versions Benjamin Herrenschmidt
2015-11-11  0:59   ` [Qemu-devel] [Qemu-ppc] " Stewart Smith
2015-11-16  5:01   ` David Gibson
2015-11-16 10:17     ` Benjamin Herrenschmidt
2015-11-17  0:11       ` Alexey Kardashevskiy
2015-11-17  0:40         ` Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 05/77] ppc: Update SPR definitions Benjamin Herrenschmidt
2015-11-16  5:06   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 06/77] ppc: Add macros to register hypervisor mode SPRs Benjamin Herrenschmidt
2015-11-16  5:09   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 07/77] ppc: Add a bunch of hypervisor SPRs to Book3s Benjamin Herrenschmidt
2015-11-19  6:11   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-19 10:21     ` Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 08/77] ppc: Add number of threads per core to the processor definition Benjamin Herrenschmidt
2015-11-16  5:16   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-20  0:29     ` Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 09/77] ppc: Fix do_rfi() for rfi emulation Benjamin Herrenschmidt
2015-11-19  6:19   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-19 10:23     ` Benjamin Herrenschmidt
2015-11-20  0:26       ` Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 10/77] ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV Benjamin Herrenschmidt
2015-11-19  6:20   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 11/77] ppc: Create cpu_ppc_set_papr() helper Benjamin Herrenschmidt
2015-11-16  5:30   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 12/77] ppc: Better figure out if processor has HV mode Benjamin Herrenschmidt
2015-11-19  6:22   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 13/77] ppc: tlbie, tlbia and tlbisync are HV only Benjamin Herrenschmidt
2015-11-16  5:34   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-16 10:21     ` Benjamin Herrenschmidt
2015-11-18  0:06       ` Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 14/77] ppc: Change 'invalid' bit mask of tlbiel and tlbie Benjamin Herrenschmidt
2015-11-20  7:02   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 15/77] ppc: Fix sign extension issue in mtmsr(d) emulation Benjamin Herrenschmidt
2015-11-19  6:26   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-19 10:26     ` Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 16/77] ppc: Get out of emulation on SMT "OR" ops Benjamin Herrenschmidt
2015-11-16  5:40   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 17/77] ppc: Add PPC_64H instruction flag to POWER7 and POWER8 Benjamin Herrenschmidt
2015-11-16  5:41   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 18/77] ppc: Rework POWER7 & POWER8 exception model Benjamin Herrenschmidt
2015-11-19  6:44   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-19 10:31     ` Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 19/77] ppc: Fix POWER7 and POWER8 exception definitions Benjamin Herrenschmidt
2015-11-19  6:46   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 20/77] ppc: Fix generation if ISI/DSI vs. HV mode Benjamin Herrenschmidt
2015-11-19  6:50   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 21/77] ppc: Rework generation of priv and inval interrupts Benjamin Herrenschmidt
2015-11-20  7:45   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-24  0:44     ` Benjamin Herrenschmidt
2015-11-24  2:22       ` David Gibson
2015-11-24  0:51     ` Benjamin Herrenschmidt
2015-11-24  2:22       ` David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 22/77] ppc: Add real mode CI load/store instructions for P7 and P8 Benjamin Herrenschmidt
2015-11-20  7:48   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-24  0:58     ` Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 23/77] ppc: Turn a bunch of booleans from int to bool Benjamin Herrenschmidt
2015-11-20  7:49   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 24/77] ppc: Move exception generation code out of line Benjamin Herrenschmidt
2015-11-20  7:53   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-24  0:59     ` Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 25/77] ppc: Add P7/P8 Power Management instructions Benjamin Herrenschmidt
2015-11-20  8:06   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 26/77] ppc/pnv: Add skeletton PowerNV platform Benjamin Herrenschmidt
2015-11-19  8:58   ` [Qemu-devel] [Qemu-ppc] " Stewart Smith
2015-11-20  8:21   ` David Gibson
2015-11-24  1:45     ` Benjamin Herrenschmidt
2015-11-24  2:43       ` David Gibson [this message]
2015-11-11  0:27 ` [Qemu-devel] [PATCH 27/77] ppc/pnv: Add XSCOM infrastructure Benjamin Herrenschmidt
2015-11-24  3:20   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-24  8:49     ` Benjamin Herrenschmidt
2015-11-24  8:55     ` Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 28/77] ppc/xics: Rename existing XICS classe to XICS_SPAPR Benjamin Herrenschmidt
2015-11-24  3:25   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 29/77] ppc/xics: Move SPAPR specific code to a separate file Benjamin Herrenschmidt
2015-11-24  3:32   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 30/77] ppc/xics: Implement H_IPOLL using an accessor Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 31/77] ppc/xics: Remove unused xics_set_irq_type() Benjamin Herrenschmidt
2015-11-24  3:34   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 32/77] ppc/xics: Replace "icp" with "xics" in most places Benjamin Herrenschmidt
2015-11-24  3:36   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 33/77] ppc/xics: Make the ICSState a list Benjamin Herrenschmidt
2015-12-01  4:30   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 34/77] ppc/xics: An ICS with offset 0 is assumed to be uninitialized Benjamin Herrenschmidt
2015-12-01  4:40   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 35/77] ppc/xics: Move xics_set_nr_irqs() to xics_spapr.c and xics_kvm.c Benjamin Herrenschmidt
2015-12-01  4:46   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 36/77] ppc/xics: Use a helper to add a new ICS Benjamin Herrenschmidt
2015-12-01  4:47   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 37/77] ppc/xics: Split ICS into base class and "simple" implementation Benjamin Herrenschmidt
2015-12-01  5:13   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 38/77] ppc/xics: Add "native" XICS subclass Benjamin Herrenschmidt
2015-12-01  6:28   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-12-01  6:39   ` David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 39/77] ppc/xics: Add xics to the monitor "info pic" command Benjamin Herrenschmidt
2015-12-01  6:32   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 40/77] ppc/pnv: Wire up XICS native with PowerNV platform Benjamin Herrenschmidt
2015-12-01  6:41   ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-11-11  0:27 ` [Qemu-devel] [PATCH 41/77] ppc/pnv: Add LPC controller and hook it up with a UART and RTC Benjamin Herrenschmidt
2015-11-17  0:32   ` Alexey Kardashevskiy
2015-11-17  0:40     ` Benjamin Herrenschmidt
2015-12-01  6:43       ` [Qemu-devel] [Qemu-ppc] " David Gibson
2015-12-02  2:24         ` Alexey Kardashevskiy
2015-12-02  5:29           ` Benjamin Herrenschmidt
2015-12-03  1:04             ` Alexey Kardashevskiy
2015-12-03  1:45               ` David Gibson
2015-12-03 22:58                 ` Benjamin Herrenschmidt
2015-12-03 22:54               ` Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 42/77] ppc/pnv: Add cut down PSI bridge model and hookup external interrupt Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 43/77] ppc/pnv: Add OCC model stub with interrupt support Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 44/77] pci-bridge: Set a supported devfn_min for bridge Benjamin Herrenschmidt
2015-11-18 12:31   ` Paolo Bonzini
2015-11-18 12:41     ` [Qemu-devel] [PATCH for-2.5 " Paolo Bonzini
2015-11-18 14:21       ` Michael S. Tsirkin
2015-11-18 14:25         ` Paolo Bonzini
2015-11-18 16:38           ` Michael S. Tsirkin
2015-11-11  0:27 ` [Qemu-devel] [PATCH 45/77] qdev: Add a hook for a bus to device if it can add devices Benjamin Herrenschmidt
2015-11-18 12:34   ` Paolo Bonzini
2015-11-18 20:06     ` Benjamin Herrenschmidt
2015-11-11  0:27 ` [Qemu-devel] [PATCH 46/77] pci: Use the new pci_can_add_device() to enforce devfn_min/max Benjamin Herrenschmidt
2015-11-18 12:35   ` Paolo Bonzini
2015-11-11  0:28 ` [Qemu-devel] [PATCH 47/77] pci: Don't call pci_irq_handler() for a negative intx Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 48/77] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge Benjamin Herrenschmidt
2017-03-17  8:24   ` [Qemu-devel] [Qemu-ppc] " Cédric Le Goater
2017-03-17 22:15     ` Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 49/77] ppc/pnv: Create a default PCI layout Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 50/77] ppc: Update LPCR definitions Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 51/77] ppc: Use a helper to filter writes to LPCR Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 52/77] ppc: Cosmetic, align some comments Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 53/77] ppc: Add proper real mode translation support Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 54/77] ppc: Fix 64K pages support in full emulation Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 55/77] ppc/pnv+spapr: Add "ibm, pa-features" property to the device-tree Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 56/77] ppc: Fix conditions for delivering external interrupts to a guest Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 57/77] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 58/77] ppc: Initial HDEC support Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 59/77] ppc: Add placeholder SPRs for DPDES and DHDES on P8 Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 60/77] ppc: LPCR is a HV resource Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 61/77] ppc: SPURR & PURR are HV writeable and privileged Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 62/77] ppc: Add dummy SPR_IC for POWER8 Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 63/77] ppc: Initialize AMOR in PAPR mode Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 64/77] ppc: Fix writing to AMR/UAMOR Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 65/77] ppc: Add POWER8 IAMR register Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 66/77] ppc: Add a few more P8 PMU SPRs Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 67/77] ppc: Add dummy write to VTB Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 68/77] ppc: Add dummy POWER8 MPPR register Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 69/77] ppc: Add dummy POWER8 PSPB SPR Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 70/77] ppc: Add dummy CIABR SPR Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 71/77] ppc: Add dummy ACOP SPR Benjamin Herrenschmidt
2016-03-02 20:22   ` Thomas Huth
2015-11-11  0:28 ` [Qemu-devel] [PATCH 72/77] ppc: A couple more dummy POWER8 Book4 regs Benjamin Herrenschmidt
2016-03-02 20:30   ` Thomas Huth
2016-03-04  0:59     ` Benjamin Herrenschmidt
2016-03-09 20:04     ` [Qemu-devel] [Qemu-ppc] " Cédric Le Goater
2016-03-09 21:17       ` Thomas Huth
2016-03-10 18:01         ` Thomas Huth
2016-03-10 22:27           ` Cédric Le Goater
2016-03-11 10:04             ` Thomas Huth
2016-03-11 14:22               ` Cédric Le Goater
2016-03-11 14:46                 ` Thomas Huth
2016-03-14 14:53                   ` Cédric Le Goater
2016-03-14 15:43                     ` Thomas Huth
2016-03-14 15:50                       ` Cédric Le Goater
2015-11-11  0:28 ` [Qemu-devel] [PATCH 73/77] ppc: Add KVM numbers to some P8 SPRs Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 74/77] ppc: Print HSRR0/HSRR1 in "info registers" Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 75/77] ppc: Add dummy logmpp instruction Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 76/77] ppc: Add slbfee. instruction Benjamin Herrenschmidt
2015-11-11  0:28 ` [Qemu-devel] [PATCH 77/77] ppc: Fix CFAR updates Benjamin Herrenschmidt
2015-11-11  0:42 ` [Qemu-devel] [Qemu-ppc] [PATCH 00/77] ppc: Add "native" POWER8 platform Benjamin Herrenschmidt
2015-11-11  0:50 ` [Qemu-devel] " Eric Blake
2015-11-11  0:56   ` Benjamin Herrenschmidt
2015-11-11  3:27     ` [Qemu-devel] [Qemu-ppc] " Alexey Kardashevskiy
2015-11-11  3:38       ` Benjamin Herrenschmidt
2015-11-11  4:07         ` Alexey Kardashevskiy
2015-11-11  4:16           ` Benjamin Herrenschmidt
2015-11-11  4:41             ` Alexey Kardashevskiy
2015-11-11  4:47               ` Benjamin Herrenschmidt
2015-11-27 10:21               ` Alexander Graf
2015-11-28  7:59                 ` Benjamin Herrenschmidt
2015-11-28 10:53                   ` Alexander Graf
2015-11-29  0:38                     ` Benjamin Herrenschmidt
2015-11-30 18:15                   ` Cédric Le Goater
2015-11-30 20:09                     ` Benjamin Herrenschmidt
2015-11-30 21:24                       ` Cédric Le Goater
2015-11-30 23:12                         ` Benjamin Herrenschmidt
2015-12-07  1:25                     ` Stewart Smith
2015-12-07 22:48                       ` Cédric Le Goater
2015-11-11  0:57 ` Stewart Smith

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