From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932272AbbKYCmx (ORCPT ); Tue, 24 Nov 2015 21:42:53 -0500 Received: from mail-ob0-f177.google.com ([209.85.214.177]:34494 "EHLO mail-ob0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753828AbbKYCmu (ORCPT ); Tue, 24 Nov 2015 21:42:50 -0500 Date: Tue, 24 Nov 2015 20:42:43 -0600 From: Rob Herring To: "Gabriel L. Somlo" Cc: gregkh@linuxfoundation.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, arnd@arndb.de, lersek@redhat.com, ralf@linux-mips.org, rmk+kernel@arm.linux.org.uk, eric@anholt.net, hanjun.guo@linaro.org, zajec5@gmail.com, sudeep.holla@arm.com, agross@codeaurora.org, linux-api@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, qemu-devel@nongnu.org, jordan.l.justen@intel.com, mst@redhat.com, peter.maydell@linaro.org, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, pbonzini@redhat.com, kraxel@redhat.com, luto@amacapital.net, stefanha@gmail.com, revol@free.fr Subject: Re: [PATCH v5 4/4] devicetree: update documentation for fw_cfg ARM bindings Message-ID: <20151125024243.GA8005@rob-hp-laptop> References: <1448294264-17388-1-git-send-email-somlo@cmu.edu> <1448294264-17388-5-git-send-email-somlo@cmu.edu> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1448294264-17388-5-git-send-email-somlo@cmu.edu> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Nov 23, 2015 at 10:57:44AM -0500, Gabriel L. Somlo wrote: > From: Gabriel Somlo > > Remove fw_cfg hardware interface details from > Documentation/devicetree/bindings/arm/fw-cfg.txt, > and replace them with a pointer to the authoritative > documentation in the QEMU source tree. > > Signed-off-by: Gabriel Somlo > Cc: Laszlo Ersek Acked-by: Rob Herring > --- > Documentation/devicetree/bindings/arm/fw-cfg.txt | 38 ++---------------------- > 1 file changed, 2 insertions(+), 36 deletions(-) > > diff --git a/Documentation/devicetree/bindings/arm/fw-cfg.txt b/Documentation/devicetree/bindings/arm/fw-cfg.txt > index 953fb64..ce27386 100644 > --- a/Documentation/devicetree/bindings/arm/fw-cfg.txt > +++ b/Documentation/devicetree/bindings/arm/fw-cfg.txt > @@ -11,43 +11,9 @@ QEMU exposes the control and data register to ARM guests as memory mapped > registers; their location is communicated to the guest's UEFI firmware in the > DTB that QEMU places at the bottom of the guest's DRAM. > > -The guest writes a selector value (a key) to the selector register, and then > -can read the corresponding data (produced by QEMU) via the data register. If > -the selected entry is writable, the guest can rewrite it through the data > -register. > +The authoritative guest-side hardware interface documentation to the fw_cfg > +device ca be found in "docs/specs/fw_cfg.txt" in the QEMU source tree. > > -The selector register takes keys in big endian byte order. > - > -The data register allows accesses with 8, 16, 32 and 64-bit width (only at > -offset 0 of the register). Accesses larger than a byte are interpreted as > -arrays, bundled together only for better performance. The bytes constituting > -such a word, in increasing address order, correspond to the bytes that would > -have been transferred by byte-wide accesses in chronological order. > - > -The interface allows guest firmware to download various parameters and blobs > -that affect how the firmware works and what tables it installs for the guest > -OS. For example, boot order of devices, ACPI tables, SMBIOS tables, kernel and > -initrd images for direct kernel booting, virtual machine UUID, SMP information, > -virtual NUMA topology, and so on. > - > -The authoritative registry of the valid selector values and their meanings is > -the QEMU source code; the structure of the data blobs corresponding to the > -individual key values is also defined in the QEMU source code. > - > -The presence of the registers can be verified by selecting the "signature" blob > -with key 0x0000, and reading four bytes from the data register. The returned > -signature is "QEMU". > - > -The outermost protocol (involving the write / read sequences of the control and > -data registers) is expected to be versioned, and/or described by feature bits. > -The interface revision / feature bitmap can be retrieved with key 0x0001. The > -blob to be read from the data register has size 4, and it is to be interpreted > -as a uint32_t value in little endian byte order. The current value > -(corresponding to the above outer protocol) is zero. > - > -The guest kernel is not expected to use these registers (although it is > -certainly allowed to); the device tree bindings are documented here because > -this is where device tree bindings reside in general. > > Required properties: > > -- > 2.4.3 > > -- > To unsubscribe from this list: send the line "unsubscribe devicetree" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH v5 4/4] devicetree: update documentation for fw_cfg ARM bindings Date: Tue, 24 Nov 2015 20:42:43 -0600 Message-ID: <20151125024243.GA8005@rob-hp-laptop> References: <1448294264-17388-1-git-send-email-somlo@cmu.edu> <1448294264-17388-5-git-send-email-somlo@cmu.edu> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1448294264-17388-5-git-send-email-somlo-D+Gtc/HYRWM@public.gmane.org> Sender: linux-api-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: "Gabriel L. Somlo" Cc: gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org, pawel.moll-5wv7dgnIgG8@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org, galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, arnd-r2nGTMty4D4@public.gmane.org, lersek-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org, ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org, rmk+kernel-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org, eric-WhKQ6XTQaPysTnJN9+BGXg@public.gmane.org, hanjun.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, zajec5-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, sudeep.holla-5wv7dgnIgG8@public.gmane.org, agross-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, linux-api-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, qemu-devel-qX2TKyscuCcdnm+yROfE0A@public.gmane.org, jordan.l.justen-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org, mst-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org, peter.maydell-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, leif.lindholm-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, ard.biesheuvel-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, pbonzini-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org, kraxel-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org, luto-kltTT9wpgjJwATOyAt5JVQ@public.gmane.org, stefanha-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, revol-GANU6spQydw@public.gmane.org List-Id: devicetree@vger.kernel.org On Mon, Nov 23, 2015 at 10:57:44AM -0500, Gabriel L. Somlo wrote: > From: Gabriel Somlo > > Remove fw_cfg hardware interface details from > Documentation/devicetree/bindings/arm/fw-cfg.txt, > and replace them with a pointer to the authoritative > documentation in the QEMU source tree. > > Signed-off-by: Gabriel Somlo > Cc: Laszlo Ersek Acked-by: Rob Herring > --- > Documentation/devicetree/bindings/arm/fw-cfg.txt | 38 ++---------------------- > 1 file changed, 2 insertions(+), 36 deletions(-) > > diff --git a/Documentation/devicetree/bindings/arm/fw-cfg.txt b/Documentation/devicetree/bindings/arm/fw-cfg.txt > index 953fb64..ce27386 100644 > --- a/Documentation/devicetree/bindings/arm/fw-cfg.txt > +++ b/Documentation/devicetree/bindings/arm/fw-cfg.txt > @@ -11,43 +11,9 @@ QEMU exposes the control and data register to ARM guests as memory mapped > registers; their location is communicated to the guest's UEFI firmware in the > DTB that QEMU places at the bottom of the guest's DRAM. > > -The guest writes a selector value (a key) to the selector register, and then > -can read the corresponding data (produced by QEMU) via the data register. If > -the selected entry is writable, the guest can rewrite it through the data > -register. > +The authoritative guest-side hardware interface documentation to the fw_cfg > +device ca be found in "docs/specs/fw_cfg.txt" in the QEMU source tree. > > -The selector register takes keys in big endian byte order. > - > -The data register allows accesses with 8, 16, 32 and 64-bit width (only at > -offset 0 of the register). Accesses larger than a byte are interpreted as > -arrays, bundled together only for better performance. The bytes constituting > -such a word, in increasing address order, correspond to the bytes that would > -have been transferred by byte-wide accesses in chronological order. > - > -The interface allows guest firmware to download various parameters and blobs > -that affect how the firmware works and what tables it installs for the guest > -OS. For example, boot order of devices, ACPI tables, SMBIOS tables, kernel and > -initrd images for direct kernel booting, virtual machine UUID, SMP information, > -virtual NUMA topology, and so on. > - > -The authoritative registry of the valid selector values and their meanings is > -the QEMU source code; the structure of the data blobs corresponding to the > -individual key values is also defined in the QEMU source code. > - > -The presence of the registers can be verified by selecting the "signature" blob > -with key 0x0000, and reading four bytes from the data register. The returned > -signature is "QEMU". > - > -The outermost protocol (involving the write / read sequences of the control and > -data registers) is expected to be versioned, and/or described by feature bits. > -The interface revision / feature bitmap can be retrieved with key 0x0001. The > -blob to be read from the data register has size 4, and it is to be interpreted > -as a uint32_t value in little endian byte order. The current value > -(corresponding to the above outer protocol) is zero. > - > -The guest kernel is not expected to use these registers (although it is > -certainly allowed to); the device tree bindings are documented here because > -this is where device tree bindings reside in general. > > Required properties: > > -- > 2.4.3 > > -- > To unsubscribe from this list: send the line "unsubscribe devicetree" in > the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org > More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47529) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a1Q2n-0005cj-G3 for qemu-devel@nongnu.org; Tue, 24 Nov 2015 21:42:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a1Q2k-0001mm-8P for qemu-devel@nongnu.org; Tue, 24 Nov 2015 21:42:53 -0500 Received: from mail-ob0-f179.google.com ([209.85.214.179]:36559) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a1Q2k-0001mg-2a for qemu-devel@nongnu.org; Tue, 24 Nov 2015 21:42:50 -0500 Received: by obdgf3 with SMTP id gf3so29304596obd.3 for ; Tue, 24 Nov 2015 18:42:49 -0800 (PST) Date: Tue, 24 Nov 2015 20:42:43 -0600 From: Rob Herring Message-ID: <20151125024243.GA8005@rob-hp-laptop> References: <1448294264-17388-1-git-send-email-somlo@cmu.edu> <1448294264-17388-5-git-send-email-somlo@cmu.edu> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1448294264-17388-5-git-send-email-somlo@cmu.edu> Subject: Re: [Qemu-devel] [PATCH v5 4/4] devicetree: update documentation for fw_cfg ARM bindings List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Gabriel L. Somlo" Cc: mark.rutland@arm.com, peter.maydell@linaro.org, mst@redhat.com, stefanha@gmail.com, qemu-devel@nongnu.org, eric@anholt.net, kraxel@redhat.com, linux-api@vger.kernel.org, agross@codeaurora.org, arnd@arndb.de, zajec5@gmail.com, rmk+kernel@arm.linux.org.uk, lersek@redhat.com, devicetree@vger.kernel.org, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, jordan.l.justen@intel.com, galak@codeaurora.org, leif.lindholm@linaro.org, ard.biesheuvel@linaro.org, gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org, luto@amacapital.net, hanjun.guo@linaro.org, sudeep.holla@arm.com, pbonzini@redhat.com, revol@free.fr On Mon, Nov 23, 2015 at 10:57:44AM -0500, Gabriel L. Somlo wrote: > From: Gabriel Somlo > > Remove fw_cfg hardware interface details from > Documentation/devicetree/bindings/arm/fw-cfg.txt, > and replace them with a pointer to the authoritative > documentation in the QEMU source tree. > > Signed-off-by: Gabriel Somlo > Cc: Laszlo Ersek Acked-by: Rob Herring > --- > Documentation/devicetree/bindings/arm/fw-cfg.txt | 38 ++---------------------- > 1 file changed, 2 insertions(+), 36 deletions(-) > > diff --git a/Documentation/devicetree/bindings/arm/fw-cfg.txt b/Documentation/devicetree/bindings/arm/fw-cfg.txt > index 953fb64..ce27386 100644 > --- a/Documentation/devicetree/bindings/arm/fw-cfg.txt > +++ b/Documentation/devicetree/bindings/arm/fw-cfg.txt > @@ -11,43 +11,9 @@ QEMU exposes the control and data register to ARM guests as memory mapped > registers; their location is communicated to the guest's UEFI firmware in the > DTB that QEMU places at the bottom of the guest's DRAM. > > -The guest writes a selector value (a key) to the selector register, and then > -can read the corresponding data (produced by QEMU) via the data register. If > -the selected entry is writable, the guest can rewrite it through the data > -register. > +The authoritative guest-side hardware interface documentation to the fw_cfg > +device ca be found in "docs/specs/fw_cfg.txt" in the QEMU source tree. > > -The selector register takes keys in big endian byte order. > - > -The data register allows accesses with 8, 16, 32 and 64-bit width (only at > -offset 0 of the register). Accesses larger than a byte are interpreted as > -arrays, bundled together only for better performance. The bytes constituting > -such a word, in increasing address order, correspond to the bytes that would > -have been transferred by byte-wide accesses in chronological order. > - > -The interface allows guest firmware to download various parameters and blobs > -that affect how the firmware works and what tables it installs for the guest > -OS. For example, boot order of devices, ACPI tables, SMBIOS tables, kernel and > -initrd images for direct kernel booting, virtual machine UUID, SMP information, > -virtual NUMA topology, and so on. > - > -The authoritative registry of the valid selector values and their meanings is > -the QEMU source code; the structure of the data blobs corresponding to the > -individual key values is also defined in the QEMU source code. > - > -The presence of the registers can be verified by selecting the "signature" blob > -with key 0x0000, and reading four bytes from the data register. The returned > -signature is "QEMU". > - > -The outermost protocol (involving the write / read sequences of the control and > -data registers) is expected to be versioned, and/or described by feature bits. > -The interface revision / feature bitmap can be retrieved with key 0x0001. The > -blob to be read from the data register has size 4, and it is to be interpreted > -as a uint32_t value in little endian byte order. The current value > -(corresponding to the above outer protocol) is zero. > - > -The guest kernel is not expected to use these registers (although it is > -certainly allowed to); the device tree bindings are documented here because > -this is where device tree bindings reside in general. > > Required properties: > > -- > 2.4.3 > > -- > To unsubscribe from this list: send the line "unsubscribe devicetree" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html