From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38721) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a3eeT-0001v1-Nu for qemu-devel@nongnu.org; Tue, 01 Dec 2015 01:43:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a3eeP-00030H-Kf for qemu-devel@nongnu.org; Tue, 01 Dec 2015 01:43:01 -0500 Date: Tue, 1 Dec 2015 17:41:47 +1100 From: David Gibson Message-ID: <20151201064147.GX31343@voom.redhat.com> References: <1447201710-10229-1-git-send-email-benh@kernel.crashing.org> <1447201710-10229-41-git-send-email-benh@kernel.crashing.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="XLTQE3HqOi3RIrZG" Content-Disposition: inline In-Reply-To: <1447201710-10229-41-git-send-email-benh@kernel.crashing.org> Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH 40/77] ppc/pnv: Wire up XICS native with PowerNV platform List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Benjamin Herrenschmidt Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org --XLTQE3HqOi3RIrZG Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Nov 11, 2015 at 11:27:53AM +1100, Benjamin Herrenschmidt wrote: > Signed-off-by: Benjamin Herrenschmidt Looks sound enough, but will probably need some rework due to other suggested changes in the new xics stuff. > --- > hw/ppc/pnv.c | 69 +++++++++++++++++++++++++++++++++++++++++++++= ++++++ > include/hw/ppc/pnv.h | 2 ++ > include/hw/ppc/xics.h | 2 ++ > 3 files changed, 73 insertions(+) >=20 > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c > index 2eac877..a7a9b0f 100644 > --- a/hw/ppc/pnv.c > +++ b/hw/ppc/pnv.c > @@ -41,6 +41,7 @@ > #include "hw/ppc/ppc.h" > #include "hw/ppc/pnv.h" > #include "hw/loader.h" > +#include "hw/ppc/xics.h" > #include "hw/ppc/pnv_xscom.h" > =20 > #include "exec/address-spaces.h" > @@ -81,6 +82,59 @@ struct sPowerNVMachineState { > PnvSystem sys; > }; > =20 > +static XICSState *try_create_xics(const char *type, int nr_servers, > + int nr_irqs, Error **errp) > +{ > + Error *err =3D NULL; > + DeviceState *dev; > + > + dev =3D qdev_create(NULL, type); > + qdev_prop_set_uint32(dev, "nr_servers", nr_servers); > + object_property_set_bool(OBJECT(dev), true, "realized", &err); > + if (err) { > + error_propagate(errp, err); > + object_unparent(OBJECT(dev)); > + return NULL; > + } > + > + return XICS_COMMON(dev); > +} > + > +static XICSState *xics_system_init(int nr_servers, int nr_irqs) > +{ > + XICSState *xics =3D NULL; > + > +#if 0 /* Some fixing needed to handle native ICS in KVM mode */ > + if (kvm_enabled()) { > + QemuOpts *machine_opts =3D qemu_get_machine_opts(); > + bool irqchip_allowed =3D qemu_opt_get_bool(machine_opts, > + "kernel_irqchip", true); > + bool irqchip_required =3D qemu_opt_get_bool(machine_opts, > + "kernel_irqchip", fals= e); > + if (irqchip_allowed) { > + icp =3D try_create_xics(TYPE_KVM_XICS, nr_servers, nr_ir= qs, > + &error_abort); > + } > + > + if (irqchip_required && !icp) { > + perror("Failed to create in-kernel XICS\n"); > + abort(); > + } > + } > +#endif > + > + if (!xics) { > + xics =3D try_create_xics(TYPE_XICS_NATIVE, nr_servers, nr_irqs, > + &error_abort); > + } > + > + if (!xics) { > + perror("Failed to create XICS\n"); > + abort(); > + } > + return xics; > +} > + > static size_t create_page_sizes_prop(CPUPPCState *env, uint32_t *prop, > size_t maxsize) > { > @@ -366,6 +420,13 @@ static void *powernv_create_fdt(PnvSystem *sys, uint= 32_t initrd_base, uint32_t i > =20 > _FDT((fdt_end_node(fdt))); > =20 > + /* ICPs */ > + CPU_FOREACH(cs) { > + PowerPCCPU *cpu =3D POWERPC_CPU(cs); > + uint32_t base_server =3D ppc_get_vcpu_dt_id(cpu); > + xics_create_native_icp_node(sys->xics, fdt, base_server, smt); > + } > + > /* Memory */ > _FDT((powernv_populate_memory(fdt))); > =20 > @@ -451,11 +512,17 @@ static void ppc_powernv_init(MachineState *machine) > MemoryRegion *ram =3D g_new(MemoryRegion, 1); > sPowerNVMachineState *pnv_machine =3D POWERNV_MACHINE(machine); > PnvSystem *sys =3D &pnv_machine->sys; > + XICSState *xics; > long fw_size; > char *filename; > void *fdt; > int i; > =20 > + /* Set up Interrupt Controller before we create the VCPUs */ > + xics =3D xics_system_init(smp_cpus * kvmppc_smt_threads() / smp_thre= ads, > + XICS_IRQS_POWERNV); > + sys->xics =3D xics; > + > /* init CPUs */ > if (cpu_model =3D=3D NULL) { > cpu_model =3D kvm_enabled() ? "host" : "POWER8"; > @@ -475,6 +542,8 @@ static void ppc_powernv_init(MachineState *machine) > /* MSR[IP] doesn't exist nowadays */ > env->msr_mask &=3D ~(1 << 6); > =20 > + xics_cpu_setup(xics, cpu); > + > qemu_register_reset(powernv_cpu_reset, cpu); > } > =20 > diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h > index cb157eb..80617b4 100644 > --- a/include/hw/ppc/pnv.h > +++ b/include/hw/ppc/pnv.h > @@ -21,6 +21,7 @@ > =20 > #include "hw/hw.h" > typedef struct XScomBus XScomBus; > +typedef struct XICSState XICSState; > =20 > /* Should we turn that into a QOjb of some sort ? */ > typedef struct PnvChip { > @@ -29,6 +30,7 @@ typedef struct PnvChip { > } PnvChip; > =20 > typedef struct PnvSystem { > + XICSState *xics; > uint32_t num_chips; > #define PNV_MAX_CHIPS 1 > PnvChip chips[PNV_MAX_CHIPS]; > diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h > index 1cf7037..85d2fb9 100644 > --- a/include/hw/ppc/xics.h > +++ b/include/hw/ppc/xics.h > @@ -183,6 +183,8 @@ struct ICSIRQState { > }; > =20 > #define XICS_IRQS_SPAPR 1024 > +#define XICS_IRQS_POWERNV (1 << 19) > + > =20 > qemu_irq xics_get_qirq(XICSState *icp, int irq); > =20 --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --XLTQE3HqOi3RIrZG Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJWXUErAAoJEGw4ysog2bOSOtcP/iLQPOMBZevy9AkPUvkifftZ BwmVT6Q5nnkKAU0rmR8FXFZnv+CAh+WVRf8NmGqUdcz35EHD146S8ebh40+KeAI/ /C2BPuqoXpdro0Nv0EgsEM9SFDpU++Fgb7H0hAQBrG0h2WmR0d+RMyS1qVRNUrWB zNmn3CdAJtt0QadVScI35PL7e0BViGXPCRbnBsYCsVblJd3vP3aTR5/PlDBqcyyb OGcIth9kSSd/Q+pRXZ05UoLkgO5O+E8SPtLlC+eXUdGQoE3s+6Hw7P6H7qB47Wvs 5gBPrXgdT18BX4PNBfhFvXzBDL1x+XJxoYiHy7XODc+D3lNc+4MBg8f4BfW1iMuh t1+w1iyusJjO7QPqFiduaRVfqvK3iYSTV5dlVBWwi1ceWpIY+5/Zbi6esJF1GQSH bbNaLQmZaIEHO1eKGFEQ75dyCDDta4n6iJngcMM2aJtckQGmK4zh9DDMyp05Z+fM 4dcnXy50njwdREEuxkVGqFn//B2XmRSoliVfNAvngnRTd/irCS1ZAR8CGd5KC1pS jDAtm/pDFQJaPR2zrVtuVY+xaZHGtqKjBggzQHJamtyHBHIC30Ua0Wllw+AGOu+o J6eh0a4I/TqHdGg7vTA/HrOP2E1+8JfAl27KJA45NGzz6K0wLHJCP+bfWdsbTb0P BbSD5VvfPGWtNbajSfDM =y72f -----END PGP SIGNATURE----- --XLTQE3HqOi3RIrZG--