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From: Chris Wilson <chris@chris-wilson.co.uk>
To: Shobhit Kumar <kumar@shobhit.info>
Cc: Shobhit Kumar <shobhit.kumar@intel.com>,
	intel-gfx <Intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915: Wait for PP cycle delay only if panel is in power off sequence
Date: Wed, 9 Dec 2015 15:04:53 +0000	[thread overview]
Message-ID: <20151209150453.GA29974@nuc-i3427.alporthouse.com> (raw)
In-Reply-To: <CAAbrOme0_BnKX4URvR0EKpZtsJLjAVuEgA+hpgOx4_aX7-taOQ@mail.gmail.com>

On Wed, Dec 09, 2015 at 08:07:10PM +0530, Shobhit Kumar wrote:
> On Wed, Dec 9, 2015 at 7:27 PM, Ville Syrjälä
> <ville.syrjala@linux.intel.com> wrote:
> > On Wed, Dec 09, 2015 at 06:51:48PM +0530, Shobhit Kumar wrote:
> >> During resume, while turning the EDP panel power on, we need not wait
> >> blindly for panel_power_cycle_delay. Check if panel power down sequence
> >> in progress and then only wait. This improves our resume time significantly.
> >>
> >> Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
> >> ---
> >>  drivers/gpu/drm/i915/intel_dp.c | 17 ++++++++++++++++-
> >>  1 file changed, 16 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> >> index f335c92..10ec669 100644
> >> --- a/drivers/gpu/drm/i915/intel_dp.c
> >> +++ b/drivers/gpu/drm/i915/intel_dp.c
> >> @@ -617,6 +617,20 @@ static bool edp_have_panel_power(struct intel_dp *intel_dp)
> >>       return (I915_READ(_pp_stat_reg(intel_dp)) & PP_ON) != 0;
> >>  }
> >>
> >> +static bool edp_panel_off_seq(struct intel_dp *intel_dp)
> >> +{
> >> +     struct drm_device *dev = intel_dp_to_dev(intel_dp);
> >> +     struct drm_i915_private *dev_priv = dev->dev_private;
> >> +
> >> +     lockdep_assert_held(&dev_priv->pps_mutex);
> >> +
> >> +     if (IS_VALLEYVIEW(dev) &&
> >> +         intel_dp->pps_pipe == INVALID_PIPE)
> >> +             return false;
> >> +
> >> +     return (I915_READ(_pp_stat_reg(intel_dp)) & PP_SEQUENCE_POWER_DOWN) != 0;
> >> +}
> >
> > This doens't make sense to me. The power down cycle may have
> > completed just before, and so this would claim we don't have to
> > wait for the power_cycle_delay.
> 
> Not sure I understand your concern correctly. You are right, power
> down cycle may have completed just before and if it has then we don't
> need to wait. But in case the power down cycle is in progress as per
> internal state, then we need to wait for it to complete. This will
> happen for example in non-suspend disable path and will be handled
> correctly. In case of actual suspend/resume, this would have
> successfully completed and will skip the wait as it is not needed
> before enabling panel power.
> 
> >
> >> +
> >>  static bool edp_have_panel_vdd(struct intel_dp *intel_dp)
> >>  {
> >>       struct drm_device *dev = intel_dp_to_dev(intel_dp);
> >> @@ -2025,7 +2039,8 @@ static void edp_panel_on(struct intel_dp *intel_dp)
> >>                port_name(dp_to_dig_port(intel_dp)->port)))
> >>               return;
> >>
> >> -     wait_panel_power_cycle(intel_dp);
> >> +     if (edp_panel_off_seq(intel_dp))
> >> +             wait_panel_power_cycle(intel_dp);

Looking in from the side, I have no idea what this is meant to do. At
the very least you need your explanatory paragraph here which would
include what exactly you are waiting for at the start of edp_panel_on
(and please try and find a better name for edp_panel_off_seq()).
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-12-09 15:04 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-07 20:28 [PATCH] drm/i915: Suspend resume timing optimization abhay.kumar
2015-12-07 20:52 ` Paulo Zanoni
2015-12-07 22:19   ` Kumar, Abhay
2015-12-09 10:55   ` Kumar, Shobhit
2015-12-09 12:12     ` Ville Syrjälä
2015-12-09 12:40       ` Kumar, Shobhit
2015-12-09 13:21         ` [PATCH] drm/i915: Wait for PP cycle delay only if panel is in power off sequence Shobhit Kumar
2015-12-09 13:29           ` Kumar, Shobhit
2015-12-09 13:57           ` Ville Syrjälä
2015-12-09 14:37             ` Shobhit Kumar
2015-12-09 15:04               ` Chris Wilson [this message]
2015-12-09 15:29                 ` Shobhit Kumar
2015-12-09 16:05                   ` Ville Syrjälä
2015-12-10  9:31                     ` Kumar, Shobhit
2015-12-10  9:50                       ` Daniel Vetter
2015-12-10 10:18                         ` Kumar, Shobhit
2015-12-10 10:58                         ` Thulasimani, Sivakumar
2015-12-10 13:15                       ` Ville Syrjälä
2015-12-10 13:38                         ` Ville Syrjälä
2015-12-10 14:39                           ` Thulasimani, Sivakumar
2015-12-10 15:02                             ` Ville Syrjälä
2015-12-11 11:25                               ` Thulasimani, Sivakumar
2015-12-11 11:41                                 ` Kumar, Shobhit
2015-12-11 17:00                                   ` Daniel Vetter
2015-12-14  3:59                                     ` Kumar, Shobhit
2015-12-11  6:34                         ` Kumar, Shobhit

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