From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andy Gross Subject: Re: [v3,2/6] clk: qcom: Add IPQ4019 Global Clock Controller support Date: Thu, 10 Dec 2015 22:06:48 -0600 Message-ID: <20151211040648.GA898@Agamemnon.attlocal.net> References: <1447975173-29485-3-git-send-email-mmcclint@qca.qualcomm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Received: from mail-ob0-f178.google.com ([209.85.214.178]:33398 "EHLO mail-ob0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751750AbbLKEGt (ORCPT ); Thu, 10 Dec 2015 23:06:49 -0500 Received: by obbsd4 with SMTP id sd4so24876187obb.0 for ; Thu, 10 Dec 2015 20:06:49 -0800 (PST) Content-Disposition: inline In-Reply-To: <1447975173-29485-3-git-send-email-mmcclint@qca.qualcomm.com> Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: Matthew McClintock Cc: Andy Gross , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, Varadarajan Narayanan , linux-kernel@vger.kernel.org, qca-upstream.external@qca.qualcomm.com, Pradeep Banavathi , Senthilkumar N L , Matthew McClintock On Thu, Nov 19, 2015 at 05:19:29PM -0600, Matthew McClintock wrote: > From: Varadarajan Narayanan > > This patch adds support for the global clock controller found on > the IPQ4019 based devices. This includes UART, I2C, SPI etc. > > Signed-off-by: Pradeep Banavathi > Signed-off-by: Senthilkumar N L > Signed-off-by: Varadarajan Narayanan > Signed-off-by: Matthew McClintock Acked-by: Andy Gross