Re: [PATCH] ASoC: rt5677: Reconfigure PLL1 after resume

From: Mark Brown <broonie@kernel.org>
To: Ben Zhang <benzh@chromium.org>
Cc: Oder Chiou <oder_chiou@realtek.com>,
	alsa-devel@alsa-project.org, Liam Girdwood <lgirdwood@gmail.com>,
	John Lin <john.lin@realtek.com>,
	Anatol Pomozov <anatol@google.com>,
	Bard Liao <bardliao@realtek.com>,
	Dylan Reid <dgreid@chromium.org>
Subject: Re: [PATCH] ASoC: rt5677: Reconfigure PLL1 after resume
Date: Wed, 16 Dec 2015 19:21:27 +0000	[thread overview]
Message-ID: <20151216192127.GQ5727@sirena.org.uk> (raw)
In-Reply-To: <1450216285-14875-1-git-send-email-benzh@chromium.org>

[-- Attachment #1.1: Type: text/plain, Size: 926 bytes --]

On Tue, Dec 15, 2015 at 01:51:25PM -0800, Ben Zhang wrote:
> Sometimes PLL1 stops working if the codec loses power
> during suspend (when pow-ldo2 or reset gpio is used).
> MX-7Bh(RT5677_PLL1_CTRL2) is cleared and won't be restored
> by regcache since it's volatile. MX-7Bh has one status bit
> and M code for PLL1. rt5677_set_dai_pll doesn't reconfigure
> PLL1 after resume because it thinks the PLL params are not
> changed.

> This patch clears the cached PLL params at resume so that
> rt5677_set_dai_pll can reconfigure the PLL after resume.

This is something I'd expect the machine driver to handle - if it's
stopped using the PLL I'd expect it to explicitly turn it off, suspend
(or the CODEC going idle for that matter normally, the PLL is burning
power) should do that.  If anything I'd expect the CODEC driver to
restore the current settings.

That said I'll apply this since it at least doesn't make things worse.

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 473 bytes --]

[-- Attachment #2: Type: text/plain, Size: 0 bytes --]