From: Greg Kurz <gkurz@linux.vnet.ibm.com>
To: Alexander Graf <agraf@suse.de>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
qemu-ppc@nongnu.org, Anton Blanchard <anton@samba.org>,
qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 5/7] target-ppc: gdbstub: fix altivec registers for little-endian guests
Date: Fri, 18 Dec 2015 11:19:07 +0100 [thread overview]
Message-ID: <20151218101906.26409.73144.stgit@bahia.huguette.org> (raw)
In-Reply-To: <20151218101815.26409.55642.stgit@bahia.huguette.org>
Altivec registers are 128-bit wide. They are stored in memory as two
64-bit values that must be byteswapped when the guest is little-endian.
Let's reuse the ppc_maybe_bswap_register() helper for this.
We also need to fix the ordering of the 64-bit elements according to
the target endianness, for both system and user mode.
Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
---
target-ppc/translate_init.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 18e9e561561f..80d53e4dcf5a 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8754,9 +8754,9 @@ static void dump_ppc_insns (CPUPPCState *env)
static bool avr_need_swap(CPUPPCState *env)
{
#ifdef HOST_WORDS_BIGENDIAN
- return false;
+ return msr_le;
#else
- return true;
+ return !msr_le;
#endif
}
@@ -8800,14 +8800,18 @@ static int gdb_get_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
stq_p(mem_buf, env->avr[n].u64[1]);
stq_p(mem_buf+8, env->avr[n].u64[0]);
}
+ ppc_maybe_bswap_register(env, mem_buf, 8);
+ ppc_maybe_bswap_register(env, mem_buf + 8, 8);
return 16;
}
if (n == 32) {
stl_p(mem_buf, env->vscr);
+ ppc_maybe_bswap_register(env, mem_buf, 4);
return 4;
}
if (n == 33) {
stl_p(mem_buf, (uint32_t)env->spr[SPR_VRSAVE]);
+ ppc_maybe_bswap_register(env, mem_buf, 4);
return 4;
}
return 0;
@@ -8816,6 +8820,8 @@ static int gdb_get_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
static int gdb_set_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
{
if (n < 32) {
+ ppc_maybe_bswap_register(env, mem_buf, 8);
+ ppc_maybe_bswap_register(env, mem_buf + 8, 8);
if (!avr_need_swap(env)) {
env->avr[n].u64[0] = ldq_p(mem_buf);
env->avr[n].u64[1] = ldq_p(mem_buf+8);
@@ -8826,10 +8832,12 @@ static int gdb_set_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n)
return 16;
}
if (n == 32) {
+ ppc_maybe_bswap_register(env, mem_buf, 4);
env->vscr = ldl_p(mem_buf);
return 4;
}
if (n == 33) {
+ ppc_maybe_bswap_register(env, mem_buf, 4);
env->spr[SPR_VRSAVE] = (target_ulong)ldl_p(mem_buf);
return 4;
}
next prev parent reply other threads:[~2015-12-18 10:19 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-18 10:18 [Qemu-devel] [PATCH 0/7] target-ppc: endian fixes for KVM and gdbstub Greg Kurz
2015-12-18 10:18 ` [Qemu-devel] [PATCH 1/7] target-ppc: kvm: fix floating point registers sync on little-endian hosts Greg Kurz
2015-12-18 10:18 ` [Qemu-devel] [PATCH 2/7] target-ppc: rename and export maybe_bswap_register() Greg Kurz
2015-12-18 10:18 ` [Qemu-devel] [PATCH 3/7] target-ppc: gdbstub: fix float registers for little-endian guests Greg Kurz
2015-12-18 10:18 ` [Qemu-devel] [PATCH 4/7] target-ppc: gdbstub: introduce avr_need_swap() Greg Kurz
2015-12-18 10:19 ` Greg Kurz [this message]
2015-12-18 10:19 ` [Qemu-devel] [PATCH 6/7] target-ppc: gdbstub: fix spe registers for little-endian guests Greg Kurz
2015-12-18 10:19 ` [Qemu-devel] [PATCH 7/7] target-ppc: gdbstub: Add VSX support Greg Kurz
2016-01-04 9:17 ` [Qemu-devel] [PATCH 0/7] target-ppc: endian fixes for KVM and gdbstub Greg Kurz
2016-01-15 15:00 [Qemu-devel] [PATCH 0/7] target-ppc: gdbstub: endiannes fixes and VSX support Greg Kurz
2016-01-15 15:00 ` [Qemu-devel] [PATCH 5/7] target-ppc: gdbstub: fix altivec registers for little-endian guests Greg Kurz
2016-01-18 2:25 ` David Gibson
2016-01-19 9:59 ` Greg Kurz
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