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From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 4/4] arm: socfpga: Enable SPL_DM_SEQ_ALIAS for all SOCFPGA configs
Date: Wed, 6 Jan 2016 16:23:43 +0100	[thread overview]
Message-ID: <201601061623.44007.marex@denx.de> (raw)
In-Reply-To: <1452088993-30952-5-git-send-email-nathan@nathanrossi.com>

On Wednesday, January 06, 2016 at 03:03:13 PM, Nathan Rossi wrote:
> This feature is required in SPL to enable support for loading from SPI
> flash.
> 
> Also clean up the #define in socfpga_common.h.
> 
> Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Chin-Liang See <clsee@altera.com>
> Cc: Marek Vasut <marex@denx.de>
> Cc: Stefan Roese <sr@denx.de>
> ---
> v2: Added this patch
> ---
>  configs/socfpga_arria5_defconfig       | 1 +
>  configs/socfpga_cyclone5_defconfig     | 1 +
>  configs/socfpga_de0_nano_soc_defconfig | 1 +

de0nano board has no SPI flash

>  configs/socfpga_mcvevk_defconfig       | 1 +

mcvevk board has no SPI flash

>  configs/socfpga_sockit_defconfig       | 1 +
>  configs/socfpga_socrates_defconfig     | 1 +
>  configs/socfpga_sr1500_defconfig       | 1 +

I am not sure about this one, Stefan ?

>  include/configs/socfpga_common.h       | 1 -
>  8 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/configs/socfpga_arria5_defconfig
> b/configs/socfpga_arria5_defconfig index 68d12df..6e8976f 100644
> --- a/configs/socfpga_arria5_defconfig
> +++ b/configs/socfpga_arria5_defconfig
> @@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
>  CONFIG_SPL_STACK_R_ADDR=0x00800000
>  CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk"
>  CONFIG_SPL=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_SPL_STACK_R=y
>  # CONFIG_CMD_IMLS is not set
>  # CONFIG_CMD_FLASH is not set
> diff --git a/configs/socfpga_cyclone5_defconfig
> b/configs/socfpga_cyclone5_defconfig index accee92..e31aa71 100644
> --- a/configs/socfpga_cyclone5_defconfig
> +++ b/configs/socfpga_cyclone5_defconfig
> @@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
>  CONFIG_SPL_STACK_R_ADDR=0x00800000
>  CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk"
>  CONFIG_SPL=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_SPL_STACK_R=y
>  # CONFIG_CMD_IMLS is not set
>  # CONFIG_CMD_FLASH is not set
> diff --git a/configs/socfpga_de0_nano_soc_defconfig
> b/configs/socfpga_de0_nano_soc_defconfig index 65c1197..3a29238 100644
> --- a/configs/socfpga_de0_nano_soc_defconfig
> +++ b/configs/socfpga_de0_nano_soc_defconfig
> @@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
>  CONFIG_SPL_STACK_R_ADDR=0x00800000
>  CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc"
>  CONFIG_SPL=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_SPL_STACK_R=y
>  # CONFIG_CMD_IMLS is not set
>  # CONFIG_CMD_FLASH is not set
> diff --git a/configs/socfpga_mcvevk_defconfig
> b/configs/socfpga_mcvevk_defconfig index c98d4a1..61cee08 100644
> --- a/configs/socfpga_mcvevk_defconfig
> +++ b/configs/socfpga_mcvevk_defconfig
> @@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_DENX_MCVEVK=y
>  CONFIG_SPL_STACK_R_ADDR=0x00800000
>  CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk"
>  CONFIG_SPL=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_SPL_STACK_R=y
>  # CONFIG_CMD_IMLS is not set
>  # CONFIG_CMD_FLASH is not set
> diff --git a/configs/socfpga_sockit_defconfig
> b/configs/socfpga_sockit_defconfig index b4f41a9..59fbb2c 100644
> --- a/configs/socfpga_sockit_defconfig
> +++ b/configs/socfpga_sockit_defconfig
> @@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
>  CONFIG_SPL_STACK_R_ADDR=0x00800000
>  CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit"
>  CONFIG_SPL=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_SPL_STACK_R=y
>  # CONFIG_CMD_IMLS is not set
>  # CONFIG_CMD_FLASH is not set
> diff --git a/configs/socfpga_socrates_defconfig
> b/configs/socfpga_socrates_defconfig index fe940f9..aaba8cb 100644
> --- a/configs/socfpga_socrates_defconfig
> +++ b/configs/socfpga_socrates_defconfig
> @@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y
>  CONFIG_SPL_STACK_R_ADDR=0x00800000
>  CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates"
>  CONFIG_SPL=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_SPL_STACK_R=y
>  # CONFIG_CMD_IMLS is not set
>  # CONFIG_CMD_FLASH is not set
> diff --git a/configs/socfpga_sr1500_defconfig
> b/configs/socfpga_sr1500_defconfig index 3d98a63..a4f0835 100644
> --- a/configs/socfpga_sr1500_defconfig
> +++ b/configs/socfpga_sr1500_defconfig
> @@ -6,6 +6,7 @@ CONFIG_DM_GPIO=y
>  CONFIG_TARGET_SOCFPGA_SR1500=y
>  CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
>  CONFIG_SPL=y
> +CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_SPL_STACK_R=y
>  CONFIG_SPL_STACK_R_ADDR=0x00800000
>  # CONFIG_CMD_IMLS is not set
> diff --git a/include/configs/socfpga_common.h
> b/include/configs/socfpga_common.h index a09e906..8de0ab9 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -370,7 +370,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
> 
>  /* SPL QSPI boot support */
>  #ifdef CONFIG_SPL_SPI_SUPPORT
> -#define CONFIG_DM_SEQ_ALIAS		1
>  #define CONFIG_SPL_SPI_FLASH_SUPPORT
>  #define CONFIG_SPL_SPI_LOAD
>  #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x40000

  reply	other threads:[~2016-01-06 15:23 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-06 14:03 [U-Boot] [PATCH v2 0/4] Change DM_SEQ_ALIAS to be configurable for SPL Nathan Rossi
2016-01-06 14:03 ` [U-Boot] [PATCH v2 1/4] spl: dm: Add SPL_DM_SEQ_ALIAS config option Nathan Rossi
2016-01-06 14:03 ` [U-Boot] [PATCH v2 2/4] arm: zynq: Enable SPL_DM_SEQ_ALIAS for all Zynq configs Nathan Rossi
2016-01-06 14:03 ` [U-Boot] [PATCH v2 3/4] arm: mvebu: Select SPL_DM_SEQ_ALIAS Nathan Rossi
2016-01-06 15:32   ` Stefan Roese
2016-01-06 14:03 ` [U-Boot] [PATCH v2 4/4] arm: socfpga: Enable SPL_DM_SEQ_ALIAS for all SOCFPGA configs Nathan Rossi
2016-01-06 15:23   ` Marek Vasut [this message]
2016-01-06 15:32     ` Stefan Roese

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