From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932303AbcAYOYV (ORCPT ); Mon, 25 Jan 2016 09:24:21 -0500 Received: from mail-wm0-f43.google.com ([74.125.82.43]:34832 "EHLO mail-wm0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755517AbcAYOYS (ORCPT ); Mon, 25 Jan 2016 09:24:18 -0500 Date: Mon, 25 Jan 2016 14:24:13 +0000 From: Lee Jones To: Qipeng Zha Cc: linux-kernel@vger.kernel.org, Huiquan Zhong Subject: Re: [PATCH] mfd: lpss: Add PCI IDs for Intel Broxton B-Step platform Message-ID: <20160125142413.GQ3368@x1> References: <1452787951-69808-1-git-send-email-qipeng.zha@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1452787951-69808-1-git-send-email-qipeng.zha@intel.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 15 Jan 2016, Qipeng Zha wrote: > From: Huiquan Zhong > > Add PCI IDs for Intel Broxton B-Step platform, which have same > LPSS devices with A-Step. > > Signed-off-by: Huiquan Zhong > Signed-off-by: Qipeng Zha > --- > drivers/mfd/intel-lpss-pci.c | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) Applied, thanks. > diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c > index 5bfdfcc..b780d28 100644 > --- a/drivers/mfd/intel-lpss-pci.c > +++ b/drivers/mfd/intel-lpss-pci.c > @@ -84,7 +84,7 @@ static const struct intel_lpss_platform_info bxt_i2c_info = { > }; > > static const struct pci_device_id intel_lpss_pci_ids[] = { > - /* BXT */ > + /* BXT A-Step */ > { PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info }, > { PCI_VDEVICE(INTEL, 0x0aae), (kernel_ulong_t)&bxt_i2c_info }, > { PCI_VDEVICE(INTEL, 0x0ab0), (kernel_ulong_t)&bxt_i2c_info }, > @@ -100,6 +100,23 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { > { PCI_VDEVICE(INTEL, 0x0ac4), (kernel_ulong_t)&bxt_info }, > { PCI_VDEVICE(INTEL, 0x0ac6), (kernel_ulong_t)&bxt_info }, > { PCI_VDEVICE(INTEL, 0x0aee), (kernel_ulong_t)&bxt_uart_info }, > + /* BXT B-Step */ > + { PCI_VDEVICE(INTEL, 0x1aac), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x1aae), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x1ab0), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x1ab2), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x1ab4), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x1ab6), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x1ab8), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x1aba), (kernel_ulong_t)&bxt_i2c_info }, > + { PCI_VDEVICE(INTEL, 0x1abc), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x1abe), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x1ac0), (kernel_ulong_t)&bxt_uart_info }, > + { PCI_VDEVICE(INTEL, 0x1ac2), (kernel_ulong_t)&bxt_info }, > + { PCI_VDEVICE(INTEL, 0x1ac4), (kernel_ulong_t)&bxt_info }, > + { PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_info }, > + { PCI_VDEVICE(INTEL, 0x1aee), (kernel_ulong_t)&bxt_uart_info }, > + > /* APL */ > { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&bxt_i2c_info }, > { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&bxt_i2c_info }, -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog