From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Mon, 1 Feb 2016 22:45:58 +0100 Subject: [U-Boot] [PATCH 1/5] mips: cache: Bulletproof the code against cornercases In-Reply-To: References: <1453860843-5835-1-git-send-email-marex@denx.de> <201602012231.21908.marex@denx.de> Message-ID: <201602012245.58749.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Monday, February 01, 2016 at 10:40:26 PM, Daniel Schwierzeck wrote: > 2016-02-01 22:31 GMT+01:00 Marek Vasut : > > On Monday, February 01, 2016 at 10:29:51 PM, Daniel Schwierzeck wrote: > >> 2016-01-27 3:13 GMT+01:00 Marek Vasut : > >> > This patch makes sure that the flush/invalidate_dcache_range() > >> > functions can handle corner-case calls like this -- > >> > invalidate_dcache_range(0, 0, 0); This call is valid and is happily > >> > produced by USB EHCI code for example. The expected behavior of the > >> > cache function(s) in this case is that they will do no operation, > >> > since the size is zero. > >> > > >> > The current implementation though has a problem where such invocation > >> > will result in a hard CPU hang. This is because under such conditions, > >> > where the start_addr = 0 and stop = 0, the addr = 0 and aend = > >> > 0xffffffe0 . The loop will then try to iterate over the entire address > >> > space, which in itself is wrong. But iterating over the entire address > >> > space might also hit some odd address which will cause bus hang. The > >> > later happens on the Atheros MIPS. > >> > > >> > Signed-off-by: Marek Vasut > >> > Cc: Daniel Schwierzeck > >> > Cc: Hans de Goede > >> > --- > >> > > >> > arch/mips/lib/cache.c | 8 ++++++++ > >> > 1 file changed, 8 insertions(+) > >> > >> applied to u-boot-mips, thanks > > > > Thanks! I'll pick the remaining four, ok ? > > fine with me. I don't want to break USB ;) ;-) Best regards, Marek Vasut