From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mark Brown Subject: Re: [PATCH v4] regulator: qcom-saw: Add support for SAW regulators Date: Wed, 10 Feb 2016 18:54:33 +0000 Message-ID: <20160210185433.GC13270@sirena.org.uk> References: <1455023549-30836-1-git-send-email-georgi.djakov@linaro.org> <20160209222154.GB1646@linaro.org> <20160210101340.GU13270@sirena.org.uk> <20160210164223.GC1646@linaro.org> Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="TMTfqzsZeEKgETVO" Return-path: Received: from mezzanine.sirena.org.uk ([106.187.55.193]:44846 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752655AbcBJSyk (ORCPT ); Wed, 10 Feb 2016 13:54:40 -0500 Content-Disposition: inline In-Reply-To: <20160210164223.GC1646@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: Lina Iyer Cc: Georgi Djakov , lgirdwood@gmail.com, andy.gross@linaro.org, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org --TMTfqzsZeEKgETVO Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Feb 10, 2016 at 09:42:23AM -0700, Lina Iyer wrote: > The offsets are the simple part. On other QCOM SoCs the voltage is > regulated by the SAW attached to the L2 cache controller. They have a > single rail that supplies power to all the cores and the L2, with > ability to change the number of phases to match the load. This driver > supports 8064 which has individual CPU rails, while the rest of the QCOM > SoC's share a common rail design. That doesn't seem at all hard to handle, the regulator framework is intended to cope with regulators with multiple consumers since it's the common case. --TMTfqzsZeEKgETVO Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQEcBAEBCAAGBQJWu4dnAAoJECTWi3JdVIfQ/cUH/jCSiAeUtHVqhXP0CazQUwJb SFq5s4p9spFLURyvi849InWm1rGhr9x1AcnOetDOuDW+lOc46FeVxBFStQiCWb8j l+pnlca5TzmEyMoo42kVr+MUi8TO9UKZpUUi9qHco+K0SNrk74GRIWbu5YlElc9y kfjLBMMPlYj3lJEc5wWlnlwzNhzemKKfbZ9NOLot291FlTq17mwcXStsswNAyGTt 87cNiQ3PAR5ngDbt8dD0bZr4KnIP1lA9/ae+pO9vyxlHOXYDE3Pd/4Jip07hxgSX QWgjmDDR2k734Fr5GsW586I79IaASoKvKNIPDWvzHWTMyhosOE7pm7GF6R5JGeM= =lv47 -----END PGP SIGNATURE----- --TMTfqzsZeEKgETVO--