From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751570AbcBKRAD (ORCPT ); Thu, 11 Feb 2016 12:00:03 -0500 Received: from mail-wm0-f52.google.com ([74.125.82.52]:38129 "EHLO mail-wm0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751056AbcBKQ7l (ORCPT ); Thu, 11 Feb 2016 11:59:41 -0500 Date: Thu, 11 Feb 2016 16:59:35 +0000 From: Lee Jones To: Chen Feng Cc: kong.kongxinwei@hisilicon.com, w.f@huawei.com, linux-kernel@vger.kernel.org, lgirdwood@gmail.com, broonie@kernel.org, yudongbin@hisilicon.com, saberlily.xia@hisilicon.com, suzhuangluan@hisilicon.com, xuyiping@hisilicon.com, z.liuxinliang@hisilicon.com, puck.chenfeng@gmail.com, weidong2@hisilicon.com, puck.chen@foxmail.com, qijiwen@hisilicon.com, peter.panshilin@hisilicon.com, dan.zhao@hisilicon.com, linuxarm@huawei.com, haojian.zhuang@linaro.org Subject: Re: [RESEND v7 1/5] mfd: hi655x: Add document for mfd hi665x PMIC Message-ID: <20160211165935.GD20693@x1> References: <1454318166-106971-1-git-send-email-puck.chen@hisilicon.com> <1454318166-106971-2-git-send-email-puck.chen@hisilicon.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1454318166-106971-2-git-send-email-puck.chen@hisilicon.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 01 Feb 2016, Chen Feng wrote: > DT bindings for hisilicon hi655x MFD PMIC chip. > > Signed-off-by: Chen Feng > Signed-off-by: Fei Wang > Signed-off-by: Xinwei Kong > Reviewed-by: Haojian Zhuang > --- > .../devicetree/bindings/mfd/hisilicon,hi655x.txt | 27 ++++++++++++++++++++++ > 1 file changed, 27 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt > > diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt > new file mode 100644 > index 0000000..5edc310 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi655x.txt > @@ -0,0 +1,27 @@ > +Hisilicon hi655x Power Management Integrated Circuit (PMIC) > + > +The hardware layout for access PMIC Hi655x from AP SoC Hi6220. > +Between PMIC Hi655x and Hi6220, the physical signal channel is SSI. > +We can use memory-mapped I/O to communicate. > + > ++----------------+ +-------------+ > +| | | | > +| Hi6220 | SSI bus | Hi655x | > +| |-------------| | > +| |(REGMAP_MMIO)| | > ++----------------+ +-------------+ > + > +Required properties: > +- compatible: Should be "hisilicon,hi655x-pmic" > +- reg: Base address of PMIC on hi6220 soc s/hi6220 soc/Hi6220 SoC/ > +- interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). > +- pmic-gpios: The gpio used by PMIC irq. s/gpio/GPIO/ s/irq/IRQ/ These are always easier to read in this format: - compatible: Should be "hisilicon,hi655x-pmic" - reg: Base address of PMIC on hi6220 soc - interrupt-controller: Hi655x has internal IRQs (has own IRQ domain). - pmic-gpios: The gpio used by PMIC irq. > +Example: > + pmic: pmic@f8000000 { > + compatible = "hisilicon,hi655x-pmic"; > + reg = <0x0 0xf8000000 0x0 0x1000>; > + interrupt-controller; > + #interrupt-cells = <2>; > + pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; > + } -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog