From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39987) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aZ9Qa-0007aN-U2 for qemu-devel@nongnu.org; Thu, 25 Feb 2016 22:50:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aZ9QX-0007nZ-JA for qemu-devel@nongnu.org; Thu, 25 Feb 2016 22:50:52 -0500 Date: Fri, 26 Feb 2016 14:51:41 +1100 From: David Gibson Message-ID: <20160226035141.GG20657@voom.fritz.box> References: <1456417362-20652-1-git-send-email-bharata@linux.vnet.ibm.com> <1456417362-20652-5-git-send-email-bharata@linux.vnet.ibm.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="2E/hm+v6kSLEYT3h" Content-Disposition: inline In-Reply-To: <1456417362-20652-5-git-send-email-bharata@linux.vnet.ibm.com> Subject: Re: [Qemu-devel] [RFC PATCH v0 4/6] spapr: CPU hotplug support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Bharata B Rao Cc: mjrosato@linux.vnet.ibm.com, agraf@suse.de, thuth@redhat.com, pkrempa@redhat.com, ehabkost@redhat.com, aik@ozlabs.ru, qemu-devel@nongnu.org, armbru@redhat.com, borntraeger@de.ibm.com, qemu-ppc@nongnu.org, pbonzini@redhat.com, imammedo@redhat.com, afaerber@suse.de, mdroth@linux.vnet.ibm.com --2E/hm+v6kSLEYT3h Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Feb 25, 2016 at 09:52:40PM +0530, Bharata B Rao wrote: > Set up device tree entries for the hotplugged CPU core and use the > exising EPOW event infrastructure to send CPU hotplug notification to > the guest. >=20 > Signed-off-by: Bharata B Rao > --- > hw/ppc/spapr.c | 136 +++++++++++++++++++++++++++++++++++++++++++= +++++- > hw/ppc/spapr_events.c | 3 ++ > hw/ppc/spapr_rtas.c | 24 +++++++++ > include/hw/ppc/spapr.h | 1 + > 4 files changed, 163 insertions(+), 1 deletion(-) >=20 > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c > index 1f0d232..780cd00 100644 > --- a/hw/ppc/spapr.c > +++ b/hw/ppc/spapr.c > @@ -603,6 +603,18 @@ static void spapr_populate_cpu_dt(CPUState *cs, void= *fdt, int offset, > size_t page_sizes_prop_size; > uint32_t vcpus_per_socket =3D smp_threads * smp_cores; > uint32_t pft_size_prop[] =3D {0, cpu_to_be32(spapr->htab_shift)}; > + sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(qdev_get_machine(= )); > + sPAPRDRConnector *drc; > + sPAPRDRConnectorClass *drck; > + int drc_index; > + > + if (smc->dr_cpu_enabled) { > + drc =3D spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, in= dex); > + g_assert(drc); > + drck =3D SPAPR_DR_CONNECTOR_GET_CLASS(drc); > + drc_index =3D drck->get_index(drc); > + _FDT((fdt_setprop_cell(fdt, offset, "ibm,my-drc-index", drc_inde= x))); > + } > =20 > /* Note: we keep CI large pages off for now because a 64K capable gu= est > * provisioned with large pages might otherwise try to map a qemu > @@ -987,6 +999,16 @@ static void spapr_finalize_fdt(sPAPRMachineState *sp= apr, > _FDT(spapr_drc_populate_dt(fdt, 0, NULL, SPAPR_DR_CONNECTOR_TYPE= _LMB)); > } > =20 > + if (smc->dr_cpu_enabled) { > + int offset =3D fdt_path_offset(fdt, "/cpus"); > + ret =3D spapr_drc_populate_dt(fdt, offset, NULL, > + SPAPR_DR_CONNECTOR_TYPE_CPU); > + if (ret < 0) { > + fprintf(stderr, "Couldn't set up CPU DR device tree properti= es\n"); > + exit(1); > + } > + } > + > _FDT((fdt_pack(fdt))); > =20 > if (fdt_totalsize(fdt) > FDT_MAX_SIZE) { > @@ -1759,6 +1781,7 @@ static void ppc_spapr_init(MachineState *machine) > char *filename; > int spapr_cores =3D smp_cpus / smp_threads; > int spapr_max_cores =3D max_cpus / smp_threads; > + int smt =3D kvmppc_smt_threads(); > =20 > msi_supported =3D true; > =20 > @@ -1813,6 +1836,15 @@ static void ppc_spapr_init(MachineState *machine) > spapr_validate_node_memory(machine, &error_fatal); > } > =20 > + if (smc->dr_cpu_enabled) { > + for (i =3D 0; i < spapr_max_cores; i++) { > + sPAPRDRConnector *drc =3D > + spapr_dr_connector_new(OBJECT(spapr), > + SPAPR_DR_CONNECTOR_TYPE_CPU, i * = smt); > + qemu_register_reset(spapr_drc_reset, drc); > + } > + } > + > /* init CPUs */ > if (machine->cpu_model =3D=3D NULL) { > machine->cpu_model =3D kvm_enabled() ? "host" : "POWER7"; > @@ -2247,6 +2279,88 @@ out: > error_propagate(errp, local_err); > } > =20 > +static void *spapr_populate_hotplug_cpu_dt(DeviceState *dev, CPUState *c= s, > + int *fdt_offset, > + sPAPRMachineState *spapr) > +{ > + PowerPCCPU *cpu =3D POWERPC_CPU(cs); > + DeviceClass *dc =3D DEVICE_GET_CLASS(cs); > + int id =3D ppc_get_vcpu_dt_id(cpu); > + void *fdt; > + int offset, fdt_size; > + char *nodename; > + > + fdt =3D create_device_tree(&fdt_size); > + nodename =3D g_strdup_printf("%s@%x", dc->fw_name, id); > + offset =3D fdt_add_subnode(fdt, 0, nodename); > + > + spapr_populate_cpu_dt(cs, fdt, offset, spapr); > + g_free(nodename); > + > + *fdt_offset =3D offset; > + return fdt; > +} > + > +static void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *de= v, > + Error **errp) > +{ > + sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(qdev_get_machine(= )); > + sPAPRMachineState *ms =3D SPAPR_MACHINE(qdev_get_machine()); > + sPAPRCPUCore *core =3D SPAPR_CPU_CORE(OBJECT(dev)); > + PowerPCCPU *cpu =3D &core->threads[0]; > + CPUState *cs =3D CPU(cpu); > + int id =3D ppc_get_vcpu_dt_id(cpu); > + sPAPRDRConnector *drc =3D > + spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, id); > + sPAPRDRConnectorClass *drck; > + Error *local_err =3D NULL; > + void *fdt =3D NULL; > + int fdt_offset =3D 0; > + > + if (!smc->dr_cpu_enabled) { > + /* > + * This is a cold plugged CPU core but the machine doesn't suppo= rt > + * DR. So skip the hotplug path ensuring that the core is brought > + * up online with out an associated DR connector. > + */ > + return; > + } > + > + g_assert(drc); > + > + /* > + * Setup CPU DT entries only for hotplugged CPUs. For boot time or > + * coldplugged CPUs DT entries are setup in spapr_finalize_fdt(). > + */ > + if (dev->hotplugged) { > + fdt =3D spapr_populate_hotplug_cpu_dt(dev, cs, &fdt_offset, ms); > + dev->hotplugged =3D true; > + } > + > + drck =3D SPAPR_DR_CONNECTOR_GET_CLASS(drc); > + drck->attach(drc, dev, fdt, fdt_offset, !dev->hotplugged, &local_err= ); > + if (local_err) { > + g_free(fdt); > + error_propagate(errp, local_err); > + return; > + } > + > + if (dev->hotplugged) { > + /* > + * Send hotplug notification interrupt to the guest only in case > + * of hotplugged CPUs. > + */ > + spapr_hotplug_req_add_by_index(drc); > + } else { > + /* > + * Set the right DRC states for cold plugged CPU. > + */ > + drck->set_allocation_state(drc, SPAPR_DR_ALLOCATION_STATE_USABLE= ); > + drck->set_isolation_state(drc, SPAPR_DR_ISOLATION_STATE_UNISOLAT= ED); > + } > + return; > +} > + > static void spapr_machine_device_plug(HotplugHandler *hotplug_dev, > DeviceState *dev, Error **errp) > { > @@ -2291,8 +2405,25 @@ static void spapr_machine_device_plug(HotplugHandl= er *hotplug_dev, > } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { > CPUState *cs =3D CPU(dev); > PowerPCCPU *cpu =3D POWERPC_CPU(cs); > + int i; > + > + if (!smc->dr_cpu_enabled && dev->hotplugged) { > + error_setg(errp, "CPU hotplug not supported for this machine= "); > + return; > + } > + > + /* Set NUMA node for the added CPUs */ > + for (i =3D 0; i < nb_numa_nodes; i++) { > + if (test_bit(cs->cpu_index, numa_info[i].node_cpu)) { > + cs->numa_node =3D i; > + break; > + } > + } > =20 > spapr_cpu_init(ms, cpu, errp); > + spapr_cpu_reset(cpu); It looks to me like all of this setup should be either in the last patch, or in this one, not split between them. > + } else if (object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) { > + spapr_core_plug(hotplug_dev, dev, errp); > } > } > =20 > @@ -2308,7 +2439,8 @@ static HotplugHandler *spapr_get_hotpug_handler(Mac= hineState *machine, > DeviceState *dev) > { > if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) || > - object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { > + object_dynamic_cast(OBJECT(dev), TYPE_CPU) || > + object_dynamic_cast(OBJECT(dev), TYPE_SPAPR_CPU_CORE)) { > return HOTPLUG_HANDLER(machine); > } > return NULL; > @@ -2352,6 +2484,7 @@ static void spapr_machine_class_init(ObjectClass *o= c, void *data) > mc->cpu_index_to_socket_id =3D spapr_cpu_index_to_socket_id; > =20 > smc->dr_lmb_enabled =3D true; > + smc->dr_cpu_enabled =3D true; > fwc->get_dev_path =3D spapr_get_fw_dev_path; > nc->nmi_monitor_handler =3D spapr_nmi; > } > @@ -2431,6 +2564,7 @@ static void spapr_machine_2_5_class_options(Machine= Class *mc) > =20 > spapr_machine_2_6_class_options(mc); > smc->use_ohci_by_default =3D true; > + smc->dr_cpu_enabled =3D false; > SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_5); > } > =20 > diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c > index f5eac4b..e50bb16 100644 > --- a/hw/ppc/spapr_events.c > +++ b/hw/ppc/spapr_events.c > @@ -437,6 +437,9 @@ static void spapr_hotplug_req_event(uint8_t hp_id, ui= nt8_t hp_action, > case SPAPR_DR_CONNECTOR_TYPE_LMB: > hp->hotplug_type =3D RTAS_LOG_V6_HP_TYPE_MEMORY; > break; > + case SPAPR_DR_CONNECTOR_TYPE_CPU: > + hp->hotplug_type =3D RTAS_LOG_V6_HP_TYPE_CPU; > + break; > default: > /* we shouldn't be signaling hotplug events for resources > * that don't support them > diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c > index b7c5ebd..cc0369e 100644 > --- a/hw/ppc/spapr_rtas.c > +++ b/hw/ppc/spapr_rtas.c > @@ -34,6 +34,7 @@ > =20 > #include "hw/ppc/spapr.h" > #include "hw/ppc/spapr_vio.h" > +#include "hw/ppc/ppc.h" > #include "qapi-event.h" > #include "hw/boards.h" > =20 > @@ -161,6 +162,27 @@ static void rtas_query_cpu_stopped_state(PowerPCCPU = *cpu_, > rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); > } > =20 > +/* > + * Set the timebase offset of the CPU to that of first CPU. > + * This helps hotplugged CPU to have the correct timebase offset. > + */ > +static void spapr_cpu_update_tb_offset(PowerPCCPU *cpu) > +{ > + PowerPCCPU *fcpu =3D POWERPC_CPU(first_cpu); > + > + cpu->env.tb_env->tb_offset =3D fcpu->env.tb_env->tb_offset; > +} > + > +static void spapr_cpu_set_endianness(PowerPCCPU *cpu) > +{ > + PowerPCCPU *fcpu =3D POWERPC_CPU(first_cpu); > + PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(fcpu); > + > + if (!pcc->interrupts_big_endian(fcpu)) { > + cpu->env.spr[SPR_LPCR] |=3D LPCR_ILE; > + } > +} > + Any particular reason for doing these things at rtas_start_cpu() time, but other initialization at plug time? Could you consolidate it to one place or the other? > static void rtas_start_cpu(PowerPCCPU *cpu_, sPAPRMachineState *spapr, > uint32_t token, uint32_t nargs, > target_ulong args, > @@ -197,6 +219,8 @@ static void rtas_start_cpu(PowerPCCPU *cpu_, sPAPRMac= hineState *spapr, > env->nip =3D start; > env->gpr[3] =3D r3; > cs->halted =3D 0; > + spapr_cpu_set_endianness(cpu); > + spapr_cpu_update_tb_offset(cpu); > =20 > qemu_cpu_kick(cs); > =20 > diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h > index 20b3417..eb4ccd1 100644 > --- a/include/hw/ppc/spapr.h > +++ b/include/hw/ppc/spapr.h > @@ -36,6 +36,7 @@ struct sPAPRMachineClass { > =20 > /*< public >*/ > bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMB= s */ > + bool dr_cpu_enabled; /* enable dynamic-reconfig/hotplug of CPU= s */ > bool use_ohci_by_default; /* use USB-OHCI instead of XHCI */ > }; > =20 --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --2E/hm+v6kSLEYT3h Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJWz8vNAAoJEGw4ysog2bOS/KEP/iYQg5yB8R4t6mIgwTehAzlJ 1de0ETXwL6Gu5t7bEPCsXCBtbjLOYeJZfed/1F0/nysyjuFJ4MjdH56Zv30TL8Vp SuFa68bx/cgaiPp3LecQQNH9FiJBLJWEpMOIO1kneSSH8bFBKDuKY4Mt5g3AwdLw WbXtJNqZT+NZAiF7klh/Ysgy5VmUYXg+OSCbNxigpt5i+lGIS1iBE7w1VtoxJQoD 69Nt4r8QfAemQ3DolHFBdZKRGXrCTVNCtY9RGSRI9LCqKTIHnOOoiO8ShQRFXgMP Qieh5IFCQk0t/L6nc3kfYzDvjVGRtoqgMelYm/EpxXkAnZhMV6nhyNv0bxiPro2L 3EMe1g0kl0MMEwXVIKXCT+RAK9/ZALc7I9SQhKU2q0pv1a3IPU+mgHme2Ewbip4x 3YaTSw8u9lr017oaXaXQNg+MxMvegVNvyTUKKBXgMtWVUO5/sWjAbzFpnSMOvL24 B/oIgf0lacKDCCplL/njnaFTyfjZtxdUHlHHNrmWzqmXgBc7xwd6Ljubn0xFP33e MjW5G4rhRwYV1ggDUzj1o4LnH+fzvVL1ZYC+KGWi5qqRNy1nxF8NC0bT48a+9U64 ogMRsCyoX1LftMtS3yt4jQsWaaqEOebgx83sJmmxRxT5XEN+Ep+n6pb1JgABMR+n rLMbNaqqVHz057rjHaRf =UnwK -----END PGP SIGNATURE----- --2E/hm+v6kSLEYT3h--