From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH v2] drm/i915: Adjust size of PIPE_CONTROL used for gen8 render seqno write Date: Tue, 15 Mar 2016 10:01:22 +0000 Message-ID: <20160315100121.GU14143@nuc-i3427.alporthouse.com> References: <1457979896-7967-1-git-send-email-michal.winiarski@intel.com> <1458033609-28865-1-git-send-email-michal.winiarski@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from fireflyinternet.com (mail.fireflyinternet.com [87.106.93.118]) by gabe.freedesktop.org (Postfix) with ESMTP id 7F2976E1FE for ; Tue, 15 Mar 2016 10:01:26 +0000 (UTC) Content-Disposition: inline In-Reply-To: <1458033609-28865-1-git-send-email-michal.winiarski@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: =?utf-8?Q?Micha=C5=82?= Winiarski Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org T24gVHVlLCBNYXIgMTUsIDIwMTYgYXQgMTA6MjA6MDlBTSArMDEwMCwgTWljaGHFgiBXaW5pYXJz a2kgd3JvdGU6Cj4gT24gZ2VuOCsgc2l6ZSBvZiBQSVBFX0NPTlRST0wgd2l0aCBQb3N0IFN5bmMg T3BlcmF0aW9uIHNob3VsZCBiZSA2IGR3b3Jkcy4KCkJ1dCBnZW44L2dlbjkgc3RpbGwgcmVzcGVj dCA1IGZvciBhIGR3b3JkIHdyaXRlIGluc3RlYWQgb2YgYSBxd29yZCB3cml0ZS4KUGxlYXNlIGlu Y2x1ZGUgYW4gZXhwbGFuYXRpb24gb2YgdGhlIGltcGFjdC4KLUNocmlzCgotLSAKQ2hyaXMgV2ls c29uLCBJbnRlbCBPcGVuIFNvdXJjZSBUZWNobm9sb2d5IENlbnRyZQpfX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpJbnRlbC1nZnggbWFpbGluZyBsaXN0Cklu dGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5v cmcvbWFpbG1hbi9saXN0aW5mby9pbnRlbC1nZngK