From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55418) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aqFDG-0001Zo-8U for qemu-devel@nongnu.org; Wed, 13 Apr 2016 03:27:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aqFDC-0000wM-Qy for qemu-devel@nongnu.org; Wed, 13 Apr 2016 03:27:46 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45288) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aqFDC-0000wG-J0 for qemu-devel@nongnu.org; Wed, 13 Apr 2016 03:27:42 -0400 Date: Wed, 13 Apr 2016 15:27:37 +0800 From: Peter Xu Message-ID: <20160413072737.GE17558@pxdev.xzpeter.org> References: <1460366363-4589-1-git-send-email-peterx@redhat.com> <20160411152911-mutt-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20160411152911-mutt-send-email-mst@redhat.com> Subject: Re: [Qemu-devel] [PATCH v2 00/13] IOMMU: Enable interrupt remapping for Intel IOMMU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: qemu-devel@nongnu.org, imammedo@redhat.com, rth@twiddle.net, ehabkost@redhat.com, jasowang@redhat.com, marcel@redhat.com, pbonzini@redhat.com, jan.kiszka@web.de, rkrcmar@redhat.com On Mon, Apr 11, 2016 at 03:32:18PM +0300, Michael S. Tsirkin wrote: > On Mon, Apr 11, 2016 at 05:19:10PM +0800, Peter Xu wrote: > > v2 changes: > > - patch 1 > > - rename "int_remap" to "intr" in several places [Marcel] > > - remove "Intel" specific words in desc or commit message, prepare > > itself with further AMD support [Marcel] > > - avoid using object_property_get_bool() [Marcel] > > - patch 5 > > - use PCI bus number 0xff rather than 0xf0 for the IOAPIC scope > > definition. (please let me know if anyone knows how I can avoid > > user using PCI bus number 0xff... TIA) > > - patch 11 > > - fix comments [Marcel] > > - all > > - remove intr_supported variable [Marcel] > > > > This patchset provide very basic functionalities for interrupt > > remapping (IR) support of the emulated Intel IOMMU device. > > > > By default, IR is disabled to be better compatible with current > > QEMU. To enable IR, we can using the following command to boot a > > IR-supported VM with basic network (still do not support kvm-ioapic, > > so we need to specify kernel-irqchip=off here): > > > > $ qemu-system-x86_64 -M q35,iommu=on,intr=on,kernel-irqchip=off \ > > -enable-kvm -m 1024 -s \ > > -monitor telnet::3333,server,nowait \ > > -netdev user,id=user.0,hostfwd=tcp::5555-:22 \ > > -device virtio-net-pci,netdev=user.0 \ > > /var/lib/libvirt/images/vm1.qcow2 > > > > When guest boots, we can verify whether IR enabled by grepping the > > dmesg like: > > > > [root@localhost ~]# journalctl -k | grep "DMAR-IR" > > Feb 19 11:21:23 localhost.localdomain kernel: DMAR-IR: IOAPIC id 0 under DRHD base 0xfed90000 IOMMU 0 > > Feb 19 11:21:23 localhost.localdomain kernel: DMAR-IR: Enabled IRQ remapping in xapic mode > > > > Currently only two devices are supported: > > > > - Emulated IOAPIC device > > - PCI Devices > > > > TODO List: > > > > - kvm-ioapic support > > This is probably a must. I don't think we can merge this > as long as it breaks kvm. But kvm-ioapic might require modification to KVM as well. Do you think I should add kvm-ioapic into this series as well? Or can I first submit this part of work without kvm-ioapic (since this work is not related to KVM at all), then work on another one to support kvm-ioapic? > > > - vhost support > > dataplane as well? Do you mean irqfd here? Thanks. -- peterx > > > - pass through device support > > - EIM support > > - IR fault reporting > > - source-id validation for IRTE > > - IRTE cache and better queued invalidation > > - migration support (for IOMMU as general?) > > - more? > > > > Peter Xu (13): > > q35: add "int-remap" flag to enable intr > > acpi: enable INTR for DMAR report structure > > intel_iommu: allow queued invalidation for IR > > intel_iommu: set IR bit for ECAP register > > acpi: add DMAR scope definition for root IOAPIC > > intel_iommu: define interrupt remap table addr register > > intel_iommu: handle interrupt remap enable > > intel_iommu: define several structs for IOMMU IR > > intel_iommu: provide helper function vtd_get_iommu > > ioapic-common: add iommu for IOAPICCommonState > > intel_iommu: add IR translation faults defines > > intel_iommu: ioapic: IR support for emulated IOAPIC > > intel_iommu: Add support for PCI MSI remap > > > > hw/core/machine.c | 21 ++ > > hw/i386/acpi-build.c | 42 ++-- > > hw/i386/intel_iommu.c | 400 +++++++++++++++++++++++++++++++++++++- > > hw/i386/intel_iommu_internal.h | 23 +++ > > hw/intc/ioapic.c | 36 +++- > > hw/intc/ioapic_common.c | 2 + > > include/hw/acpi/acpi-defs.h | 15 ++ > > include/hw/boards.h | 1 + > > include/hw/i386/intel_iommu.h | 120 ++++++++++++ > > include/hw/i386/ioapic_internal.h | 3 + > > include/hw/pci/msi.h | 4 + > > 11 files changed, 647 insertions(+), 20 deletions(-) > > > > -- > > 2.4.3