From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46605) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1atYIS-0004g1-7d for qemu-devel@nongnu.org; Fri, 22 Apr 2016 06:26:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1atYIO-0006cv-PI for qemu-devel@nongnu.org; Fri, 22 Apr 2016 06:26:48 -0400 Received: from mail-wm0-x236.google.com ([2a00:1450:400c:c09::236]:37378) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1atYIO-0006c6-BY for qemu-devel@nongnu.org; Fri, 22 Apr 2016 06:26:44 -0400 Received: by mail-wm0-x236.google.com with SMTP id n3so19779362wmn.0 for ; Fri, 22 Apr 2016 03:26:44 -0700 (PDT) Date: Fri, 22 Apr 2016 12:26:52 +0200 From: Christoffer Dall Message-ID: <20160422102652.GC30824@cbox> References: <20160421162348.GA24178@cbox> <57192EED.2040501@suse.de> <20160422100118.GD25288@cbox> <5719F7BC.4090703@suse.de> <20160422101546.GB30824@cbox> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] Performance regression using KVM/ARM List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Alexander Graf , "Michael S. Tsirkin" , QEMU Developers , Marc Zyngier , Paolo Bonzini On Fri, Apr 22, 2016 at 11:17:47AM +0100, Peter Maydell wrote: > On 22 April 2016 at 11:15, Christoffer Dall wrote: > > Peter just pointed me to a change I remember doing for ARM, so perhaps > > this fix is the right one? > > > > > > diff --git a/util/oslib-posix.c b/util/oslib-posix.c > > index d25f671..a36e734 100644 > > --- a/util/oslib-posix.c > > +++ b/util/oslib-posix.c > > @@ -35,7 +35,7 @@ > > extern int daemon(int, int); > > #endif > > > > -#if defined(__linux__) && (defined(__x86_64__) || defined(__arm__)) > > +#if defined(__linux__) && (defined(__x86_64__) || defined(__arm__)) || defined(__aarch64__) > > /* Use 2 MiB alignment so transparent hugepages can be used by KVM. > > Valgrind does not support alignments larger than 1 MiB, > > therefore we need special code which handles running on Valgrind. */ > > I hadn't realised AArch64 didn't define __arm__. Your extra clause > wants to be inside the parens for the ||, not outside. > > So was the problem just that we weren't passing 2MB as the align > parameter to qemu_ram_mmap(), and if we do pass 2MB then it does the > right thing ? > Yes, that was essentially the problem. I'll send a proper patch. However, Marc pointed out, that we should probably think about improving on this in the future, because if you're running on a 64K page system and want huge pages, you have to align at a higher boundary, but I'm on the other hand not sure such a boundary is always practical on a 64K system. Which would suggest that we either need to: 1) Probe the kernel for the page size and always align to something that allows huge pages, or 2) Let the user specify an option that says it wants to be able to use THP and only then align to the huge page boundary. Not sure... -Christoffer