[PATCHv2 0/5] Support blending modes of display planes

[PATCHv2 0/5] Support blending modes of display planes

[Vandita Kulkarni]

From: vandita kulkarni <vandita.kulkarni@intel.com>

The below patches support plane and pixel blending
by adding two properties blend_func and blend_color.
As per Damien's initial patches, this design based on 
OpenGL's blend equations is suggested by Ville.
All the below patches are tested on BXT android platform.

V2: Squashed all the blend color related patches to one
single patch and blend func related pathces into one single
patch.

The initial kernel patches from damien can be found at
https://github.com/dlespiau/linux/commits/20150708-alpha-blending
Damien Lespiau (5):
  drm: Introduce the blend-func property
  drm/i915/skl: Add blend_func to SKL/BXT sprite planes
  drm: Introduce DRM_MODE_COLOR()
  drm: Add an blend_color property
  drm/i915/skl: Add support for blending modes

The initial version of kms_blend, igt by Damien
can be found at
https://github.com/dlespiau/intel-gpu-tools/commits/20150613-blend


Damien Lespiau (5):
  drm: Introduce the blend-func property
  drm/i915/skl: Add blend_func to SKL/BXT sprite planes
  drm: Introduce DRM_MODE_COLOR()
  drm: Add an blend_color property
  drm/i915/skl: Add support for blending modes

 Documentation/DocBook/gpu.tmpl       |  18 +++-
 drivers/gpu/drm/drm_atomic.c         |  18 ++++
 drivers/gpu/drm/drm_crtc.c           |  10 +++
 drivers/gpu/drm/i915/i915_reg.h      |   4 +
 drivers/gpu/drm/i915/intel_display.c | 168 +++++++++++++++++++++++++++++++++--
 drivers/gpu/drm/i915/intel_drv.h     |  17 +++-
 drivers/gpu/drm/i915/intel_sprite.c  |  15 +++-
 include/drm/drm_crtc.h               |  26 ++++++
 include/uapi/drm/drm_mode.h          |  34 +++++++
 9 files changed, 298 insertions(+), 12 deletions(-)

-- 
1.9.1

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[PATCHv2 1/5] drm: Introduce the blend-func property

[Vandita Kulkarni]

From: Damien Lespiau <damien.lespiau@intel.com>

We'd like to be able to program the blending modes of display planes.
Ville suggested to use something similar to the GL blend states, which
does seem like a good idea.

For now, we only consider blend factors, but room is left for
extensions: blend equation, separate rgb/alpha blend factors, blend
color.

V2: Added the belnd func property support in get property.

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
 Documentation/DocBook/gpu.tmpl | 11 +++++++++--
 drivers/gpu/drm/drm_atomic.c   | 14 ++++++++++++++
 drivers/gpu/drm/drm_crtc.c     |  5 +++++
 include/drm/drm_crtc.h         | 20 ++++++++++++++++++++
 4 files changed, 48 insertions(+), 2 deletions(-)

diff --git a/Documentation/DocBook/gpu.tmpl b/Documentation/DocBook/gpu.tmpl
index 1464fb2..f673989 100644
--- a/Documentation/DocBook/gpu.tmpl
+++ b/Documentation/DocBook/gpu.tmpl
@@ -1816,7 +1816,7 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >Description/Restrictions</td>
 	</tr>
 	<tr>
-	<td rowspan="42" valign="top" >DRM</td>
+	<td rowspan="43" valign="top" >DRM</td>
 	<td valign="top" >Generic</td>
 	<td valign="top" >“rotation”</td>
 	<td valign="top" >BITMASK</td>
@@ -1868,7 +1868,7 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >CRTC that connector is attached to (atomic)</td>
 	</tr>
 	<tr>
-	<td rowspan="11" valign="top" >Plane</td>
+	<td rowspan="12" valign="top" >Plane</td>
 	<td valign="top" >“type”</td>
 	<td valign="top" >ENUM | IMMUTABLE</td>
 	<td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
@@ -1946,6 +1946,13 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >CRTC that plane is attached to (atomic)</td>
 	</tr>
 	<tr>
+	<td valign="top" >“blend_func”</td>
+	<td valign="top" >None</td>
+	<td valign="top" >DRM_BLEND_FUNC()</td>
+	<td valign="top" >Plane</td>
+	<td valign="top" >Source and destination blending factors</td>
+	</tr>
+	<tr>
 	<td rowspan="2" valign="top" >DVI-I</td>
 	<td valign="top" >“subconnector”</td>
 	<td valign="top" >ENUM</td>
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 8ee1db8..c2ead2d 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -701,6 +701,18 @@ int drm_atomic_plane_set_property(struct drm_plane *plane,
 		state->src_h = val;
 	} else if (property == config->rotation_property) {
 		state->rotation = val;
+	} else if (property == config->prop_blend_func) {
+		enum drm_blend_factor src_factor, dst_factor;
+
+		src_factor = DRM_BLEND_FUNC_SRC_FACTOR(val);
+		dst_factor = DRM_BLEND_FUNC_DST_FACTOR(val);
+
+		if (src_factor != dst_factor &&
+			(src_factor == DRM_BLEND_FACTOR_AUTO ||
+			dst_factor == DRM_BLEND_FACTOR_AUTO))
+			return -EINVAL;
+
+		state->blend_mode.func = val & GENMASK(31, 0);
 	} else if (plane->funcs->atomic_set_property) {
 		return plane->funcs->atomic_set_property(plane, state,
 				property, val);
@@ -757,6 +769,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
 		*val = state->src_h;
 	} else if (property == config->rotation_property) {
 		*val = state->rotation;
+	} else if (property == config->prop_blend_func) {
+		*val = state->blend_mode.func;
 	} else if (plane->funcs->atomic_get_property) {
 		return plane->funcs->atomic_get_property(plane, state, property, val);
 	} else {
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index f7fe9e1..2cac5e1 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1587,6 +1587,11 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
 		return -ENOMEM;
 	dev->mode_config.gamma_lut_size_property = prop;
 
+	prop = drm_property_create_range(dev, 0, "blend_func", 0, U32_MAX);
+	if (!prop)
+		return -ENOMEM;
+	dev->mode_config.prop_blend_func = prop;
+
 	return 0;
 }
 
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 6d46842..269f660 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -89,6 +89,23 @@ static inline uint64_t I642U64(int64_t val)
 #define DRM_REFLECT_X	4
 #define DRM_REFLECT_Y	5
 
+enum drm_blend_factor {
+	DRM_BLEND_FACTOR_AUTO,
+	DRM_BLEND_FACTOR_ZERO,
+	DRM_BLEND_FACTOR_ONE,
+	DRM_BLEND_FACTOR_SRC_ALPHA,
+	DRM_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,
+};
+
+#define DRM_BLEND_FUNC(src_factor, dst_factor)		\
+	(DRM_BLEND_FACTOR_##src_factor << 16 | DRM_BLEND_FACTOR_##dst_factor)
+#define DRM_BLEND_FUNC_SRC_FACTOR(val)	(((val) >> 16) & 0xffff)
+#define DRM_BLEND_FUNC_DST_FACTOR(val)	((val) & 0xffff)
+
+struct drm_blend_mode {
+	uint64_t func;
+};
+
 enum drm_connector_force {
 	DRM_FORCE_UNSPECIFIED,
 	DRM_FORCE_OFF,
@@ -1273,6 +1290,8 @@ struct drm_plane_state {
 	/* Plane rotation */
 	unsigned int rotation;
 
+	struct drm_blend_mode blend_mode;
+
 	struct drm_atomic_state *state;
 };
 
@@ -2125,6 +2144,7 @@ struct drm_mode_config {
 	struct drm_property *prop_crtc_id;
 	struct drm_property *prop_active;
 	struct drm_property *prop_mode_id;
+	struct drm_property *prop_blend_func;
 
 	/* DVI-I properties */
 	struct drm_property *dvi_i_subconnector_property;
-- 
1.9.1

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[PATCHv2 2/5] drm/i915/skl: Add blend_func to SKL/BXT sprite planes

[Vandita Kulkarni]

From: Damien Lespiau <damien.lespiau@intel.com>

This patch adds the blend functions, and as per the
blend function, updates the plane control register values

V2: Add blend support for all RGB8888 formats
Fix the reg writes on plane_ctl_alpha bits.

V3: Add support support for primary and cursor planes.
fix an issue where the previous value was not
retained, change the logic to do so.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 121 +++++++++++++++++++++++++++++++++--
 drivers/gpu/drm/i915/intel_drv.h     |  14 +++-
 drivers/gpu/drm/i915/intel_sprite.c  |   6 +-
 3 files changed, 133 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c5b9687..037407f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2921,8 +2921,29 @@ static void skl_detach_scalers(struct intel_crtc *intel_crtc)
 	}
 }
 
-u32 skl_plane_ctl_format(uint32_t pixel_format)
+u32 skl_plane_ctl_format(uint32_t pixel_format,
+			enum per_pixel_alpha_state alpha)
 {
+	u32 plane_ctl_alpha = 0;
+
+	if (pixel_format == DRM_FORMAT_ABGR8888 ||
+		pixel_format == DRM_FORMAT_ARGB8888) {
+
+		switch (alpha) {
+		case DROP_ALPHA:
+			plane_ctl_alpha = PLANE_CTL_ALPHA_DISABLE;
+			break;
+		case PRE_MULTIPLIED_ALPHA:
+			plane_ctl_alpha = PLANE_CTL_ALPHA_SW_PREMULTIPLY;
+			break;
+		case NON_PRE_MULTIPLIED_ALPHA:
+			plane_ctl_alpha = PLANE_CTL_ALPHA_HW_PREMULTIPLY;
+			break;
+		default:
+			MISSING_CASE(alpha);
+		}
+	}
+
 	switch (pixel_format) {
 	case DRM_FORMAT_C8:
 		return PLANE_CTL_FORMAT_INDEXED;
@@ -2938,11 +2959,11 @@ u32 skl_plane_ctl_format(uint32_t pixel_format)
 	 * DRM_FORMAT) for user-space to configure that.
 	 */
 	case DRM_FORMAT_ABGR8888:
-		return PLANE_CTL_FORMAT_XRGB_8888 | PLANE_CTL_ORDER_RGBX |
-			PLANE_CTL_ALPHA_SW_PREMULTIPLY;
+		return ((PLANE_CTL_FORMAT_XRGB_8888 | (PLANE_CTL_ORDER_RGBX
+				& (~PLANE_CTL_ALPHA_MASK))) | plane_ctl_alpha);
 	case DRM_FORMAT_ARGB8888:
-		return PLANE_CTL_FORMAT_XRGB_8888 |
-			PLANE_CTL_ALPHA_SW_PREMULTIPLY;
+		return ((PLANE_CTL_FORMAT_XRGB_8888 & ~PLANE_CTL_ALPHA_MASK)
+						| plane_ctl_alpha);
 	case DRM_FORMAT_XRGB2101010:
 		return PLANE_CTL_FORMAT_XRGB_2101010;
 	case DRM_FORMAT_XBGR2101010:
@@ -3031,7 +3052,8 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 		    PLANE_CTL_PIPE_GAMMA_ENABLE |
 		    PLANE_CTL_PIPE_CSC_ENABLE;
 
-	plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
+	plane_ctl |= skl_plane_ctl_format(fb->pixel_format,
+					plane_state->per_pixel_alpha);
 	plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]);
 	plane_ctl |= PLANE_CTL_PLANE_GAMMA_DISABLE;
 	plane_ctl |= skl_plane_ctl_rotation(rotation);
@@ -3087,6 +3109,69 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 	POSTING_READ(PLANE_SURF(pipe, 0));
 }
 
+static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
+{
+	struct drm_device *dev = plane_state->state->dev;
+	struct intel_plane_state *state = to_intel_plane_state(plane_state);
+	const struct drm_framebuffer *fb = plane_state->fb;
+	const struct drm_blend_mode *mode = &state->base.blend_mode;
+	bool has_per_pixel_blending;
+
+	/*
+	 * We don't install the properties pre-SKL, so this is SKL+ specific
+	 * code for now.
+	 */
+	if (INTEL_INFO(dev)->gen < 9)
+		return 0;
+
+	if (!fb)
+		return 0;
+
+	has_per_pixel_blending = fb->pixel_format == DRM_FORMAT_ABGR8888 ||
+				fb->pixel_format == DRM_FORMAT_RGBA8888 ||
+				fb->pixel_format == DRM_FORMAT_ARGB8888 ||
+				fb->pixel_format == DRM_FORMAT_BGRA8888;
+
+	/* drop alpha for all fbs without an alpha channel */
+	if (!has_per_pixel_blending)
+		state->per_pixel_alpha = DROP_ALPHA;
+
+	switch (mode->func) {
+	/*
+	 * The 'AUTO' behaviour is the default and keeps compatibility with
+	 * kernels before the introduction of the blend_func property:
+	 *   - pre-multiplied alpha if the fb has an alpha channel
+	 *   - usual DRM_BLEND_FUNC(ONE, ZERO) otherwise
+	 */
+	case DRM_BLEND_FUNC(AUTO, AUTO):
+		if (has_per_pixel_blending)
+			state->per_pixel_alpha = PRE_MULTIPLIED_ALPHA;
+		break;
+	/* fbs without an alpha channel, or dropping the alpha channel */
+	case DRM_BLEND_FUNC(ONE, ZERO):
+		if (has_per_pixel_blending)
+			state->per_pixel_alpha = DROP_ALPHA;
+		break;
+	/* pre-multiplied alpha */
+	case DRM_BLEND_FUNC(ONE, ONE_MINUS_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			state->per_pixel_alpha = DROP_ALPHA;
+		else
+			state->per_pixel_alpha = PRE_MULTIPLIED_ALPHA;
+		break;
+	/* non pre-multiplied alpha */
+	case DRM_BLEND_FUNC(SRC_ALPHA, ONE_MINUS_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			state->per_pixel_alpha = DROP_ALPHA;
+		else
+			state->per_pixel_alpha = NON_PRE_MULTIPLIED_ALPHA;
+		break;
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
+
 static void skylake_disable_primary_plane(struct drm_plane *primary,
 					  struct drm_crtc *crtc)
 {
@@ -11892,6 +11977,10 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
 	    !needs_scaling(old_plane_state))
 		pipe_config->disable_lp_wm = true;
 
+	ret = intel_plane_state_check_blend(plane_state);
+	if (ret)
+		return ret;
+
 	return 0;
 }
 
@@ -14095,6 +14184,9 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
 	if (INTEL_INFO(dev)->gen >= 4)
 		intel_create_rotation_property(dev, primary);
 
+	if (INTEL_INFO(dev)->gen == 9)
+		intel_plane_add_blend_properties(primary);
+
 	drm_plane_helper_add(&primary->base, &intel_plane_helper_funcs);
 
 	return &primary->base;
@@ -14124,6 +14216,20 @@ void intel_create_rotation_property(struct drm_device *dev, struct intel_plane *
 				plane->base.state->rotation);
 }
 
+void intel_plane_add_blend_properties(struct intel_plane *plane)
+{
+	struct drm_device *dev = plane->base.dev;
+	struct drm_property *prop;
+
+	if (INTEL_INFO(dev)->gen < 9)
+		return;
+
+	prop = dev->mode_config.prop_blend_func;
+	if (prop)
+		drm_object_attach_property(&plane->base.base, prop,
+					   DRM_BLEND_FUNC(AUTO, AUTO));
+}
+
 static int
 intel_check_cursor_plane(struct drm_plane *plane,
 			 struct intel_crtc_state *crtc_state,
@@ -14166,6 +14272,9 @@ intel_check_cursor_plane(struct drm_plane *plane,
 		return -EINVAL;
 	}
 
+	if (INTEL_INFO(plane->dev)->gen == 9)
+		intel_plane_add_blend_properties(to_intel_plane(plane));
+
 	/*
 	 * There's something wrong with the cursor on CHV pipe C.
 	 * If it straddles the left edge of the screen then
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e13ce22..1939440 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -303,6 +303,12 @@ struct intel_atomic_state {
 	bool skip_intermediate_wm;
 };
 
+enum per_pixel_alpha_state {
+	DROP_ALPHA = 0,
+	PRE_MULTIPLIED_ALPHA,
+	NON_PRE_MULTIPLIED_ALPHA,
+};
+
 struct intel_plane_state {
 	struct drm_plane_state base;
 	struct drm_rect src;
@@ -332,6 +338,9 @@ struct intel_plane_state {
 
 	struct drm_intel_sprite_colorkey ckey;
 
+	/* per pixel alpha channel state */
+	enum per_pixel_alpha_state per_pixel_alpha;
+
 	/* async flip related structures */
 	struct drm_i915_gem_request *wait_req;
 };
@@ -1195,6 +1204,7 @@ intel_rotation_90_or_270(unsigned int rotation)
 
 void intel_create_rotation_property(struct drm_device *dev,
 					struct intel_plane *plane);
+void intel_plane_add_blend_properties(struct intel_plane *plane);
 
 void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv,
 				    enum pipe pipe);
@@ -1267,7 +1277,9 @@ u32 intel_plane_obj_offset(struct intel_plane *intel_plane,
 			   struct drm_i915_gem_object *obj,
 			   unsigned int plane);
 
-u32 skl_plane_ctl_format(uint32_t pixel_format);
+u32 skl_plane_ctl_format(uint32_t pixel_format,
+				enum per_pixel_alpha_state alpha);
+
 u32 skl_plane_ctl_tiling(uint64_t fb_modifier);
 u32 skl_plane_ctl_rotation(unsigned int rotation);
 
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 0f3e230..9474b76 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -210,7 +210,9 @@ skl_update_plane(struct drm_plane *drm_plane,
 		PLANE_CTL_PIPE_GAMMA_ENABLE |
 		PLANE_CTL_PIPE_CSC_ENABLE;
 
-	plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
+	plane_ctl |= skl_plane_ctl_format(fb->pixel_format,
+					plane_state->per_pixel_alpha);
+
 	plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]);
 
 	plane_ctl |= skl_plane_ctl_rotation(rotation);
@@ -1120,6 +1122,8 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
 
 	intel_create_rotation_property(dev, intel_plane);
 
+	intel_plane_add_blend_properties(intel_plane);
+
 	drm_plane_helper_add(&intel_plane->base, &intel_plane_helper_funcs);
 
 	return 0;
-- 
1.9.1

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[PATCHv2 3/5] drm: Introduce DRM_MODE_COLOR()

[Vandita Kulkarni]

From: Damien Lespiau <damien.lespiau@intel.com>

In the hope of expressing colors in the KMS API in a consitant want,
let's introduce a ARGB 16161616 color and a few convinience macros
around it.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 include/uapi/drm/drm_mode.h | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 7a7856e..203c7ab0 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -295,6 +295,40 @@ struct drm_mode_get_connector {
  */
 #define DRM_MODE_PROP_ATOMIC        0x80000000
 
+/* Color for the KMS API, ARGB (msb -> lsb) 16bits per component. */
+#define DRM_MODE_COLOR(a, r, b, g)	\
+	(((__u64)(a) << 48) | ((__u64)(r) << 32) | \
+	 ((__u64)(g) << 16) | (__u64)(b))
+
+/* Extract full precision, 8 bits, 10 bits and 12 bits components. */
+#define DRM_MODE_COLOR_ALPHA(color)	(((color) >> 48) & 0xffff)
+#define DRM_MODE_COLOR_RED(color)	(((color) >> 32) & 0xffff)
+#define DRM_MODE_COLOR_BLUE(color)	(((color) >> 16) & 0xffff)
+#define DRM_MODE_COLOR_GREEN(color)	((color) & 0xffff)
+#define DRM_MODE_COLOR_ALPHA_8(color)	(((color) >> (48 + 8)) & 0xff)
+#define DRM_MODE_COLOR_RED_8(color)	(((color) >> (32 + 8)) & 0xff)
+#define DRM_MODE_COLOR_BLUE_8(color)	(((color) >> (16 + 8)) & 0xff)
+#define DRM_MODE_COLOR_GREEN_8(color)	(((color) >>  8) & 0xff)
+#define DRM_MODE_COLOR_ALPHA_10(color)	(((color) >> (48 + 6)) & 0x3ff)
+#define DRM_MODE_COLOR_RED_10(color)	(((color) >> (32 + 6)) & 0x3ff)
+#define DRM_MODE_COLOR_BLUE_10(color)	(((color) >> (16 + 6)) & 0x3ff)
+#define DRM_MODE_COLOR_GREEN_10(color)	(((color) >>  6) & 0x3ff)
+#define DRM_MODE_COLOR_ALPHA_12(color)	(((color) >> (48 + 4)) & 0xfff)
+#define DRM_MODE_COLOR_RED_12(color)	(((color) >> (32 + 4)) & 0xfff)
+#define DRM_MODE_COLOR_BLUE_12(color)	(((color) >> (16 + 4)) & 0xfff)
+#define DRM_MODE_COLOR_GREEN_12(color)	(((color) >>  4) & 0xfff)
+
+/* Handy macros to convert a DRM_MODE_COLOR() into common precisions */
+#define DRM_MODE_COLOR_TO_ARGB_8888(color)	 \
+	((DRM_MODE_COLOR_ALPHA_8(color) << 24) | \
+	 (DRM_MODE_COLOR_RED_8(color)   << 16) | \
+	 (DRM_MODE_COLOR_GREEN_8(color) << 8)  | \
+	 DRM_MODE_COLOR_BLUE_8(color))
+#define DRM_MODE_COLOR_TO_RGB_101010(color)	  \
+	 ((DRM_MODE_COLOR_RED_10(color)  << 20) | \
+	 (DRM_MODE_COLOR_GREEN_10(color) << 10) | \
+	 DRM_MODE_COLOR_BLUE_10(color))
+
 struct drm_mode_property_enum {
 	__u64 value;
 	char name[DRM_PROP_NAME_LEN];
-- 
1.9.1

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[PATCHv2 4/5] drm: Add an blend_color property

[Vandita Kulkarni]

From: Damien Lespiau <damien.lespiau@intel.com>

Add blend color property and update the
documentation for the same

V2: Add blend color support in get property.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
---
 Documentation/DocBook/gpu.tmpl | 11 +++++++++--
 drivers/gpu/drm/drm_atomic.c   |  4 ++++
 drivers/gpu/drm/drm_crtc.c     |  5 +++++
 include/drm/drm_crtc.h         |  6 ++++++
 4 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/Documentation/DocBook/gpu.tmpl b/Documentation/DocBook/gpu.tmpl
index f673989..8572c9a 100644
--- a/Documentation/DocBook/gpu.tmpl
+++ b/Documentation/DocBook/gpu.tmpl
@@ -1816,7 +1816,7 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >Description/Restrictions</td>
 	</tr>
 	<tr>
-	<td rowspan="43" valign="top" >DRM</td>
+	<td rowspan="44" valign="top" >DRM</td>
 	<td valign="top" >Generic</td>
 	<td valign="top" >“rotation”</td>
 	<td valign="top" >BITMASK</td>
@@ -1868,7 +1868,7 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >CRTC that connector is attached to (atomic)</td>
 	</tr>
 	<tr>
-	<td rowspan="12" valign="top" >Plane</td>
+	<td rowspan="13" valign="top" >Plane</td>
 	<td valign="top" >“type”</td>
 	<td valign="top" >ENUM | IMMUTABLE</td>
 	<td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
@@ -1953,6 +1953,13 @@ void intel_crt_init(struct drm_device *dev)
 	<td valign="top" >Source and destination blending factors</td>
 	</tr>
 	<tr>
+	<td valign="top" >“blend_color”</td>
+	<td valign="top" >Color</td>
+	<td valign="top" >DRM_MODE_COLOR()</td>
+	<td valign="top" >Plane</td>
+	<td valign="top" >Blend constant color</td>
+	</tr>
+	<tr>
 	<td rowspan="2" valign="top" >DVI-I</td>
 	<td valign="top" >“subconnector”</td>
 	<td valign="top" >ENUM</td>
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index c2ead2d..20340de 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -713,6 +713,8 @@ int drm_atomic_plane_set_property(struct drm_plane *plane,
 			return -EINVAL;
 
 		state->blend_mode.func = val & GENMASK(31, 0);
+	} else if (property == config->prop_blend_color) {
+		state->blend_mode.color = val;
 	} else if (plane->funcs->atomic_set_property) {
 		return plane->funcs->atomic_set_property(plane, state,
 				property, val);
@@ -771,6 +773,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
 		*val = state->rotation;
 	} else if (property == config->prop_blend_func) {
 		*val = state->blend_mode.func;
+	} else if (property == config->prop_blend_color) {
+		*val = state->blend_mode.color;
 	} else if (plane->funcs->atomic_get_property) {
 		return plane->funcs->atomic_get_property(plane, state, property, val);
 	} else {
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 2cac5e1..65cbaea 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1592,6 +1592,11 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
 		return -ENOMEM;
 	dev->mode_config.prop_blend_func = prop;
 
+	prop = drm_property_create_range(dev, 0, "blend_color", 0, U64_MAX);
+	if (!prop)
+		return -ENOMEM;
+	dev->mode_config.prop_blend_color = prop;
+
 	return 0;
 }
 
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 269f660..33d5845 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -95,6 +95,10 @@ enum drm_blend_factor {
 	DRM_BLEND_FACTOR_ONE,
 	DRM_BLEND_FACTOR_SRC_ALPHA,
 	DRM_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,
+	DRM_BLEND_FACTOR_CONSTANT_ALPHA,
+	DRM_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA,
+	DRM_BLEND_FACTOR_CONSTANT_ALPHA_TIMES_SRC_ALPHA,
+	DRM_BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA,
 };
 
 #define DRM_BLEND_FUNC(src_factor, dst_factor)		\
@@ -103,6 +107,7 @@ enum drm_blend_factor {
 #define DRM_BLEND_FUNC_DST_FACTOR(val)	((val) & 0xffff)
 
 struct drm_blend_mode {
+	uint64_t color;
 	uint64_t func;
 };
 
@@ -2145,6 +2150,7 @@ struct drm_mode_config {
 	struct drm_property *prop_active;
 	struct drm_property *prop_mode_id;
 	struct drm_property *prop_blend_func;
+	struct drm_property *prop_blend_color;
 
 	/* DVI-I properties */
 	struct drm_property *dvi_i_subconnector_property;
-- 
1.9.1

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[PATCHv2 5/5] drm/i915/skl: Add support for blending modes

[Vandita Kulkarni]

From: Damien Lespiau <damien.lespiau@intel.com>

This patch adds support for blending modes involving
color.

V2: Add support for primary plane.
Separate out plane alpha disable functionality from per pixel
drop_alpha blend function and add another blend function case for
disabling plane alpha.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: vandita kulkarni <vandita.kulkarni@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h      |  4 +++
 drivers/gpu/drm/i915/intel_display.c | 47 ++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_drv.h     |  3 +++
 drivers/gpu/drm/i915/intel_sprite.c  |  9 +++++--
 4 files changed, 61 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9464ba3..4d0c39d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5515,6 +5515,10 @@ enum skl_disp_power_wells {
 #define PLANE_KEYMAX(pipe, plane)	\
 	_MMIO_PLANE(plane, _PLANE_KEYMAX_1(pipe), _PLANE_KEYMAX_2(pipe))
 
+#define PLANE_KEYMAX_ALPHA_MASK			0x00ffffff
+#define PLANE_KEY_MASK_ALPHA_EN			31
+#define PLANE_KEY_MAX_ALPHA_SHIFT		24
+
 #define _PLANE_BUF_CFG_1_B			0x7127c
 #define _PLANE_BUF_CFG_2_B			0x7137c
 #define _PLANE_BUF_CFG_1(pipe)	\
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 037407f..31755f2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3032,6 +3032,8 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
 	struct drm_framebuffer *fb = plane_state->base.fb;
 	struct drm_i915_gem_object *obj = intel_fb_obj(fb);
+	const struct drm_intel_sprite_colorkey *key =
+			&to_intel_plane_state(plane->state)->ckey;
 	int pipe = intel_crtc->pipe;
 	u32 plane_ctl, stride_div, stride;
 	u32 tile_height, plane_offset, plane_size;
@@ -3064,6 +3066,15 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
 
 	WARN_ON(drm_rect_width(&plane_state->src) == 0);
 
+	I915_WRITE(PLANE_KEYMAX(pipe, 0), (DRM_MODE_COLOR_ALPHA_8
+			(plane_state->base.blend_mode.color)
+				<< PLANE_KEY_MAX_ALPHA_SHIFT) |
+			(key->max_value & PLANE_KEYMAX_ALPHA_MASK));
+	I915_WRITE(PLANE_KEYMSK(pipe, 0),
+			(plane_state->use_plane_alpha
+				<< PLANE_KEY_MASK_ALPHA_EN) |
+			(key->channel_mask & GENMASK(0, 26)));
+
 	if (intel_rotation_90_or_270(rotation)) {
 		int cpp = drm_format_plane_cpp(fb->pixel_format, 0);
 
@@ -3146,6 +3157,7 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 	case DRM_BLEND_FUNC(AUTO, AUTO):
 		if (has_per_pixel_blending)
 			state->per_pixel_alpha = PRE_MULTIPLIED_ALPHA;
+		state->use_plane_alpha = false;
 		break;
 	/* fbs without an alpha channel, or dropping the alpha channel */
 	case DRM_BLEND_FUNC(ONE, ZERO):
@@ -3158,6 +3170,7 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 			state->per_pixel_alpha = DROP_ALPHA;
 		else
 			state->per_pixel_alpha = PRE_MULTIPLIED_ALPHA;
+		state->use_plane_alpha = false;
 		break;
 	/* non pre-multiplied alpha */
 	case DRM_BLEND_FUNC(SRC_ALPHA, ONE_MINUS_SRC_ALPHA):
@@ -3165,6 +3178,34 @@ static int intel_plane_state_check_blend(struct drm_plane_state *plane_state)
 			state->per_pixel_alpha = DROP_ALPHA;
 		else
 			state->per_pixel_alpha = NON_PRE_MULTIPLIED_ALPHA;
+		state->use_plane_alpha = false;
+		break;
+	/* plane alpha */
+	case DRM_BLEND_FUNC(CONSTANT_ALPHA, ONE_MINUS_CONSTANT_ALPHA):
+		state->use_plane_alpha = true;
+		break;
+	/* plane alpha, pre-multiplied fb */
+	case DRM_BLEND_FUNC(CONSTANT_ALPHA,
+			    ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			state->per_pixel_alpha = DROP_ALPHA;
+		else
+			state->per_pixel_alpha = PRE_MULTIPLIED_ALPHA;
+		/*TBD bspec check*/
+		state->use_plane_alpha = true;
+		break;
+	/* plane alpha, non pre-multiplied fb */
+	case DRM_BLEND_FUNC(CONSTANT_ALPHA_TIMES_SRC_ALPHA,
+			    ONE_MINUS_CONSTANT_ALPHA_TIMES_SRC_ALPHA):
+		if (!has_per_pixel_blending)
+			state->per_pixel_alpha = DROP_ALPHA;
+		else
+			state->per_pixel_alpha = NON_PRE_MULTIPLIED_ALPHA;
+		state->use_plane_alpha = true;
+		break;
+	/* drop plane alpha */
+	case DRM_BLEND_FUNC(ZERO, ONE):
+		state->use_plane_alpha = false;
 		break;
 	default:
 		return -EINVAL;
@@ -14228,6 +14269,12 @@ void intel_plane_add_blend_properties(struct intel_plane *plane)
 	if (prop)
 		drm_object_attach_property(&plane->base.base, prop,
 					   DRM_BLEND_FUNC(AUTO, AUTO));
+
+	prop = dev->mode_config.prop_blend_color;
+	if (prop)
+		drm_object_attach_property(&plane->base.base, prop,
+					   DRM_MODE_COLOR(0xffff, 0xffff,
+							  0xffff, 0xffff));
 }
 
 static int
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1939440..d3cb36f 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -341,6 +341,9 @@ struct intel_plane_state {
 	/* per pixel alpha channel state */
 	enum per_pixel_alpha_state per_pixel_alpha;
 
+	/* use per-plane alpha */
+	bool use_plane_alpha;
+
 	/* async flip related structures */
 	struct drm_i915_gem_request *wait_req;
 };
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 9474b76..851c09a 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -226,10 +226,15 @@ skl_update_plane(struct drm_plane *drm_plane,
 	crtc_w--;
 	crtc_h--;
 
+	I915_WRITE(PLANE_KEYMAX(pipe, plane),
+		   (DRM_MODE_COLOR_ALPHA_8(plane_state->base.blend_mode.color)
+			<< 24) | (key->max_value & 0x00ffffff));
+	I915_WRITE(PLANE_KEYMSK(pipe, plane),
+		   (plane_state->use_plane_alpha << 31) |
+		   (key->channel_mask & GENMASK(0, 26)));
+
 	if (key->flags) {
 		I915_WRITE(PLANE_KEYVAL(pipe, plane), key->min_value);
-		I915_WRITE(PLANE_KEYMAX(pipe, plane), key->max_value);
-		I915_WRITE(PLANE_KEYMSK(pipe, plane), key->channel_mask);
 	}
 
 	if (key->flags & I915_SET_COLORKEY_DESTINATION)
-- 
1.9.1

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Re: [Intel-gfx] [PATCHv2 1/5] drm: Introduce the blend-func property

[Ville Syrjälä]

On Fri, Apr 29, 2016 at 02:59:13PM +0530, Vandita Kulkarni wrote:
> From: Damien Lespiau <damien.lespiau@intel.com>
> 
> We'd like to be able to program the blending modes of display planes.
> Ville suggested to use something similar to the GL blend states, which
> does seem like a good idea.
> 
> For now, we only consider blend factors, but room is left for
> extensions: blend equation, separate rgb/alpha blend factors, blend
> color.
> 
> V2: Added the belnd func property support in get property.
> 
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> ---
>  Documentation/DocBook/gpu.tmpl | 11 +++++++++--
>  drivers/gpu/drm/drm_atomic.c   | 14 ++++++++++++++
>  drivers/gpu/drm/drm_crtc.c     |  5 +++++
>  include/drm/drm_crtc.h         | 20 ++++++++++++++++++++
>  4 files changed, 48 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/DocBook/gpu.tmpl b/Documentation/DocBook/gpu.tmpl
> index 1464fb2..f673989 100644
> --- a/Documentation/DocBook/gpu.tmpl
> +++ b/Documentation/DocBook/gpu.tmpl
> @@ -1816,7 +1816,7 @@ void intel_crt_init(struct drm_device *dev)
>  	<td valign="top" >Description/Restrictions</td>
>  	</tr>
>  	<tr>
> -	<td rowspan="42" valign="top" >DRM</td>
> +	<td rowspan="43" valign="top" >DRM</td>
>  	<td valign="top" >Generic</td>
>  	<td valign="top" >“rotation”</td>
>  	<td valign="top" >BITMASK</td>
> @@ -1868,7 +1868,7 @@ void intel_crt_init(struct drm_device *dev)
>  	<td valign="top" >CRTC that connector is attached to (atomic)</td>
>  	</tr>
>  	<tr>
> -	<td rowspan="11" valign="top" >Plane</td>
> +	<td rowspan="12" valign="top" >Plane</td>
>  	<td valign="top" >“type”</td>
>  	<td valign="top" >ENUM | IMMUTABLE</td>
>  	<td valign="top" >{ "Overlay", "Primary", "Cursor" }</td>
> @@ -1946,6 +1946,13 @@ void intel_crt_init(struct drm_device *dev)
>  	<td valign="top" >CRTC that plane is attached to (atomic)</td>
>  	</tr>
>  	<tr>
> +	<td valign="top" >“blend_func”</td>
> +	<td valign="top" >None</td>
> +	<td valign="top" >DRM_BLEND_FUNC()</td>
> +	<td valign="top" >Plane</td>
> +	<td valign="top" >Source and destination blending factors</td>
> +	</tr>
> +	<tr>
>  	<td rowspan="2" valign="top" >DVI-I</td>
>  	<td valign="top" >“subconnector”</td>
>  	<td valign="top" >ENUM</td>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 8ee1db8..c2ead2d 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -701,6 +701,18 @@ int drm_atomic_plane_set_property(struct drm_plane *plane,
>  		state->src_h = val;
>  	} else if (property == config->rotation_property) {
>  		state->rotation = val;
> +	} else if (property == config->prop_blend_func) {
> +		enum drm_blend_factor src_factor, dst_factor;
> +
> +		src_factor = DRM_BLEND_FUNC_SRC_FACTOR(val);
> +		dst_factor = DRM_BLEND_FUNC_DST_FACTOR(val);
> +
> +		if (src_factor != dst_factor &&
> +			(src_factor == DRM_BLEND_FACTOR_AUTO ||
> +			dst_factor == DRM_BLEND_FACTOR_AUTO))
> +			return -EINVAL;
> +
> +		state->blend_mode.func = val & GENMASK(31, 0);
>  	} else if (plane->funcs->atomic_set_property) {
>  		return plane->funcs->atomic_set_property(plane, state,
>  				property, val);
> @@ -757,6 +769,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
>  		*val = state->src_h;
>  	} else if (property == config->rotation_property) {
>  		*val = state->rotation;
> +	} else if (property == config->prop_blend_func) {
> +		*val = state->blend_mode.func;
>  	} else if (plane->funcs->atomic_get_property) {
>  		return plane->funcs->atomic_get_property(plane, state, property, val);
>  	} else {
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index f7fe9e1..2cac5e1 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -1587,6 +1587,11 @@ static int drm_mode_create_standard_properties(struct drm_device *dev)
>  		return -ENOMEM;
>  	dev->mode_config.gamma_lut_size_property = prop;
>  
> +	prop = drm_property_create_range(dev, 0, "blend_func", 0, U32_MAX);
> +	if (!prop)
> +		return -ENOMEM;
> +	dev->mode_config.prop_blend_func = prop;
> +
>  	return 0;
>  }
>  
> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
> index 6d46842..269f660 100644
> --- a/include/drm/drm_crtc.h
> +++ b/include/drm/drm_crtc.h
> @@ -89,6 +89,23 @@ static inline uint64_t I642U64(int64_t val)
>  #define DRM_REFLECT_X	4
>  #define DRM_REFLECT_Y	5
>  
> +enum drm_blend_factor {
> +	DRM_BLEND_FACTOR_AUTO,
> +	DRM_BLEND_FACTOR_ZERO,
> +	DRM_BLEND_FACTOR_ONE,
> +	DRM_BLEND_FACTOR_SRC_ALPHA,
> +	DRM_BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,

Based on what I remember of the earlier discussion I don't think these
are quite enough. We could want some way to deal with the constant alpha
as well. Hmm. I think I need to refresh my brain a bit on this before I
can say anything really.

Also IIRC I was thinking that the premult vs. non-premult would be a
separate thing outside the blend equation. That's how we have it some
hw at least AFAIK, so be shoving it all into the blend func we may
lose certain combinations. But I suppose that's not a real problem,
at least for normal compositors and such.

Also I don't like the "auto" thing. What would be the problem in just
making the default for all blend capable planes '1, 1-Sa' and for
blend incapable planes '1, 0'?

> +};
> +
> +#define DRM_BLEND_FUNC(src_factor, dst_factor)		\
> +	(DRM_BLEND_FACTOR_##src_factor << 16 | DRM_BLEND_FACTOR_##dst_factor)
> +#define DRM_BLEND_FUNC_SRC_FACTOR(val)	(((val) >> 16) & 0xffff)
> +#define DRM_BLEND_FUNC_DST_FACTOR(val)	((val) & 0xffff)
> +
> +struct drm_blend_mode {
> +	uint64_t func;
> +};
> +
>  enum drm_connector_force {
>  	DRM_FORCE_UNSPECIFIED,
>  	DRM_FORCE_OFF,
> @@ -1273,6 +1290,8 @@ struct drm_plane_state {
>  	/* Plane rotation */
>  	unsigned int rotation;
>  
> +	struct drm_blend_mode blend_mode;
> +
>  	struct drm_atomic_state *state;
>  };
>  
> @@ -2125,6 +2144,7 @@ struct drm_mode_config {
>  	struct drm_property *prop_crtc_id;
>  	struct drm_property *prop_active;
>  	struct drm_property *prop_mode_id;
> +	struct drm_property *prop_blend_func;
>  
>  	/* DVI-I properties */
>  	struct drm_property *dvi_i_subconnector_property;
> -- 
> 1.9.1
> 
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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✗ Fi.CI.BAT: failure for Support blending modes of display planes (rev2)

[Patchwork]

== Series Details ==

Series: Support blending modes of display planes (rev2)
URL   : https://patchwork.freedesktop.org/series/2582/
State : failure

== Summary ==

Series 2582v2 Support blending modes of display planes
http://patchwork.freedesktop.org/api/1.0/series/2582/revisions/2/mbox/

Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                pass       -> INCOMPLETE (hsw-gt2)

bdw-nuci7-2      total:201  pass:189  dwarn:0   dfail:0   fail:0   skip:12 
bdw-ultra        total:201  pass:176  dwarn:0   dfail:0   fail:0   skip:25 
bsw-nuc-2        total:200  pass:159  dwarn:0   dfail:0   fail:0   skip:41 
byt-nuc          total:200  pass:159  dwarn:0   dfail:0   fail:0   skip:41 
hsw-brixbox      total:201  pass:175  dwarn:0   dfail:0   fail:0   skip:26 
hsw-gt2          total:151  pass:132  dwarn:0   dfail:0   fail:0   skip:18 
ilk-hp8440p      total:201  pass:140  dwarn:0   dfail:0   fail:0   skip:61 
ivb-t430s        total:201  pass:170  dwarn:0   dfail:0   fail:0   skip:31 
skl-i7k-2        total:201  pass:174  dwarn:0   dfail:0   fail:0   skip:27 
snb-dellxps      total:201  pass:159  dwarn:0   dfail:0   fail:0   skip:42 
snb-x220t        total:201  pass:159  dwarn:0   dfail:0   fail:1   skip:41 

Results at /archive/results/CI_IGT_test/Patchwork_2109/

1d56af10bdd6f4714e0892c05ff01d11e77f54fc drm-intel-nightly: 2016y-04m-29d-09h-21m-52s UTC integration manifest
f078b1b drm/i915/skl: Add support for blending modes
0910f9d drm: Add an blend_color property
ab2afbf drm: Introduce DRM_MODE_COLOR()
5f3d082 drm/i915/skl: Add blend_func to SKL/BXT sprite planes
2426e80 drm: Introduce the blend-func property

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