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From: Chris Wilson <chris@chris-wilson.co.uk>
To: ville.syrjala@linux.intel.com
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
	intel-gfx@lists.freedesktop.org,
	drm-intel-fixes@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Re-enable GGTT earlier during resume on pre-gen6 platforms
Date: Fri, 6 May 2016 21:22:49 +0100	[thread overview]
Message-ID: <20160506202249.GA19432@nuc-i3427.alporthouse.com> (raw)
In-Reply-To: <1462559755-353-1-git-send-email-ville.syrjala@linux.intel.com>

On Fri, May 06, 2016 at 09:35:55PM +0300, ville.syrjala@linux.intel.com wrote:
> @@ -730,9 +730,14 @@ int i915_suspend_switcheroo(struct drm_device *dev, pm_message_t state)
>  static int i915_drm_resume(struct drm_device *dev)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> +	int ret;
>  
>  	disable_rpm_wakeref_asserts(dev_priv);
>  
> +	ret = i915_ggtt_enable_hw(dev);
> +	if (ret)
> +		DRM_ERROR("failed to re-enable GGTT\n");

Would it not be fatal for resume as well? Failure means we can't use the
GGTT, so all subsequent writes will be going into a random address.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2016-05-06 20:22 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-06 18:35 [PATCH] drm/i915: Re-enable GGTT earlier during resume on pre-gen6 platforms ville.syrjala
2016-05-06 20:22 ` Chris Wilson [this message]
2016-05-07 18:18   ` Ville Syrjälä
2016-05-08 13:09     ` Chris Wilson
2016-05-20 13:06     ` David Weinehall
2016-05-23 17:10       ` Ville Syrjälä
2016-05-09 13:52 ` ✓ Fi.CI.BAT: success for " Patchwork
2016-05-10  9:14 ` [PATCH] " Chris Wilson
2016-05-10  9:39   ` Ville Syrjälä

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