From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Hemminger Subject: Re: [PATCH 01/20] thunderx/nicvf/base: add hardware API for ThunderX nicvf inbuilt NIC Date: Mon, 9 May 2016 10:38:05 -0700 Message-ID: <20160509103805.54bd7457@xeon-e3> References: <1462634198-2289-1-git-send-email-jerin.jacob@caviumnetworks.com> <1462634198-2289-2-git-send-email-jerin.jacob@caviumnetworks.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Cc: , , , Maciej Czekaj , Kamil Rytarowski , Zyta Szpak , Slawomir Rosek , Radoslaw Biernacki To: Jerin Jacob Return-path: Received: from mail-pa0-f54.google.com (mail-pa0-f54.google.com [209.85.220.54]) by dpdk.org (Postfix) with ESMTP id 8B3346CB9 for ; Mon, 9 May 2016 19:37:52 +0200 (CEST) Received: by mail-pa0-f54.google.com with SMTP id r5so76694489pag.1 for ; Mon, 09 May 2016 10:37:52 -0700 (PDT) In-Reply-To: <1462634198-2289-2-git-send-email-jerin.jacob@caviumnetworks.com> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Sat, 7 May 2016 20:46:19 +0530 Jerin Jacob wrote: > +static struct nicvf_reg_info nicvf_reg_tbl[] = { > + NICVF_REG_INFO(NIC_VF_CFG), > + NICVF_REG_INFO(NIC_VF_PF_MAILBOX_0_1), > + NICVF_REG_INFO(NIC_VF_INT), > + NICVF_REG_INFO(NIC_VF_INT_W1S), > + NICVF_REG_INFO(NIC_VF_ENA_W1C), > + NICVF_REG_INFO(NIC_VF_ENA_W1S), > + NICVF_REG_INFO(NIC_VNIC_RSS_CFG), > + NICVF_REG_INFO(NIC_VNIC_RQ_GEN_CFG), > +}; > + > +static struct nicvf_reg_info nicvf_multi_reg_tbl[] = { > + {NIC_VNIC_RSS_KEY_0_4 + 0, "NIC_VNIC_RSS_KEY_0"}, > + {NIC_VNIC_RSS_KEY_0_4 + 8, "NIC_VNIC_RSS_KEY_1"}, > + {NIC_VNIC_RSS_KEY_0_4 + 16, "NIC_VNIC_RSS_KEY_2"}, > + {NIC_VNIC_RSS_KEY_0_4 + 24, "NIC_VNIC_RSS_KEY_3"}, > + {NIC_VNIC_RSS_KEY_0_4 + 32, "NIC_VNIC_RSS_KEY_4"}, > + {NIC_VNIC_TX_STAT_0_4 + 0, "NIC_VNIC_STAT_TX_OCTS"}, > + {NIC_VNIC_TX_STAT_0_4 + 8, "NIC_VNIC_STAT_TX_UCAST"}, > + {NIC_VNIC_TX_STAT_0_4 + 16, "NIC_VNIC_STAT_TX_BCAST"}, > + {NIC_VNIC_TX_STAT_0_4 + 24, "NIC_VNIC_STAT_TX_MCAST"}, > + {NIC_VNIC_TX_STAT_0_4 + 32, "NIC_VNIC_STAT_TX_DROP"}, > + {NIC_VNIC_RX_STAT_0_13 + 0, "NIC_VNIC_STAT_RX_OCTS"}, > + {NIC_VNIC_RX_STAT_0_13 + 8, "NIC_VNIC_STAT_RX_UCAST"}, > + {NIC_VNIC_RX_STAT_0_13 + 16, "NIC_VNIC_STAT_RX_BCAST"}, > + {NIC_VNIC_RX_STAT_0_13 + 24, "NIC_VNIC_STAT_RX_MCAST"}, > + {NIC_VNIC_RX_STAT_0_13 + 32, "NIC_VNIC_STAT_RX_RED"}, > + {NIC_VNIC_RX_STAT_0_13 + 40, "NIC_VNIC_STAT_RX_RED_OCTS"}, > + {NIC_VNIC_RX_STAT_0_13 + 48, "NIC_VNIC_STAT_RX_ORUN"}, > + {NIC_VNIC_RX_STAT_0_13 + 56, "NIC_VNIC_STAT_RX_ORUN_OCTS"}, > + {NIC_VNIC_RX_STAT_0_13 + 64, "NIC_VNIC_STAT_RX_FCS"}, > + {NIC_VNIC_RX_STAT_0_13 + 72, "NIC_VNIC_STAT_RX_L2ERR"}, > + {NIC_VNIC_RX_STAT_0_13 + 80, "NIC_VNIC_STAT_RX_DRP_BCAST"}, > + {NIC_VNIC_RX_STAT_0_13 + 88, "NIC_VNIC_STAT_RX_DRP_MCAST"}, > + {NIC_VNIC_RX_STAT_0_13 + 96, "NIC_VNIC_STAT_RX_DRP_L3BCAST"}, > + {NIC_VNIC_RX_STAT_0_13 + 104, "NIC_VNIC_STAT_RX_DRP_L3MCAST"}, > +}; > + > +static struct nicvf_reg_info nicvf_qset_cq_reg_tbl[] = { > + NICVF_REG_INFO(NIC_QSET_CQ_0_7_CFG), > + NICVF_REG_INFO(NIC_QSET_CQ_0_7_CFG2), > + NICVF_REG_INFO(NIC_QSET_CQ_0_7_THRESH), > + NICVF_REG_INFO(NIC_QSET_CQ_0_7_BASE), > + NICVF_REG_INFO(NIC_QSET_CQ_0_7_HEAD), > + NICVF_REG_INFO(NIC_QSET_CQ_0_7_TAIL), > + NICVF_REG_INFO(NIC_QSET_CQ_0_7_DOOR), > + NICVF_REG_INFO(NIC_QSET_CQ_0_7_STATUS), > + NICVF_REG_INFO(NIC_QSET_CQ_0_7_STATUS2), > + NICVF_REG_INFO(NIC_QSET_CQ_0_7_DEBUG), > +}; > + > +static struct nicvf_reg_info nicvf_qset_rq_reg_tbl[] = { > + NICVF_REG_INFO(NIC_QSET_RQ_0_7_CFG), > + NICVF_REG_INFO(NIC_QSET_RQ_0_7_STATUS0), > + NICVF_REG_INFO(NIC_QSET_RQ_0_7_STATUS1), > +}; > + > +static struct nicvf_reg_info nicvf_qset_sq_reg_tbl[] = { > + NICVF_REG_INFO(NIC_QSET_SQ_0_7_CFG), > + NICVF_REG_INFO(NIC_QSET_SQ_0_7_THRESH), > + NICVF_REG_INFO(NIC_QSET_SQ_0_7_BASE), > + NICVF_REG_INFO(NIC_QSET_SQ_0_7_HEAD), > + NICVF_REG_INFO(NIC_QSET_SQ_0_7_TAIL), > + NICVF_REG_INFO(NIC_QSET_SQ_0_7_DOOR), > + NICVF_REG_INFO(NIC_QSET_SQ_0_7_STATUS), > + NICVF_REG_INFO(NIC_QSET_SQ_0_7_DEBUG), > + NICVF_REG_INFO(NIC_QSET_SQ_0_7_STATUS0), > + NICVF_REG_INFO(NIC_QSET_SQ_0_7_STATUS1), > +}; > + > +static struct nicvf_reg_info nicvf_qset_rbdr_reg_tbl[] = { > + NICVF_REG_INFO(NIC_QSET_RBDR_0_1_CFG), > + NICVF_REG_INFO(NIC_QSET_RBDR_0_1_THRESH), > + NICVF_REG_INFO(NIC_QSET_RBDR_0_1_BASE), > + NICVF_REG_INFO(NIC_QSET_RBDR_0_1_HEAD), > + NICVF_REG_INFO(NIC_QSET_RBDR_0_1_TAIL), > + NICVF_REG_INFO(NIC_QSET_RBDR_0_1_DOOR), > + NICVF_REG_INFO(NIC_QSET_RBDR_0_1_STATUS0), > + NICVF_REG_INFO(NIC_QSET_RBDR_0_1_STATUS1), > + NICVF_REG_INFO(NIC_QSET_RBDR_0_1_PRFCH_STATUS), > +}; Tables like this should be marked const