From: Jiri Olsa <jolsa@redhat.com>
To: Andi Kleen <andi@firstfloor.org>
Cc: acme@kernel.org, peterz@infradead.org, jolsa@kernel.org,
linux-kernel@vger.kernel.org, Andi Kleen <ak@linux.intel.com>
Subject: Re: [PATCH 03/10] x86, perf: Add Top Down events to Intel Core
Date: Wed, 11 May 2016 15:23:36 +0200 [thread overview]
Message-ID: <20160511132336.GA30427@krava> (raw)
In-Reply-To: <1462489447-31832-4-git-send-email-andi@firstfloor.org>
On Thu, May 05, 2016 at 04:04:00PM -0700, Andi Kleen wrote:
SNIP
> +
> +EVENT_ATTR_STR_HT(topdown-total-slots, td_total_slots,
> + "event=0x3c,umask=0x0", /* cpu_clk_unhalted.thread */
> + "event=0x3c,umask=0x0,any=1"); /* cpu_clk_unhalted.thread_any */
> +EVENT_ATTR_STR_HT(topdown-total-slots.scale, td_total_slots_scale, "4", "2");
> +EVENT_ATTR_STR(topdown-slots-issued, td_slots_issued,
> + "event=0xe,umask=0x1"); /* uops_issued.any */
> +EVENT_ATTR_STR(topdown-slots-retired, td_slots_retired,
> + "event=0xc2,umask=0x2"); /* uops_retired.retire_slots */
> +EVENT_ATTR_STR(topdown-fetch-bubbles, td_fetch_bubbles,
> + "event=0x9c,umask=0x1"); /* idq_uops_not_delivered_core */
> +EVENT_ATTR_STR_HT(topdown-recovery-bubbles, td_recovery_bubbles,
> + "event=0xd,umask=0x3,cmask=1", /* int_misc.recovery_cycles */
> + "event=0xd,umask=0x3,cmask=1,any=1"); /* int_misc.recovery_cycles_any */
> +EVENT_ATTR_STR_HT(topdown-recovery-bubbles.scale, td_recovery_bubbles_scale,
> + "4", "2");
> +
> struct attribute *snb_events_attrs[] = {
> EVENT_PTR(mem_ld_snb),
> EVENT_PTR(mem_st_snb),
> + EVENT_PTR(td_slots_issued),
> + EVENT_PTR(td_slots_retired),
> + EVENT_PTR(td_fetch_bubbles),
> + EVENT_PTR(td_total_slots),
> + EVENT_PTR(td_total_slots_scale),
> + EVENT_PTR(td_recovery_bubbles),
> + EVENT_PTR(td_recovery_bubbles_scale),
Peter, Ingo,
any thoughts about adding these events? The rest of the
tooling code is based on them being accepted..
thanks,
jirka
next prev parent reply other threads:[~2016-05-11 13:23 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-05 23:03 Add top down metrics to perf stat Andi Kleen
2016-05-05 23:03 ` [PATCH 01/10] x86: Add topology_max_smt_threads() Andi Kleen
2016-05-06 10:13 ` Peter Zijlstra
2016-05-06 10:47 ` Thomas Gleixner
2016-05-06 17:24 ` [UPDATED PATCH " Andi Kleen
2016-05-07 8:11 ` Thomas Gleixner
2016-05-12 8:07 ` Ingo Molnar
2016-05-05 23:03 ` [PATCH 02/10] x86, perf: Support sysfs files depending on SMT status Andi Kleen
2016-05-09 9:42 ` Peter Zijlstra
2016-05-09 14:27 ` Andi Kleen
2016-05-09 14:34 ` Peter Zijlstra
2016-05-12 8:05 ` Ingo Molnar
2016-05-05 23:04 ` [PATCH 03/10] x86, perf: Add Top Down events to Intel Core Andi Kleen
2016-05-11 13:23 ` Jiri Olsa [this message]
2016-05-11 13:29 ` Peter Zijlstra
2016-05-12 8:10 ` Ingo Molnar
2016-05-05 23:04 ` [PATCH 04/10] x86, perf: Add Top Down events to Intel Atom Andi Kleen
2016-05-05 23:04 ` [PATCH 05/10] x86, perf: Use new topology_max_smt_threads() in HT leak workaround Andi Kleen
2016-05-05 23:04 ` [PATCH 06/10] perf, tools, stat: Avoid fractional digits for integer scales Andi Kleen
2016-05-07 19:10 ` Jiri Olsa
2016-05-07 19:24 ` Andi Kleen
2016-05-11 13:00 ` Jiri Olsa
2016-05-11 16:43 ` Arnaldo Carvalho de Melo
2016-05-20 6:42 ` [tip:perf/urgent] perf " tip-bot for Andi Kleen
2016-05-05 23:04 ` [PATCH 07/10] perf, tools, stat: Scale values by unit before metrics Andi Kleen
2016-05-07 19:14 ` Jiri Olsa
2016-05-10 20:30 ` [tip:perf/core] perf " tip-bot for Andi Kleen
2016-05-05 23:04 ` [PATCH 08/10] perf, tools, stat: Basic support for TopDown in perf stat Andi Kleen
2016-05-05 23:04 ` [PATCH 09/10] perf, tools, stat: Add computation of TopDown formulas Andi Kleen
2016-05-05 23:04 ` [PATCH 10/10] perf, tools, stat: Add extra output of counter values with -vv Andi Kleen
2016-05-12 8:03 ` Jiri Olsa
2016-05-20 0:05 ` Andi Kleen
2016-05-12 7:47 ` Add top down metrics to perf stat Jiri Olsa
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