From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Date: Mon, 23 May 2016 20:53:20 +0000 Subject: Re: [PATCH v2 03/12] of: add J-Core interrupt controller bindings Message-Id: <20160523205320.GA21655@rob-hp-laptop> List-Id: References: <2bdca4260d5bb2b3820e4309e2ba445c4c7bfbf6.1463708766.git.dalias@libc.org> In-Reply-To: <2bdca4260d5bb2b3820e4309e2ba445c4c7bfbf6.1463708766.git.dalias@libc.org> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Rich Felker Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sh@vger.kernel.org, Ian Campbell , Jason Cooper , Kumar Gala , Marc Zyngier , Mark Rutland , Pawel Moll , Thomas Gleixner On Fri, May 20, 2016 at 02:53:04AM +0000, Rich Felker wrote: > Signed-off-by: Rich Felker > --- > .../bindings/interrupt-controller/jcore,aic.txt | 28 ++++++++++++++++++++++ > 1 file changed, 28 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt b/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt > new file mode 100644 > index 0000000..dc9fde8 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt > @@ -0,0 +1,28 @@ > +J-Core Advanced Interrupt Controller > + > +Required properties: > + > +- compatible : Should be "jcore,aic1" for the (obsolete) first-generation aic > + with 8 interrupt lines with programmable priorities, or "jcore,aic2" for > + the "aic2" core with 64 interrupts. > + > +- interrupt-controller : Identifies the node as an interrupt controller > + > +- #interrupt-cells : Specifies the number of cells needed to encode an > + interrupt source. The value shall be 1. No level/edge support? Need 2 cells if so. > + > +Additional properties required for aic1: > + > +- reg : Memory region for configuration. > + > +- cpu-offset : For SMP, the offset to the per-cpu memory region for > + configuration, to be scaled by the cpu number. > + > + > +Example: > + > +aic: interrupt-controller { > + compatible = "jcore,aic2"; > + interrupt-controller; > + #interrupt-cells = <1>; > +}; > -- > 2.8.1 > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752001AbcEWUx2 (ORCPT ); Mon, 23 May 2016 16:53:28 -0400 Received: from mail.kernel.org ([198.145.29.136]:53317 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751789AbcEWUxZ (ORCPT ); Mon, 23 May 2016 16:53:25 -0400 Date: Mon, 23 May 2016 15:53:20 -0500 From: Rob Herring To: Rich Felker Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sh@vger.kernel.org, Ian Campbell , Jason Cooper , Kumar Gala , Marc Zyngier , Mark Rutland , Pawel Moll , Thomas Gleixner Subject: Re: [PATCH v2 03/12] of: add J-Core interrupt controller bindings Message-ID: <20160523205320.GA21655@rob-hp-laptop> References: <2bdca4260d5bb2b3820e4309e2ba445c4c7bfbf6.1463708766.git.dalias@libc.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <2bdca4260d5bb2b3820e4309e2ba445c4c7bfbf6.1463708766.git.dalias@libc.org> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 20, 2016 at 02:53:04AM +0000, Rich Felker wrote: > Signed-off-by: Rich Felker > --- > .../bindings/interrupt-controller/jcore,aic.txt | 28 ++++++++++++++++++++++ > 1 file changed, 28 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt b/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt > new file mode 100644 > index 0000000..dc9fde8 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt > @@ -0,0 +1,28 @@ > +J-Core Advanced Interrupt Controller > + > +Required properties: > + > +- compatible : Should be "jcore,aic1" for the (obsolete) first-generation aic > + with 8 interrupt lines with programmable priorities, or "jcore,aic2" for > + the "aic2" core with 64 interrupts. > + > +- interrupt-controller : Identifies the node as an interrupt controller > + > +- #interrupt-cells : Specifies the number of cells needed to encode an > + interrupt source. The value shall be 1. No level/edge support? Need 2 cells if so. > + > +Additional properties required for aic1: > + > +- reg : Memory region for configuration. > + > +- cpu-offset : For SMP, the offset to the per-cpu memory region for > + configuration, to be scaled by the cpu number. > + > + > +Example: > + > +aic: interrupt-controller { > + compatible = "jcore,aic2"; > + interrupt-controller; > + #interrupt-cells = <1>; > +}; > -- > 2.8.1 > >