From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756244AbcE0Q6Y (ORCPT ); Fri, 27 May 2016 12:58:24 -0400 Received: from mail-bn1bon0069.outbound.protection.outlook.com ([157.56.111.69]:3866 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754539AbcE0Q6U (ORCPT ); Fri, 27 May 2016 12:58:20 -0400 Authentication-Results: arm.com; dkim=none (message not signed) header.d=none;arm.com; dmarc=none action=none header.from=caviumnetworks.com; Date: Fri, 27 May 2016 19:58:06 +0300 From: Yury Norov To: Catalin Marinas CC: Arnd Bergmann , Heiko Carstens , David Miller , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH 01/23] all: syscall wrappers: add documentation Message-ID: <20160527165806.GA20966@yury-N73SV> References: <6293194.tGy03QJ9ME@wuerfel> <13240365.okADkKsTBJ@wuerfel> <20160527093052.GB7865@e104818-lin.cambridge.arm.com> <5422652.7gdoDlB8u0@wuerfel> <20160527130446.GD7865@e104818-lin.cambridge.arm.com> MIME-Version: 1.0 Content-Type: text/plain; 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X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1;SN1PR07MB2237;23:6hUbD4duW1//h9hLUZSE2xVHjFAfrCwcdv4HdJvd4?= =?us-ascii?Q?fEvuhaL1oRkvbqs6QtpxTVNftH7G7qc0lqYB5u8aZEOgf8qH9SEYVz9xyPRs?= =?us-ascii?Q?GFUwRi13ZL6XjnPi9T3cpVOfB3x/Wb2r3G0Ro8De/+yFlLE6JWhh6tFKGWqe?= =?us-ascii?Q?8bmCd+gAg+EQfbYSEV6EG140GjVjDUCsX3XOoMSpqnChqmhkFh6PeboMvxSS?= =?us-ascii?Q?UsEcdOTi4SrPpmtpd49JwpzMjECduVSi1k8Xw01NghJOskm8zNu0Y6EQsXtY?= =?us-ascii?Q?oOFiTmUU23K4Rhm7qNzx6Ep8O8aIsjVmT+9zAY5fFvBvlfTOeWueUcaOfKi7?= =?us-ascii?Q?I6+cYGjau8Oxj+NY7GJofyoZdw2MM/diXPcgFqABRyH0M+AA5UdLuqK7co/4?= =?us-ascii?Q?YDeCIcGd4T68yW2w1E4K4MjXRxQ5+rvQXI2XMy5/HLHaTU4k51S0bIfPnEB1?= =?us-ascii?Q?tTRSLEOdwEdkd2SIJfVViGQgAvQMAo9zueclCGw3Hetzzd6p+whs3ioQiL0i?= =?us-ascii?Q?g7I8KPFtODW0dLkooP1MyOfPveYMJJUpshqsBvG/RIjrlWmAnAu/G0gg3vVv?= =?us-ascii?Q?Mn9Vb3yTcOS073iRZks0ozVBdcQjLL6C6DTklHGIloVNhg+0L38bXwSYH/Om?= =?us-ascii?Q?fubiFnk/lq4x+5WHMqJBgiJhC8ZX4vTbpstnPDNXoi2tWLsAnopgaeKoDBZd?= =?us-ascii?Q?8Kpd5QdU6v8pv4MEx6ruTSo3Ewv2LBLnfgFthRVGTpIrBSTkmZ2JwCgqT5em?= =?us-ascii?Q?ow97DC0oe1lNNgVXH7vfAo5+w03m0gRFz5nDkaOUbBI8Xkzrh5N6se7r9Erf?= =?us-ascii?Q?70wKF+lJTELsRrq21qq6FVoGlvMgufWMPd8wsWoCM/HWvD7rk/B2QkjWYWCw?= =?us-ascii?Q?EeK8c7gaRSxFY6nGjnWnmVWsp84cEBnxNQCp5tfPVkr71UdqfIcRzicf64op?= =?us-ascii?Q?rcl9BJUJz/pIE65HTA13JyQR+c+h+XUnKXGGbn8wbdxdOZwlPtj3cdvtLkCu?= =?us-ascii?Q?Qg=3D?= X-Microsoft-Exchange-Diagnostics: 1;SN1PR07MB2237;5:qEJVCFPNESg7EmfpCipIhcBWvWi2+hM74M9/h8iZQsPyvuJu1e4bjHoBQHj139mJe2RYLrGeT9L4Q8czuHXoFPSVzGUBZLOmH47Om/rIxvZxXOuULaE1BF5NRJMcsSVNH6xxmV6Qoqxefo4Fm9gmlg==;24:eU51xfFDWe+u8q9aWfyCj8KqmoUbJLGebkIX/jJS/OBgfV7uHQIv4lNUoLmpGNBX8OKWhvk3RehPqKanhIShh1w8Fi39TcLBqSzA8CE/H6A=;7:ab+dkOVsb01hUOY0a+Q8tnH+2hDsPmQKs7KFH2WIVLVp0/zvfXe64dl9zH2hBvOtfAr56J6xn4eXfCAb17qlXiukmkXavsa832H+GNgEo5RtQBQtGpTwELS2ORau1HS1XwImkqzPk1of1QXnygbJ3hWSF/PNlK5sIFWZEOXpmKECTQi5bgtPcdA0ycvx09U5 SpamDiagnosticOutput: 1:23 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 May 2016 16:58:16.4820 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR07MB2237 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, May 27, 2016 at 02:04:47PM +0100, Catalin Marinas wrote: > On Fri, May 27, 2016 at 12:49:11PM +0200, Arnd Bergmann wrote: > > On Friday, May 27, 2016 10:30:52 AM CEST Catalin Marinas wrote: > > > On Fri, May 27, 2016 at 10:42:59AM +0200, Arnd Bergmann wrote: > > > > On Friday, May 27, 2016 8:03:57 AM CEST Heiko Carstens wrote: > > > > > > > > > Cost wise, this seems like it all cancels out in the end, but what > > > > > > > > > do I know? > > > > > > > > > > > > > > > > I think you know something, and I also think Heiko and other s390 guys > > > > > > > > know something as well. So I'd like to listen their arguments here. > > > > > > > > > > If it comes to 64 bit arguments for compat system calls: s390 also has an > > > > > x32-like ABI extension which allows user space to use full 64 bit > > > > > registers. As far as I know hardly anybody ever made use of that. > > > > > > > > > > However even if that would be widely used, to me it wouldn't make sense to > > > > > add new compat system calls which allow 64 bit arguments, simply because > > > > > something like > > > > > > > > > > c = (u32)a | (u64)b << 32; > > > > > > > > > > can be done with a single 1-cycle instruction. It's just not worth the > > > > > extra effort to maintain additional system call variants. > > > > > > > > For reference, both tile and mips also have separate 32-bit ABIs that are > > > > only used on 64-bit kernels (aside from the normal 32-bit ABI). Tile > > > > does it like s390 and passes 64-bit arguments as pairs, while MIPS > > > > and x86 and pass them as single registers. > > > > > > AFAIK, x32 also requires that the upper half of a 64-bit reg is zeroed > > > by the user when a 32-bit value is passed. We could require the same on > > > AArch64/ILP32 but I'm a bit uneasy on trusting a multitude of C > > > libraries on this. > > > > It's not about trusting a C library, it's about ensuring malicious code > > cannot pass argumentst that the kernel code assumes will never happen. > > At least for pointers and sizes, we have additional checks in place > already, like __access_ok(). Most of the syscalls should be safe since > they either go through some compat functions taking 32-bit arguments or > are routed to native functions which already need to cope with a full > random 64-bit value. It's not a good idea to rely on current implementation. Implementation may be changed and it's impossible to check each and every patch against register top-halves correctness. > > On arm64, I think the only risk comes from syscall handlers expecting > 32-bit arguments but using 64-bit types. Apart from pointer types, I > don't expect this to happen but we could enforce it via a > BUILD_BUG_ON(sizeof(t) > 4 && !__TYPE_IS_PTR(t)) in __SC_DELOUSE as per > the s390 implementation. With ILP32 if we go for 64-bit off_t, those > syscalls would be routed directly to the native layer. > 64-bit off_t doesn't imply we'd rout it directly. At first glance it's looking reasonable but there are other considerations like simplicity and unification with aarch32 that may become more important. That's what David pointed out. So, we have 3 options for now: 1. Clear top halves in entry.S which means we pass off_t as a pair. The cost is performance (didn't measure it yet and doubt about it makes serious impact). The advantage is simplicity and unification with aarch32, as I mentioned above. And David likes it. And it mininizes the amount of changes on glibc side. 2. Clear top halves in in separated file hosted wrappers. 3. Clear top halves in I-cache and tail optimization friendly in-site wrappers. 2 and 3 are the same from ABI point of view. 2 is the worst for me as it is the most complex in implementation and I-cache and tail optimization non-friendly. But Heiko likes it. 3 is what Catalin is talking about, and it was my initial approach. Though I didn't made compiler to do tail optimization, I think we can do it. But 2 is what we have now. And I'd choose it. We'll never get ilp32 done if will roll back previously agreed decisions again and again. Yury. > -- > Catalin From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yury Norov Subject: Re: [PATCH 01/23] all: syscall wrappers: add documentation Date: Fri, 27 May 2016 19:58:06 +0300 Message-ID: <20160527165806.GA20966@yury-N73SV> References: <6293194.tGy03QJ9ME@wuerfel> <13240365.okADkKsTBJ@wuerfel> <20160527093052.GB7865@e104818-lin.cambridge.arm.com> <5422652.7gdoDlB8u0@wuerfel> <20160527130446.GD7865@e104818-lin.cambridge.arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Return-path: Content-Disposition: inline In-Reply-To: <20160527130446.GD7865@e104818-lin.cambridge.arm.com> Sender: linux-doc-owner@vger.kernel.org List-Archive: List-Post: To: Catalin Marinas Cc: Arnd Bergmann , Heiko Carstens , David Miller , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-arch@vger.kernel.org, linux-s390@vger.kernel.org, libc-alpha@sourceware.org, schwidefsky@de.ibm.com, pinskia@gmail.com, broonie@kernel.org, joseph@codesourcery.com, christoph.muellner@theobroma-systems.com, bamvor.zhangjian@huawei.com, szabolcs.nagy@arm.com, klimov.linux@gmail.com, Nathan_Lynch@mentor.com, agraf@suse.de, Prasun.Kapoor@caviumnetworks.com, kilobyte@angband.pl, geert@linux-m68k.org, philipp.tomsich@theobroma-systems.com List-ID: On Fri, May 27, 2016 at 02:04:47PM +0100, Catalin Marinas wrote: > On Fri, May 27, 2016 at 12:49:11PM +0200, Arnd Bergmann wrote: > > On Friday, May 27, 2016 10:30:52 AM CEST Catalin Marinas wrote: > > > On Fri, May 27, 2016 at 10:42:59AM +0200, Arnd Bergmann wrote: > > > > On Friday, May 27, 2016 8:03:57 AM CEST Heiko Carstens wrote: > > > > > > > > > Cost wise, this seems like it all cancels out in the end, but what > > > > > > > > > do I know? > > > > > > > > > > > > > > > > I think you know something, and I also think Heiko and other s390 guys > > > > > > > > know something as well. So I'd like to listen their arguments here. > > > > > > > > > > If it comes to 64 bit arguments for compat system calls: s390 also has an > > > > > x32-like ABI extension which allows user space to use full 64 bit > > > > > registers. As far as I know hardly anybody ever made use of that. > > > > > > > > > > However even if that would be widely used, to me it wouldn't make sense to > > > > > add new compat system calls which allow 64 bit arguments, simply because > > > > > something like > > > > > > > > > > c = (u32)a | (u64)b << 32; > > > > > > > > > > can be done with a single 1-cycle instruction. It's just not worth the > > > > > extra effort to maintain additional system call variants. > > > > > > > > For reference, both tile and mips also have separate 32-bit ABIs that are > > > > only used on 64-bit kernels (aside from the normal 32-bit ABI). Tile > > > > does it like s390 and passes 64-bit arguments as pairs, while MIPS > > > > and x86 and pass them as single registers. > > > > > > AFAIK, x32 also requires that the upper half of a 64-bit reg is zeroed > > > by the user when a 32-bit value is passed. We could require the same on > > > AArch64/ILP32 but I'm a bit uneasy on trusting a multitude of C > > > libraries on this. > > > > It's not about trusting a C library, it's about ensuring malicious code > > cannot pass argumentst that the kernel code assumes will never happen. > > At least for pointers and sizes, we have additional checks in place > already, like __access_ok(). Most of the syscalls should be safe since > they either go through some compat functions taking 32-bit arguments or > are routed to native functions which already need to cope with a full > random 64-bit value. It's not a good idea to rely on current implementation. Implementation may be changed and it's impossible to check each and every patch against register top-halves correctness. > > On arm64, I think the only risk comes from syscall handlers expecting > 32-bit arguments but using 64-bit types. Apart from pointer types, I > don't expect this to happen but we could enforce it via a > BUILD_BUG_ON(sizeof(t) > 4 && !__TYPE_IS_PTR(t)) in __SC_DELOUSE as per > the s390 implementation. With ILP32 if we go for 64-bit off_t, those > syscalls would be routed directly to the native layer. > 64-bit off_t doesn't imply we'd rout it directly. At first glance it's looking reasonable but there are other considerations like simplicity and unification with aarch32 that may become more important. That's what David pointed out. So, we have 3 options for now: 1. Clear top halves in entry.S which means we pass off_t as a pair. The cost is performance (didn't measure it yet and doubt about it makes serious impact). The advantage is simplicity and unification with aarch32, as I mentioned above. And David likes it. And it mininizes the amount of changes on glibc side. 2. Clear top halves in in separated file hosted wrappers. 3. Clear top halves in I-cache and tail optimization friendly in-site wrappers. 2 and 3 are the same from ABI point of view. 2 is the worst for me as it is the most complex in implementation and I-cache and tail optimization non-friendly. But Heiko likes it. 3 is what Catalin is talking about, and it was my initial approach. Though I didn't made compiler to do tail optimization, I think we can do it. But 2 is what we have now. And I'd choose it. We'll never get ilp32 done if will roll back previously agreed decisions again and again. Yury. > -- > Catalin From mboxrd@z Thu Jan 1 00:00:00 1970 From: ynorov@caviumnetworks.com (Yury Norov) Date: Fri, 27 May 2016 19:58:06 +0300 Subject: [PATCH 01/23] all: syscall wrappers: add documentation In-Reply-To: <20160527130446.GD7865@e104818-lin.cambridge.arm.com> References: <6293194.tGy03QJ9ME@wuerfel> <13240365.okADkKsTBJ@wuerfel> <20160527093052.GB7865@e104818-lin.cambridge.arm.com> <5422652.7gdoDlB8u0@wuerfel> <20160527130446.GD7865@e104818-lin.cambridge.arm.com> Message-ID: <20160527165806.GA20966@yury-N73SV> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, May 27, 2016 at 02:04:47PM +0100, Catalin Marinas wrote: > On Fri, May 27, 2016 at 12:49:11PM +0200, Arnd Bergmann wrote: > > On Friday, May 27, 2016 10:30:52 AM CEST Catalin Marinas wrote: > > > On Fri, May 27, 2016 at 10:42:59AM +0200, Arnd Bergmann wrote: > > > > On Friday, May 27, 2016 8:03:57 AM CEST Heiko Carstens wrote: > > > > > > > > > Cost wise, this seems like it all cancels out in the end, but what > > > > > > > > > do I know? > > > > > > > > > > > > > > > > I think you know something, and I also think Heiko and other s390 guys > > > > > > > > know something as well. So I'd like to listen their arguments here. > > > > > > > > > > If it comes to 64 bit arguments for compat system calls: s390 also has an > > > > > x32-like ABI extension which allows user space to use full 64 bit > > > > > registers. As far as I know hardly anybody ever made use of that. > > > > > > > > > > However even if that would be widely used, to me it wouldn't make sense to > > > > > add new compat system calls which allow 64 bit arguments, simply because > > > > > something like > > > > > > > > > > c = (u32)a | (u64)b << 32; > > > > > > > > > > can be done with a single 1-cycle instruction. It's just not worth the > > > > > extra effort to maintain additional system call variants. > > > > > > > > For reference, both tile and mips also have separate 32-bit ABIs that are > > > > only used on 64-bit kernels (aside from the normal 32-bit ABI). Tile > > > > does it like s390 and passes 64-bit arguments as pairs, while MIPS > > > > and x86 and pass them as single registers. > > > > > > AFAIK, x32 also requires that the upper half of a 64-bit reg is zeroed > > > by the user when a 32-bit value is passed. We could require the same on > > > AArch64/ILP32 but I'm a bit uneasy on trusting a multitude of C > > > libraries on this. > > > > It's not about trusting a C library, it's about ensuring malicious code > > cannot pass argumentst that the kernel code assumes will never happen. > > At least for pointers and sizes, we have additional checks in place > already, like __access_ok(). Most of the syscalls should be safe since > they either go through some compat functions taking 32-bit arguments or > are routed to native functions which already need to cope with a full > random 64-bit value. It's not a good idea to rely on current implementation. Implementation may be changed and it's impossible to check each and every patch against register top-halves correctness. > > On arm64, I think the only risk comes from syscall handlers expecting > 32-bit arguments but using 64-bit types. Apart from pointer types, I > don't expect this to happen but we could enforce it via a > BUILD_BUG_ON(sizeof(t) > 4 && !__TYPE_IS_PTR(t)) in __SC_DELOUSE as per > the s390 implementation. With ILP32 if we go for 64-bit off_t, those > syscalls would be routed directly to the native layer. > 64-bit off_t doesn't imply we'd rout it directly. At first glance it's looking reasonable but there are other considerations like simplicity and unification with aarch32 that may become more important. That's what David pointed out. So, we have 3 options for now: 1. Clear top halves in entry.S which means we pass off_t as a pair. The cost is performance (didn't measure it yet and doubt about it makes serious impact). The advantage is simplicity and unification with aarch32, as I mentioned above. And David likes it. And it mininizes the amount of changes on glibc side. 2. Clear top halves in in separated file hosted wrappers. 3. Clear top halves in I-cache and tail optimization friendly in-site wrappers. 2 and 3 are the same from ABI point of view. 2 is the worst for me as it is the most complex in implementation and I-cache and tail optimization non-friendly. But Heiko likes it. 3 is what Catalin is talking about, and it was my initial approach. Though I didn't made compiler to do tail optimization, I think we can do it. But 2 is what we have now. And I'd choose it. We'll never get ilp32 done if will roll back previously agreed decisions again and again. Yury. > -- > Catalin