From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751195AbcFDAYG (ORCPT ); Fri, 3 Jun 2016 20:24:06 -0400 Received: from userp1040.oracle.com ([156.151.31.81]:25995 "EHLO userp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750727AbcFDAYD (ORCPT ); Fri, 3 Jun 2016 20:24:03 -0400 From: Yinghai Lu To: Bjorn Helgaas , David Miller , Benjamin Herrenschmidt , Linus Torvalds Cc: Wei Yang , Khalid Aziz , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Yinghai Lu , sparclinux@vger.kernel.org Subject: [PATCH v12 07/15] sparc/PCI: Keep resource idx order with bridge register number Date: Fri, 3 Jun 2016 17:06:34 -0700 Message-Id: <20160604000642.28162-8-yinghai@kernel.org> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20160604000642.28162-1-yinghai@kernel.org> References: <20160604000642.28162-1-yinghai@kernel.org> X-Source-IP: aserv0022.oracle.com [141.146.126.234] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On one system found strange "no compatible bridge window" warning even we already had pref_compat support that add extra pref bit for device resource. PCI: Claiming 0000:00:01.0: Resource 14: 0002000100000000..000200010fffffff [10220c] PCI: Claiming 0000:01:00.0: Resource 1: 0002000100000000..000200010000ffff [100214] pci 0000:01:00.0: can't claim BAR 1 [mem 0x2000100000000-0x200010000ffff 64bit]: no compatible bridge window It turns out that pci_resource_compatible()/pci_up_path_over_pref_mem64() just check resource with bridge pref mmio register idx 15, and we have put resource to use mmio register idx 14 during of_scan_pci_bridge() as the bridge does not have mmio resource. We already fix pci_up_path_over_pref_mem64() to check all bus resources. And at the same time, this patch make resource to have consistent sequence like other arch or directly from pci_read_bridge_bases(), even when non-pref mmio is missing, or out of ordering in firmware reporting. Just hold i = 1 for non pref mmio, and i = 2 for pref mmio. Signed-off-by: Yinghai Lu Tested-by: Khalid Aziz Cc: sparclinux@vger.kernel.org --- arch/sparc/kernel/pci.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c index e7fbf56..e84fa8c 100644 --- a/arch/sparc/kernel/pci.c +++ b/arch/sparc/kernel/pci.c @@ -481,7 +481,7 @@ static void of_scan_pci_bridge(struct pci_pbm_info *pbm, pci_read_bridge_bases(bus); goto after_ranges; } - i = 1; + i = 3; for (; len >= 32; len -= 32, ranges += 8) { u64 start; @@ -513,6 +513,12 @@ static void of_scan_pci_bridge(struct pci_pbm_info *pbm, " for bridge %s\n", node->full_name); continue; } + } else if ((flags & IORESOURCE_PREFETCH) && + !bus->resource[2]->flags) { + res = bus->resource[2]; + } else if (((flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH)) == + IORESOURCE_MEM) && !bus->resource[1]->flags) { + res = bus->resource[1]; } else { if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) { printk(KERN_ERR "PCI: too many memory ranges" -- 2.8.3 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yinghai Lu Date: Sat, 04 Jun 2016 00:06:34 +0000 Subject: [PATCH v12 07/15] sparc/PCI: Keep resource idx order with bridge register number Message-Id: <20160604000642.28162-8-yinghai@kernel.org> List-Id: References: <20160604000642.28162-1-yinghai@kernel.org> In-Reply-To: <20160604000642.28162-1-yinghai@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Bjorn Helgaas , David Miller , Benjamin Herrenschmidt , Linus Torvalds Cc: Wei Yang , Khalid Aziz , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Yinghai Lu , sparclinux@vger.kernel.org On one system found strange "no compatible bridge window" warning even we already had pref_compat support that add extra pref bit for device resource. PCI: Claiming 0000:00:01.0: Resource 14: 0002000100000000..000200010fffffff [10220c] PCI: Claiming 0000:01:00.0: Resource 1: 0002000100000000..000200010000ffff [100214] pci 0000:01:00.0: can't claim BAR 1 [mem 0x2000100000000-0x200010000ffff 64bit]: no compatible bridge window It turns out that pci_resource_compatible()/pci_up_path_over_pref_mem64() just check resource with bridge pref mmio register idx 15, and we have put resource to use mmio register idx 14 during of_scan_pci_bridge() as the bridge does not have mmio resource. We already fix pci_up_path_over_pref_mem64() to check all bus resources. And at the same time, this patch make resource to have consistent sequence like other arch or directly from pci_read_bridge_bases(), even when non-pref mmio is missing, or out of ordering in firmware reporting. Just hold i = 1 for non pref mmio, and i = 2 for pref mmio. Signed-off-by: Yinghai Lu Tested-by: Khalid Aziz Cc: sparclinux@vger.kernel.org --- arch/sparc/kernel/pci.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c index e7fbf56..e84fa8c 100644 --- a/arch/sparc/kernel/pci.c +++ b/arch/sparc/kernel/pci.c @@ -481,7 +481,7 @@ static void of_scan_pci_bridge(struct pci_pbm_info *pbm, pci_read_bridge_bases(bus); goto after_ranges; } - i = 1; + i = 3; for (; len >= 32; len -= 32, ranges += 8) { u64 start; @@ -513,6 +513,12 @@ static void of_scan_pci_bridge(struct pci_pbm_info *pbm, " for bridge %s\n", node->full_name); continue; } + } else if ((flags & IORESOURCE_PREFETCH) && + !bus->resource[2]->flags) { + res = bus->resource[2]; + } else if (((flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH)) = + IORESOURCE_MEM) && !bus->resource[1]->flags) { + res = bus->resource[1]; } else { if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) { printk(KERN_ERR "PCI: too many memory ranges" -- 2.8.3