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From: Andi Kleen <andi@firstfloor.org>
To: x86@kernel.org
Cc: hmh@hmh.eng.br, elliott@hpe.com, linux-kernel@vger.kernel.org,
	Andi Kleen <ak@linux.intel.com>
Subject: [PATCH] x86/microcode/intel: Quieten down microcode updates on large systems
Date: Thu,  9 Jun 2016 06:41:41 -0700	[thread overview]
Message-ID: <20160609134141.5981-1-andi@firstfloor.org> (raw)

From: Andi Kleen <ak@linux.intel.com>

On large systems the microcode driver is very noisy, because it prints
a line for each CPU. The lines are redundant because because usually
all CPUs are updated to the same microcode revision.

All other subsystems have been patched previously to not print
a line for each CPU. Only the microcode driver is left.

Only print an microcode revision update when something changed. This results
in typically only a single line being printed.

v2: Change message to "One or more CPUs"
Signed-off-by: Andi Kleen <ak@linux.intel.com>
---
 arch/x86/kernel/cpu/microcode/intel.c | 25 ++++++++++++++++++-------
 1 file changed, 18 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index cbb3cf0..54f5f6c 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -794,6 +794,7 @@ void reload_ucode_intel(void)
 
 static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
 {
+	static struct cpu_signature prev;
 	struct cpuinfo_x86 *c = &cpu_data(cpu_num);
 	unsigned int val[2];
 
@@ -808,8 +809,14 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
 	}
 
 	csig->rev = c->microcode;
-	pr_info("CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n",
-		cpu_num, csig->sig, csig->pf, csig->rev);
+
+	/* No extra locking on prev, races are harmless. */
+	if (csig->sig != prev.sig || csig->pf != prev.pf ||
+	    csig->rev != prev.rev) {
+		pr_info("One or more CPUs sig=0x%x, pf=0x%x, revision=0x%x\n",
+			csig->sig, csig->pf, csig->rev);
+		prev = *csig;
+	}
 
 	return 0;
 }
@@ -838,6 +845,7 @@ static int apply_microcode_intel(int cpu)
 	struct ucode_cpu_info *uci;
 	struct cpuinfo_x86 *c;
 	unsigned int val[2];
+	static int prev_rev;
 
 	/* We should bind the task to the CPU */
 	if (WARN_ON(raw_smp_processor_id() != cpu))
@@ -872,11 +880,14 @@ static int apply_microcode_intel(int cpu)
 		return -1;
 	}
 
-	pr_info("CPU%d updated to revision 0x%x, date = %04x-%02x-%02x\n",
-		cpu, val[1],
-		mc->hdr.date & 0xffff,
-		mc->hdr.date >> 24,
-		(mc->hdr.date >> 16) & 0xff);
+	if (val[1] != prev_rev) {
+		pr_info("One or more CPUs updated to revision 0x%x, date = %04x-%02x-%02x\n",
+			val[1],
+			mc->hdr.date & 0xffff,
+			mc->hdr.date >> 24,
+			(mc->hdr.date >> 16) & 0xff);
+		prev_rev = val[1];
+	}
 
 	c = &cpu_data(cpu);
 
-- 
2.8.3

             reply	other threads:[~2016-06-09 20:56 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-09 13:41 Andi Kleen [this message]
2016-06-09 23:58 ` [PATCH] x86/microcode/intel: Quieten down microcode updates on large systems Henrique de Moraes Holschuh
2016-06-10  9:54 ` Borislav Petkov
2016-06-14 11:25 ` [tip:x86/microcode] x86/microcode/intel: Do not issue microcode updates messages on each CPU tip-bot for Andi Kleen
  -- strict thread matches above, loose matches on Subject: below --
2016-05-31 21:22 [PATCH] x86/microcode/intel: Quieten down microcode updates on large systems Andi Kleen
2016-06-09  4:34 ` Elliott, Robert (Persistent Memory)
2016-06-09 15:47   ` Henrique de Moraes Holschuh

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