From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933525AbcGJMZM (ORCPT ); Sun, 10 Jul 2016 08:25:12 -0400 Received: from mail-wm0-f66.google.com ([74.125.82.66]:33967 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933287AbcGJMYc (ORCPT ); Sun, 10 Jul 2016 08:24:32 -0400 From: Nicolai Stange To: Thomas Gleixner Cc: Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, John Stultz , Borislav Petkov , Paolo Bonzini , Viresh Kumar , Hidehiro Kawai , "Peter Zijlstra (Intel)" , "Christopher S. Hall" , Adrian Hunter , Suresh Siddha , linux-kernel@vger.kernel.org, Nicolai Stange Subject: [PATCH 2/4] arch, x86, tsc deadline clockevent dev: reduce TSC_DIVISOR to 2 Date: Sun, 10 Jul 2016 14:23:43 +0200 Message-Id: <20160710122345.13061-3-nicstange@gmail.com> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20160710122345.13061-1-nicstange@gmail.com> References: <20160710122345.13061-1-nicstange@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In order to avoid overflowing an u32, the TSC deadline clockevent device's frequency is divided by TSC_DIVISOR at registration. The TSC_DIVISOR is currently defined as equaling 32 which allows for a TSC frequency as high as 2^32 / 10^9ns * 32 = 137 GHz. OTOH, larger values of TSC_DIVISOR introduce bigger roundoff errors into the device's frequency. A value of 2 for TSC_DIVISOR allows for a TSC frequency of 2^32 / 10^9ns * 2 = 8.5 GHz which is still way larger than anything to expect in the next years. Reduce the TSC deadline clockevent device's TSC_DIVISOR from 32 down to 2. Signed-off-by: Nicolai Stange --- arch/x86/kernel/apic/apic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index dce654c..1d22c72 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -311,7 +311,7 @@ int lapic_get_maxlvt(void) /* Clock divisor */ #define APIC_DIVISOR 16 -#define TSC_DIVISOR 32 +#define TSC_DIVISOR 2 /* * This function sets up the local APIC timer, with a timeout of -- 2.9.0