From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com ([134.134.136.24]:37295 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751793AbcGROtY (ORCPT ); Mon, 18 Jul 2016 10:49:24 -0400 Date: Mon, 18 Jul 2016 17:47:40 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Lyude Cc: intel-gfx@lists.freedesktop.org, David Airlie , "open list:INTEL DRM DRIVERS excluding Poulsbo, Moorestow..., linux-kernel@vger.kernel.org open list" , Hans de Goede , stable@vger.kernel.org, Daniel Vetter Subject: Re: [Intel-gfx] [PATCH] drm/i915/skl: Fix redundant cursor update, fix cursor underruns Message-ID: <20160718144740.GM4329@intel.com> References: <1468620836-11735-1-git-send-email-cpaul@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1468620836-11735-1-git-send-email-cpaul@redhat.com> Sender: stable-owner@vger.kernel.org List-ID: On Fri, Jul 15, 2016 at 06:13:56PM -0400, Lyude wrote: > At long last, the time has finally come for Skylake users to plug their > external displays back in. > > During intel_atomic_commit() on Skylake, we've actually been arming the > registers to update the cursor information twice instead of just once. > Once in i9xx_update_cursor(), and once in skl_wm_flush_pipe(). This > isn't actually necessary, and removing the later update in > skl_wm_flush_pipe() has completely stopped the underruns on this T460p > from occurring when moving the mouse cursor from one monitor to another. > > Signed-off-by: Lyude > Cc: Radhakrishna Sripada > Cc: Hans de Goede > Cc: stable@vger.kernel.org > --- > drivers/gpu/drm/i915/intel_pm.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 7ac71ec..4771a03 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -3860,7 +3860,6 @@ skl_wm_flush_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, int pass) > I915_WRITE(PLANE_SURF(pipe, plane), > I915_READ(PLANE_SURF(pipe, plane))); > } > - I915_WRITE(CURBASE(pipe), I915_READ(CURBASE(pipe))); The WM/BUF_CFG register double buffering is armed by the plane surface register, so if you're removing this write, all you actually end up doing is skipping the watermark update. So this is just papering over the bug. This might even cause more explosions when enabling pipes, as the DDB configuration for the cursors on the already enabled pipes might not even get updated, and hence multiple planes migth end up trying to use the same part of the DDB for their FIFOs. -- Ville Syrj�l� Intel OTC From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915/skl: Fix redundant cursor update, fix cursor underruns Date: Mon, 18 Jul 2016 17:47:40 +0300 Message-ID: <20160718144740.GM4329@intel.com> References: <1468620836-11735-1-git-send-email-cpaul@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <1468620836-11735-1-git-send-email-cpaul@redhat.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Lyude Cc: David Airlie , intel-gfx@lists.freedesktop.org, stable@vger.kernel.org, Hans de Goede , "open list:INTEL DRM DRIVERS excluding Poulsbo, Moorestow..., linux-kernel@vger.kernel.org open list" , Daniel Vetter List-Id: dri-devel@lists.freedesktop.org T24gRnJpLCBKdWwgMTUsIDIwMTYgYXQgMDY6MTM6NTZQTSAtMDQwMCwgTHl1ZGUgd3JvdGU6Cj4g QXQgbG9uZyBsYXN0LCB0aGUgdGltZSBoYXMgZmluYWxseSBjb21lIGZvciBTa3lsYWtlIHVzZXJz IHRvIHBsdWcgdGhlaXIKPiBleHRlcm5hbCBkaXNwbGF5cyBiYWNrIGluLgo+IAo+IER1cmluZyBp bnRlbF9hdG9taWNfY29tbWl0KCkgb24gU2t5bGFrZSwgd2UndmUgYWN0dWFsbHkgYmVlbiBhcm1p bmcgdGhlCj4gcmVnaXN0ZXJzIHRvIHVwZGF0ZSB0aGUgY3Vyc29yIGluZm9ybWF0aW9uIHR3aWNl IGluc3RlYWQgb2YganVzdCBvbmNlLgo+IE9uY2UgaW4gaTl4eF91cGRhdGVfY3Vyc29yKCksIGFu ZCBvbmNlIGluIHNrbF93bV9mbHVzaF9waXBlKCkuIFRoaXMKPiBpc24ndCBhY3R1YWxseSBuZWNl c3NhcnksIGFuZCByZW1vdmluZyB0aGUgbGF0ZXIgdXBkYXRlIGluCj4gc2tsX3dtX2ZsdXNoX3Bp cGUoKSBoYXMgY29tcGxldGVseSBzdG9wcGVkIHRoZSB1bmRlcnJ1bnMgb24gdGhpcyBUNDYwcAo+ IGZyb20gb2NjdXJyaW5nIHdoZW4gbW92aW5nIHRoZSBtb3VzZSBjdXJzb3IgZnJvbSBvbmUgbW9u aXRvciB0byBhbm90aGVyLgo+IAo+IFNpZ25lZC1vZmYtYnk6IEx5dWRlIDxjcGF1bEByZWRoYXQu Y29tPgo+IENjOiBSYWRoYWtyaXNobmEgU3JpcGFkYSA8cmFkaGFrcmlzaG5hLnNyaXBhZGFAaW50 ZWwuY29tPgo+IENjOiBIYW5zIGRlIEdvZWRlIDxoZGVnb2VkZUByZWRoYXQuY29tPgo+IENjOiBz dGFibGVAdmdlci5rZXJuZWwub3JnCj4gLS0tCj4gIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVs X3BtLmMgfCAxIC0KPiAgMSBmaWxlIGNoYW5nZWQsIDEgZGVsZXRpb24oLSkKPiAKPiBkaWZmIC0t Z2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfcG0uYyBiL2RyaXZlcnMvZ3B1L2RybS9p OTE1L2ludGVsX3BtLmMKPiBpbmRleCA3YWM3MWVjLi40NzcxYTAzIDEwMDY0NAo+IC0tLSBhL2Ry aXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX3BtLmMKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkx NS9pbnRlbF9wbS5jCj4gQEAgLTM4NjAsNyArMzg2MCw2IEBAIHNrbF93bV9mbHVzaF9waXBlKHN0 cnVjdCBkcm1faTkxNV9wcml2YXRlICpkZXZfcHJpdiwgZW51bSBwaXBlIHBpcGUsIGludCBwYXNz KQo+ICAJCUk5MTVfV1JJVEUoUExBTkVfU1VSRihwaXBlLCBwbGFuZSksCj4gIAkJCSAgIEk5MTVf UkVBRChQTEFORV9TVVJGKHBpcGUsIHBsYW5lKSkpOwo+ICAJfQo+IC0JSTkxNV9XUklURShDVVJC QVNFKHBpcGUpLCBJOTE1X1JFQUQoQ1VSQkFTRShwaXBlKSkpOwoKVGhlIFdNL0JVRl9DRkcgcmVn aXN0ZXIgZG91YmxlIGJ1ZmZlcmluZyBpcyBhcm1lZCBieSB0aGUgcGxhbmUgc3VyZmFjZQpyZWdp c3Rlciwgc28gaWYgeW91J3JlIHJlbW92aW5nIHRoaXMgd3JpdGUsIGFsbCB5b3UgYWN0dWFsbHkg ZW5kIHVwCmRvaW5nIGlzIHNraXBwaW5nIHRoZSB3YXRlcm1hcmsgdXBkYXRlLiBTbyB0aGlzIGlz IGp1c3QgcGFwZXJpbmcgb3Zlcgp0aGUgYnVnLgoKVGhpcyBtaWdodCBldmVuIGNhdXNlIG1vcmUg ZXhwbG9zaW9ucyB3aGVuIGVuYWJsaW5nIHBpcGVzLCBhcyB0aGUgRERCCmNvbmZpZ3VyYXRpb24g Zm9yIHRoZSBjdXJzb3JzIG9uIHRoZSBhbHJlYWR5IGVuYWJsZWQgcGlwZXMgbWlnaHQgbm90CmV2 ZW4gZ2V0IHVwZGF0ZWQsIGFuZCBoZW5jZSBtdWx0aXBsZSBwbGFuZXMgbWlndGggZW5kIHVwIHRy eWluZyB0byB1c2UKdGhlIHNhbWUgcGFydCBvZiB0aGUgRERCIGZvciB0aGVpciBGSUZPcy4KCi0t IApWaWxsZSBTeXJqw6Rsw6QKSW50ZWwgT1RDCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3Rz LmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xp c3RpbmZvL2ludGVsLWdmeAo=