From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36560) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bPHH2-0007ae-14 for qemu-devel@nongnu.org; Mon, 18 Jul 2016 18:44:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bPHGx-0005aE-VM for qemu-devel@nongnu.org; Mon, 18 Jul 2016 18:44:27 -0400 Received: from mx1.redhat.com ([209.132.183.28]:33761) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bPHGx-0005aA-PV for qemu-devel@nongnu.org; Mon, 18 Jul 2016 18:44:23 -0400 Date: Tue, 19 Jul 2016 01:44:18 +0300 From: "Michael S. Tsirkin" Message-ID: <20160719014417-mutt-send-email-mst@redhat.com> References: <1468881010-27229-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1468881010-27229-1-git-send-email-mst@redhat.com> Subject: [Qemu-devel] [PULL 18/55] intel_iommu: handle interrupt remap enable List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Peter Xu , Paolo Bonzini , Richard Henderson , Eduardo Habkost From: Peter Xu Handle writting to IRE bit in global command register. Signed-off-by: Peter Xu Signed-off-by: Peter Xu --- hw/i386/intel_iommu.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index bf74533..6a6cb3b 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -1183,6 +1183,22 @@ static void vtd_handle_gcmd_te(IntelIOMMUState *s, bool en) } } +/* Handle Interrupt Remap Enable/Disable */ +static void vtd_handle_gcmd_ire(IntelIOMMUState *s, bool en) +{ + VTD_DPRINTF(CSR, "Interrupt Remap Enable %s", (en ? "on" : "off")); + + if (en) { + s->intr_enabled = true; + /* Ok - report back to driver */ + vtd_set_clear_mask_long(s, DMAR_GSTS_REG, 0, VTD_GSTS_IRES); + } else { + s->intr_enabled = false; + /* Ok - report back to driver */ + vtd_set_clear_mask_long(s, DMAR_GSTS_REG, VTD_GSTS_IRES, 0); + } +} + /* Handle write to Global Command Register */ static void vtd_handle_gcmd_write(IntelIOMMUState *s) { @@ -1207,6 +1223,10 @@ static void vtd_handle_gcmd_write(IntelIOMMUState *s) /* Set/update the interrupt remapping root-table pointer */ vtd_handle_gcmd_sirtp(s); } + if (changed & VTD_GCMD_IRE) { + /* Interrupt remap enable/disable */ + vtd_handle_gcmd_ire(s, val & VTD_GCMD_IRE); + } } /* Handle write to Context Command Register */ -- MST