From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Tue, 02 Aug 2016 10:29:44 +0200 (CEST) Received: from localhost.localdomain ([127.0.0.1]:59424 "EHLO linux-mips.org" rhost-flags-OK-OK-OK-FAIL) by eddie.linux-mips.org with ESMTP id S23992990AbcHBI3d7hfqO (ORCPT ); Tue, 2 Aug 2016 10:29:33 +0200 Received: from scotty.linux-mips.net (localhost.localdomain [127.0.0.1]) by scotty.linux-mips.net (8.15.2/8.14.8) with ESMTP id u728TSrS016397; Tue, 2 Aug 2016 10:29:28 +0200 Received: (from ralf@localhost) by scotty.linux-mips.net (8.15.2/8.15.2/Submit) id u728TNws016396; Tue, 2 Aug 2016 10:29:23 +0200 Date: Tue, 2 Aug 2016 10:29:23 +0200 From: Ralf Baechle To: Binbin Zhou , James Hogan Cc: John Crispin , linux-mips@linux-mips.org, Fuxin Zhang , Zhangjin Wu , Kelvin Cheung , Chunbo Cui , Huacai Chen Subject: Re: [PATCH RESEND v4 7/9] MIPS: Loongson-1A: Enable SPARSEMEN and HIGHMEM Message-ID: <20160802082923.GA15910@linux-mips.org> References: <1463621912-9883-1-git-send-email-zhoubb@lemote.com> <1463621912-9883-6-git-send-email-zhoubb@lemote.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1463621912-9883-6-git-send-email-zhoubb@lemote.com> User-Agent: Mutt/1.6.2 (2016-07-01) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 54389 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: ralf@linux-mips.org Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips On Thu, May 19, 2016 at 09:38:30AM +0800, Binbin Zhou wrote: > diff --git a/arch/mips/include/asm/sparsemem.h b/arch/mips/include/asm/sparsemem.h > index b1071c1..f73e671 100644 > --- a/arch/mips/include/asm/sparsemem.h > +++ b/arch/mips/include/asm/sparsemem.h > @@ -11,7 +11,11 @@ > #else > # define SECTION_SIZE_BITS 28 > #endif > -#define MAX_PHYSMEM_BITS 48 > +#ifdef CONFIG_64BIT > +# define MAX_PHYSMEM_BITS 48 > +#else > +# define MAX_PHYSMEM_BITS 36 > +#endif This doesn't look right for XPA. What do you think, James? I think we don't use sparsemem on XPA atm so I can apply this safely - but it should be fixed properly. Ralf