From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34212) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bUVC7-0001bi-Fw for qemu-devel@nongnu.org; Tue, 02 Aug 2016 04:37:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bUVC2-0003DS-6I for qemu-devel@nongnu.org; Tue, 02 Aug 2016 04:36:59 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45350) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bUVC2-0003DO-0F for qemu-devel@nongnu.org; Tue, 02 Aug 2016 04:36:54 -0400 Date: Tue, 2 Aug 2016 16:36:48 +0800 From: Peter Xu Message-ID: <20160802083648.GJ6207@pxdev.xzpeter.org> References: <1469123413-20809-1-git-send-email-mst@redhat.com> <1469123413-20809-30-git-send-email-mst@redhat.com> <98a5a157-ba83-bc61-df7e-546c21e23ad3@siemens.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <98a5a157-ba83-bc61-df7e-546c21e23ad3@siemens.com> Subject: Re: [Qemu-devel] [PULL v5 29/57] intel_iommu: add SID validation for IR List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka Cc: qemu-devel@nongnu.org, "Michael S. Tsirkin" , Peter Maydell , Richard Henderson , Eduardo Habkost , Paolo Bonzini , David kiarie , Valentine Sinitsyn On Mon, Aug 01, 2016 at 06:39:05PM +0200, Jan Kiszka wrote: [...] > > static MemTxResult vtd_mem_ir_read(void *opaque, hwaddr addr, > > @@ -2209,11 +2250,17 @@ static MemTxResult vtd_mem_ir_write(void *opaque, hwaddr addr, > > { > > int ret = 0; > > MSIMessage from = {}, to = {}; > > + uint16_t sid = X86_IOMMU_SID_INVALID; > > > > from.address = (uint64_t) addr + VTD_INTERRUPT_ADDR_FIRST; > > from.data = (uint32_t) value; > > > > - ret = vtd_interrupt_remap_msi(opaque, &from, &to); > > + if (!attrs.unspecified) { > > + /* We have explicit Source ID */ > > + sid = attrs.requester_id; > > + } > > ...here you fall back to X86_IOMMU_SID_INVALID if writer to this region > has not provided some valid attrs. That is questionable, defeats > validation of the IOAPIC e.g. (and you can see lots of > X86_IOMMU_SID_INVALID in vtd_irte_get when booting a guest). > > The credits also go to David who noticed that he still doesn't get a > proper ID from the IOAPIC while implementing AMD IR. Looks like we need > to enlighten the IOAPIC MSI writes... Jan, David, At the time when drafting the patch, I skipped SID verification for IOAPIC interrupts since it differs from generic PCI devices (no natural requester ID, so need some hacky lines to enable it). I can try to cook another seperate patch to enable it (for 2.8 possibly?). Thanks for pointing out this issue. -- peterx