From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lee Jones Subject: Re: [RESEND v2 09/10] mfd: Add STMPE1600 support Date: Wed, 10 Aug 2016 09:30:14 +0100 Message-ID: <20160810083014.GO1581@dell> References: <1470814755-19447-1-git-send-email-patrice.chotard@st.com> <1470814755-19447-10-git-send-email-patrice.chotard@st.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <1470814755-19447-10-git-send-email-patrice.chotard@st.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: patrice.chotard@st.com Cc: gnurou@gmail.com, amelie.delaunay@st.com, vireshk@kernel.org, linus.walleij@linaro.org, linux-gpio@vger.kernel.org, thierry.reding@gmail.com, kernel@pengutronix.de, dinguyen@opensource.altera.com, shawnguo@kernel.org, shiraz.linux.kernel@gmail.com, linux-arm-kernel@lists.infradead.org List-Id: linux-gpio@vger.kernel.org T24gV2VkLCAxMCBBdWcgMjAxNiwgcGF0cmljZS5jaG90YXJkQHN0LmNvbSB3cm90ZToKCj4gRnJv bTogUGF0cmljZSBDaG90YXJkIDxwYXRyaWNlLmNob3RhcmRAc3QuY29tPgo+IAo+IFNUTVBFMTYw MCBpcyBhIDE2LWJpdCBwb3J0IGV4cGFuZGVyLgo+IERhdGFzaGVldCBpcyBhdmFpbGFibGUgaGVy ZSA6Cj4gaHR0cDovL3d3dzIuc3QuY29tL2NvbnRlbnQvc3RfY29tL2VuL3Byb2R1Y3RzL2ludGVy ZmFjZXMtYW5kLXRyYW5zY2VpdmVycy8KPiBpLW8tZXhwYW5kZXJzLWFuZC1sZXZlbC10cmFuc2xh dG9ycy9pLW8tZXhwYW5kZXJzL3N0bXBlMTYwMC5odG1sCj4gCj4gU2lnbmVkLW9mZi1ieTogQW1l bGllIERFTEFVTkFZIDxhbWVsaWUuZGVsYXVuYXlAc3QuY29tPgo+IFNpZ25lZC1vZmYtYnk6IFBh dHJpY2UgQ2hvdGFyZCA8cGF0cmljZS5jaG90YXJkQHN0LmNvbT4KPiBBY2tlZC1ieTogTGludXMg V2FsbGVpaiA8bGludXMud2FsbGVpakBsaW5hcm8ub3JnPgo+IEFja2VkLWJ5OiBMZWUgSm9uZXMg PGxlZS5qb25lc0BsaW5hcm8ub3JnPgo+IC0tLQo+ICBkcml2ZXJzL21mZC9zdG1wZS1pMmMuYyAg IHwgIDIgKysKPiAgZHJpdmVycy9tZmQvc3RtcGUuYyAgICAgICB8IDY1ICsrKysrKysrKysrKysr KysrKysrKysrKysrKysrKysrKysrKysrKysrKystLS0tCj4gIGRyaXZlcnMvbWZkL3N0bXBlLmgg ICAgICAgfCAyMSArKysrKysrKysrKysrKysKPiAgaW5jbHVkZS9saW51eC9tZmQvc3RtcGUuaCB8 ICAxICsKPiAgNCBmaWxlcyBjaGFuZ2VkLCA4NCBpbnNlcnRpb25zKCspLCA1IGRlbGV0aW9ucygt KQoKQXBwbGllZCwgdGhhbmtzLgoKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9tZmQvc3RtcGUtaTJj LmMgYi9kcml2ZXJzL21mZC9zdG1wZS1pMmMuYwo+IGluZGV4IGMzZjRhYWIuLjg2M2MzOWEgMTAw NjQ0Cj4gLS0tIGEvZHJpdmVycy9tZmQvc3RtcGUtaTJjLmMKPiArKysgYi9kcml2ZXJzL21mZC9z dG1wZS1pMmMuYwo+IEBAIC01Nyw2ICs1Nyw3IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3Qgb2ZfZGV2 aWNlX2lkIHN0bXBlX29mX21hdGNoW10gPSB7Cj4gIAl7IC5jb21wYXRpYmxlID0gInN0LHN0bXBl NjEwIiwgLmRhdGEgPSAodm9pZCAqKVNUTVBFNjEwLCB9LAo+ICAJeyAuY29tcGF0aWJsZSA9ICJz dCxzdG1wZTgwMSIsIC5kYXRhID0gKHZvaWQgKilTVE1QRTgwMSwgfSwKPiAgCXsgLmNvbXBhdGli bGUgPSAic3Qsc3RtcGU4MTEiLCAuZGF0YSA9ICh2b2lkICopU1RNUEU4MTEsIH0sCj4gKwl7IC5j b21wYXRpYmxlID0gInN0LHN0bXBlMTYwMCIsIC5kYXRhID0gKHZvaWQgKilTVE1QRTE2MDAsIH0s Cj4gIAl7IC5jb21wYXRpYmxlID0gInN0LHN0bXBlMTYwMSIsIC5kYXRhID0gKHZvaWQgKilTVE1Q RTE2MDEsIH0sCj4gIAl7IC5jb21wYXRpYmxlID0gInN0LHN0bXBlMTgwMSIsIC5kYXRhID0gKHZv aWQgKilTVE1QRTE4MDEsIH0sCj4gIAl7IC5jb21wYXRpYmxlID0gInN0LHN0bXBlMjQwMSIsIC5k YXRhID0gKHZvaWQgKilTVE1QRTI0MDEsIH0sCj4gQEAgLTEwMSw2ICsxMDIsNyBAQCBzdGF0aWMg Y29uc3Qgc3RydWN0IGkyY19kZXZpY2VfaWQgc3RtcGVfaTJjX2lkW10gPSB7Cj4gIAl7ICJzdG1w ZTYxMCIsIFNUTVBFNjEwIH0sCj4gIAl7ICJzdG1wZTgwMSIsIFNUTVBFODAxIH0sCj4gIAl7ICJz dG1wZTgxMSIsIFNUTVBFODExIH0sCj4gKwl7ICJzdG1wZTE2MDAiLCBTVE1QRTE2MDAgfSwKPiAg CXsgInN0bXBlMTYwMSIsIFNUTVBFMTYwMSB9LAo+ICAJeyAic3RtcGUxODAxIiwgU1RNUEUxODAx IH0sCj4gIAl7ICJzdG1wZTI0MDEiLCBTVE1QRTI0MDEgfSwKPiBkaWZmIC0tZ2l0IGEvZHJpdmVy cy9tZmQvc3RtcGUuYyBiL2RyaXZlcnMvbWZkL3N0bXBlLmMKPiBpbmRleCBhMDYwODA5Li4zYTY1 MzMxIDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvbWZkL3N0bXBlLmMKPiArKysgYi9kcml2ZXJzL21m ZC9zdG1wZS5jCj4gQEAgLTUzMiw2ICs1MzIsNTkgQEAgc3RhdGljIHN0cnVjdCBzdG1wZV92YXJp YW50X2luZm8gc3RtcGU2MTAgPSB7Cj4gIH07Cj4gIAo+ICAvKgo+ICsgKiBTVE1QRTE2MDAKPiAr ICogQ29tcGFyZWQgdG8gYWxsIG90aGVycyBTVE1QRSB2YXJpYW50LCBMU0IgYW5kIE1TQiByZWdz IGFyZSBsb2NhdGVkIGluIHRoaXMKPiArICogb3JkZXIgOglMU0IgICBhZGRyCj4gKyAqCQlNU0Ig ICBhZGRyICsgMQo+ICsgKiBBcyB0aGVyZSBpcyBvbmx5IDIgKiA4Yml0cyByZWdpc3RlcnMgZm9y IEdQTVIvR1BTUi9JRUdQSU9QUiwgQ1NCIGluZGV4IGlzIE1TQiByZWdpc3RlcnMKPiArICovCj4g Kwo+ICtzdGF0aWMgY29uc3QgdTggc3RtcGUxNjAwX3JlZ3NbXSA9IHsKPiArCVtTVE1QRV9JRFhf Q0hJUF9JRF0JPSBTVE1QRTE2MDBfUkVHX0NISVBfSUQsCj4gKwlbU1RNUEVfSURYX1NZU19DVFJM XQk9IFNUTVBFMTYwMF9SRUdfU1lTX0NUUkwsCj4gKwlbU1RNUEVfSURYX0lDUl9MU0JdCT0gU1RN UEUxNjAwX1JFR19TWVNfQ1RSTCwKPiArCVtTVE1QRV9JRFhfR1BNUl9MU0JdCT0gU1RNUEUxNjAw X1JFR19HUE1SX0xTQiwKPiArCVtTVE1QRV9JRFhfR1BNUl9DU0JdCT0gU1RNUEUxNjAwX1JFR19H UE1SX01TQiwKPiArCVtTVE1QRV9JRFhfR1BTUl9MU0JdCT0gU1RNUEUxNjAwX1JFR19HUFNSX0xT QiwKPiArCVtTVE1QRV9JRFhfR1BTUl9DU0JdCT0gU1RNUEUxNjAwX1JFR19HUFNSX01TQiwKPiAr CVtTVE1QRV9JRFhfR1BEUl9MU0JdCT0gU1RNUEUxNjAwX1JFR19HUERSX0xTQiwKPiArCVtTVE1Q RV9JRFhfR1BEUl9DU0JdCT0gU1RNUEUxNjAwX1JFR19HUERSX01TQiwKPiArCVtTVE1QRV9JRFhf SUVHUElPUl9MU0JdCT0gU1RNUEUxNjAwX1JFR19JRUdQSU9SX0xTQiwKPiArCVtTVE1QRV9JRFhf SUVHUElPUl9DU0JdCT0gU1RNUEUxNjAwX1JFR19JRUdQSU9SX01TQiwKPiArCVtTVE1QRV9JRFhf SVNHUElPUl9MU0JdCT0gU1RNUEUxNjAwX1JFR19JU0dQSU9SX0xTQiwKPiArfTsKPiArCj4gK3N0 YXRpYyBzdHJ1Y3Qgc3RtcGVfdmFyaWFudF9ibG9jayBzdG1wZTE2MDBfYmxvY2tzW10gPSB7Cj4g Kwl7Cj4gKwkJLmNlbGwJPSAmc3RtcGVfZ3Bpb19jZWxsLAo+ICsJCS5pcnEJPSAwLAo+ICsJCS5i bG9jawk9IFNUTVBFX0JMT0NLX0dQSU8sCj4gKwl9LAo+ICt9Owo+ICsKPiArc3RhdGljIGludCBz dG1wZTE2MDBfZW5hYmxlKHN0cnVjdCBzdG1wZSAqc3RtcGUsIHVuc2lnbmVkIGludCBibG9ja3Ms Cj4gKwkJCSAgIGJvb2wgZW5hYmxlKQo+ICt7Cj4gKwlpZiAoYmxvY2tzICYgU1RNUEVfQkxPQ0tf R1BJTykKPiArCQlyZXR1cm4gMDsKPiArCWVsc2UKPiArCQlyZXR1cm4gLUVJTlZBTDsKPiArfQo+ ICsKPiArc3RhdGljIHN0cnVjdCBzdG1wZV92YXJpYW50X2luZm8gc3RtcGUxNjAwID0gewo+ICsJ Lm5hbWUJCT0gInN0bXBlMTYwMCIsCj4gKwkuaWRfdmFsCQk9IFNUTVBFMTYwMF9JRCwKPiArCS5p ZF9tYXNrCT0gMHhmZmZmLAo+ICsJLm51bV9ncGlvcwk9IDE2LAo+ICsJLmFmX2JpdHMJPSAwLAo+ ICsJLnJlZ3MJCT0gc3RtcGUxNjAwX3JlZ3MsCj4gKwkuYmxvY2tzCQk9IHN0bXBlMTYwMF9ibG9j a3MsCj4gKwkubnVtX2Jsb2Nrcwk9IEFSUkFZX1NJWkUoc3RtcGUxNjAwX2Jsb2NrcyksCj4gKwku bnVtX2lycXMJPSBTVE1QRTE2MDBfTlJfSU5URVJOQUxfSVJRUywKPiArCS5lbmFibGUJCT0gc3Rt cGUxNjAwX2VuYWJsZSwKPiArfTsKPiArCj4gKy8qCj4gICAqIFNUTVBFMTYwMQo+ICAgKi8KPiAg Cj4gQEAgLTkyOCw2ICs5ODEsNyBAQCBzdGF0aWMgc3RydWN0IHN0bXBlX3ZhcmlhbnRfaW5mbyAq c3RtcGVfdmFyaWFudF9pbmZvW1NUTVBFX05CUl9QQVJUU10gPSB7Cj4gIAlbU1RNUEU2MTBdCT0g JnN0bXBlNjEwLAo+ICAJW1NUTVBFODAxXQk9ICZzdG1wZTgwMSwKPiAgCVtTVE1QRTgxMV0JPSAm c3RtcGU4MTEsCj4gKwlbU1RNUEUxNjAwXQk9ICZzdG1wZTE2MDAsCj4gIAlbU1RNUEUxNjAxXQk9 ICZzdG1wZTE2MDEsCj4gIAlbU1RNUEUxODAxXQk9ICZzdG1wZTE4MDEsCj4gIAlbU1RNUEUyNDAx XQk9ICZzdG1wZTI0MDEsCj4gQEAgLTk1NCw3ICsxMDA4LDggQEAgc3RhdGljIGlycXJldHVybl90 IHN0bXBlX2lycShpbnQgaXJxLCB2b2lkICpkYXRhKQo+ICAJaW50IHJldDsKPiAgCWludCBpOwo+ ICAKPiAtCWlmICh2YXJpYW50LT5pZF92YWwgPT0gU1RNUEU4MDFfSUQpIHsKPiArCWlmICh2YXJp YW50LT5pZF92YWwgPT0gU1RNUEU4MDFfSUQgfHwKPiArCSAgICB2YXJpYW50LT5pZF92YWwgPT0g U1RNUEUxNjAwX0lEKSB7Cj4gIAkJaW50IGJhc2UgPSBpcnFfY3JlYXRlX21hcHBpbmcoc3RtcGUt PmRvbWFpbiwgMCk7Cj4gIAo+ICAJCWhhbmRsZV9uZXN0ZWRfaXJxKGJhc2UpOwo+IEBAIC0xMTI4 LDEzICsxMTgzLDEzIEBAIHN0YXRpYyBpbnQgc3RtcGVfY2hpcF9pbml0KHN0cnVjdCBzdG1wZSAq c3RtcGUpCj4gIAkJcmV0dXJuIHJldDsKPiAgCj4gIAlpZiAoc3RtcGUtPmlycSA+PSAwKSB7Cj4g LQkJaWYgKGlkID09IFNUTVBFODAxX0lEKQo+ICsJCWlmIChpZCA9PSBTVE1QRTgwMV9JRCB8fCBp ZCA9PSBTVE1QRTE2MDBfSUQpCj4gIAkJCWljciA9IFNUTVBFX1NZU19DVFJMX0lOVF9FTjsKPiAg CQllbHNlCj4gIAkJCWljciA9IFNUTVBFX0lDUl9MU0JfR0lNOwo+ICAKPiAtCQkvKiBTVE1QRTgw MSBkb2Vzbid0IHN1cHBvcnQgRWRnZSBpbnRlcnJ1cHRzICovCj4gLQkJaWYgKGlkICE9IFNUTVBF ODAxX0lEKSB7Cj4gKwkJLyogU1RNUEU4MDEgYW5kIFNUTVBFMTYwMCBkb24ndCBzdXBwb3J0IEVk Z2UgaW50ZXJydXB0cyAqLwo+ICsJCWlmIChpZCAhPSBTVE1QRTgwMV9JRCAmJiBpZCAhPSBTVE1Q RTE2MDBfSUQpIHsKPiAgCQkJaWYgKGlycV90cmlnZ2VyID09IElSUUZfVFJJR0dFUl9GQUxMSU5H IHx8Cj4gIAkJCQkJaXJxX3RyaWdnZXIgPT0gSVJRRl9UUklHR0VSX1JJU0lORykKPiAgCQkJCWlj ciB8PSBTVE1QRV9JQ1JfTFNCX0VER0U7Cj4gQEAgLTExNDIsNyArMTE5Nyw3IEBAIHN0YXRpYyBp bnQgc3RtcGVfY2hpcF9pbml0KHN0cnVjdCBzdG1wZSAqc3RtcGUpCj4gIAo+ICAJCWlmIChpcnFf dHJpZ2dlciA9PSBJUlFGX1RSSUdHRVJfUklTSU5HIHx8Cj4gIAkJCQlpcnFfdHJpZ2dlciA9PSBJ UlFGX1RSSUdHRVJfSElHSCkgewo+IC0JCQlpZiAoaWQgPT0gU1RNUEU4MDFfSUQpCj4gKwkJCWlm IChpZCA9PSBTVE1QRTgwMV9JRCB8fCBpZCA9PSBTVE1QRTE2MDBfSUQpCj4gIAkJCQlpY3IgfD0g U1RNUEVfU1lTX0NUUkxfSU5UX0hJOwo+ICAJCQllbHNlCj4gIAkJCQlpY3IgfD0gU1RNUEVfSUNS X0xTQl9ISUdIOwo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL21mZC9zdG1wZS5oIGIvZHJpdmVycy9t ZmQvc3RtcGUuaAo+IGluZGV4IGYxMjczNDIuLmY3ZWZkZDggMTAwNjQ0Cj4gLS0tIGEvZHJpdmVy cy9tZmQvc3RtcGUuaAo+ICsrKyBiL2RyaXZlcnMvbWZkL3N0bXBlLmgKPiBAQCAtMTY0LDYgKzE2 NCwyNyBAQCBpbnQgc3RtcGVfcmVtb3ZlKHN0cnVjdCBzdG1wZSAqc3RtcGUpOwo+ICAjZGVmaW5l IFNUTVBFODExX1NZU19DVFJMMl9UU19PRkYJKDEgPDwgMykKPiAgCj4gIC8qCj4gKyAqIFNUTVBF MTYwMAo+ICsgKi8KPiArI2RlZmluZSBTVE1QRTE2MDBfSUQJCQkweDAwMTYKPiArI2RlZmluZSBT VE1QRTE2MDBfTlJfSU5URVJOQUxfSVJRUwkxNgo+ICsKPiArI2RlZmluZSBTVE1QRTE2MDBfUkVH X0NISVBfSUQJCTB4MDAKPiArI2RlZmluZSBTVE1QRTE2MDBfUkVHX1NZU19DVFJMCQkweDAzCj4g KyNkZWZpbmUgU1RNUEUxNjAwX1JFR19JRUdQSU9SX0xTQgkweDA4Cj4gKyNkZWZpbmUgU1RNUEUx NjAwX1JFR19JRUdQSU9SX01TQgkweDA5Cj4gKyNkZWZpbmUgU1RNUEUxNjAwX1JFR19JU0dQSU9S X0xTQgkweDBBCj4gKyNkZWZpbmUgU1RNUEUxNjAwX1JFR19JU0dQSU9SX01TQgkweDBCCj4gKyNk ZWZpbmUgU1RNUEUxNjAwX1JFR19HUE1SX0xTQgkJMHgxMAo+ICsjZGVmaW5lIFNUTVBFMTYwMF9S RUdfR1BNUl9NU0IJCTB4MTEKPiArI2RlZmluZSBTVE1QRTE2MDBfUkVHX0dQU1JfTFNCCQkweDEy Cj4gKyNkZWZpbmUgU1RNUEUxNjAwX1JFR19HUFNSX01TQgkJMHgxMwo+ICsjZGVmaW5lIFNUTVBF MTYwMF9SRUdfR1BEUl9MU0IJCTB4MTQKPiArI2RlZmluZSBTVE1QRTE2MDBfUkVHX0dQRFJfTVNC CQkweDE1Cj4gKyNkZWZpbmUgU1RNUEUxNjAwX1JFR19HUFBJUl9MU0IJCTB4MTYKPiArI2RlZmlu ZSBTVE1QRTE2MDBfUkVHX0dQUElSX01TQgkJMHgxNwo+ICsKPiArLyoKPiAgICogU1RNUEUxNjAx Cj4gICAqLwo+ICAKPiBkaWZmIC0tZ2l0IGEvaW5jbHVkZS9saW51eC9tZmQvc3RtcGUuaCBiL2lu Y2x1ZGUvbGludXgvbWZkL3N0bXBlLmgKPiBpbmRleCAzZGNlZDRhLi4wMTcwYmQ2IDEwMDY0NAo+ IC0tLSBhL2luY2x1ZGUvbGludXgvbWZkL3N0bXBlLmgKPiArKysgYi9pbmNsdWRlL2xpbnV4L21m ZC9zdG1wZS5oCj4gQEAgLTI2LDYgKzI2LDcgQEAgZW51bSBzdG1wZV9wYXJ0bnVtIHsKPiAgCVNU TVBFNjEwLAo+ICAJU1RNUEU4MDEsCj4gIAlTVE1QRTgxMSwKPiArCVNUTVBFMTYwMCwKPiAgCVNU TVBFMTYwMSwKPiAgCVNUTVBFMTgwMSwKPiAgCVNUTVBFMjQwMSwKCi0tIApMZWUgSm9uZXMKTGlu YXJvIFNUTWljcm9lbGVjdHJvbmljcyBMYW5kaW5nIFRlYW0gTGVhZApMaW5hcm8ub3JnIOKUgiBP cGVuIHNvdXJjZSBzb2Z0d2FyZSBmb3IgQVJNIFNvQ3MKRm9sbG93IExpbmFybzogRmFjZWJvb2sg fCBUd2l0dGVyIHwgQmxvZwoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX18KbGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QKbGludXgtYXJtLWtlcm5lbEBs aXN0cy5pbmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlz dGluZm8vbGludXgtYXJtLWtlcm5lbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: lee.jones@linaro.org (Lee Jones) Date: Wed, 10 Aug 2016 09:30:14 +0100 Subject: [RESEND v2 09/10] mfd: Add STMPE1600 support In-Reply-To: <1470814755-19447-10-git-send-email-patrice.chotard@st.com> References: <1470814755-19447-1-git-send-email-patrice.chotard@st.com> <1470814755-19447-10-git-send-email-patrice.chotard@st.com> Message-ID: <20160810083014.GO1581@dell> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wed, 10 Aug 2016, patrice.chotard at st.com wrote: > From: Patrice Chotard > > STMPE1600 is a 16-bit port expander. > Datasheet is available here : > http://www2.st.com/content/st_com/en/products/interfaces-and-transceivers/ > i-o-expanders-and-level-translators/i-o-expanders/stmpe1600.html > > Signed-off-by: Amelie DELAUNAY > Signed-off-by: Patrice Chotard > Acked-by: Linus Walleij > Acked-by: Lee Jones > --- > drivers/mfd/stmpe-i2c.c | 2 ++ > drivers/mfd/stmpe.c | 65 +++++++++++++++++++++++++++++++++++++++++++---- > drivers/mfd/stmpe.h | 21 +++++++++++++++ > include/linux/mfd/stmpe.h | 1 + > 4 files changed, 84 insertions(+), 5 deletions(-) Applied, thanks. > diff --git a/drivers/mfd/stmpe-i2c.c b/drivers/mfd/stmpe-i2c.c > index c3f4aab..863c39a 100644 > --- a/drivers/mfd/stmpe-i2c.c > +++ b/drivers/mfd/stmpe-i2c.c > @@ -57,6 +57,7 @@ static const struct of_device_id stmpe_of_match[] = { > { .compatible = "st,stmpe610", .data = (void *)STMPE610, }, > { .compatible = "st,stmpe801", .data = (void *)STMPE801, }, > { .compatible = "st,stmpe811", .data = (void *)STMPE811, }, > + { .compatible = "st,stmpe1600", .data = (void *)STMPE1600, }, > { .compatible = "st,stmpe1601", .data = (void *)STMPE1601, }, > { .compatible = "st,stmpe1801", .data = (void *)STMPE1801, }, > { .compatible = "st,stmpe2401", .data = (void *)STMPE2401, }, > @@ -101,6 +102,7 @@ static const struct i2c_device_id stmpe_i2c_id[] = { > { "stmpe610", STMPE610 }, > { "stmpe801", STMPE801 }, > { "stmpe811", STMPE811 }, > + { "stmpe1600", STMPE1600 }, > { "stmpe1601", STMPE1601 }, > { "stmpe1801", STMPE1801 }, > { "stmpe2401", STMPE2401 }, > diff --git a/drivers/mfd/stmpe.c b/drivers/mfd/stmpe.c > index a060809..3a65331 100644 > --- a/drivers/mfd/stmpe.c > +++ b/drivers/mfd/stmpe.c > @@ -532,6 +532,59 @@ static struct stmpe_variant_info stmpe610 = { > }; > > /* > + * STMPE1600 > + * Compared to all others STMPE variant, LSB and MSB regs are located in this > + * order : LSB addr > + * MSB addr + 1 > + * As there is only 2 * 8bits registers for GPMR/GPSR/IEGPIOPR, CSB index is MSB registers > + */ > + > +static const u8 stmpe1600_regs[] = { > + [STMPE_IDX_CHIP_ID] = STMPE1600_REG_CHIP_ID, > + [STMPE_IDX_SYS_CTRL] = STMPE1600_REG_SYS_CTRL, > + [STMPE_IDX_ICR_LSB] = STMPE1600_REG_SYS_CTRL, > + [STMPE_IDX_GPMR_LSB] = STMPE1600_REG_GPMR_LSB, > + [STMPE_IDX_GPMR_CSB] = STMPE1600_REG_GPMR_MSB, > + [STMPE_IDX_GPSR_LSB] = STMPE1600_REG_GPSR_LSB, > + [STMPE_IDX_GPSR_CSB] = STMPE1600_REG_GPSR_MSB, > + [STMPE_IDX_GPDR_LSB] = STMPE1600_REG_GPDR_LSB, > + [STMPE_IDX_GPDR_CSB] = STMPE1600_REG_GPDR_MSB, > + [STMPE_IDX_IEGPIOR_LSB] = STMPE1600_REG_IEGPIOR_LSB, > + [STMPE_IDX_IEGPIOR_CSB] = STMPE1600_REG_IEGPIOR_MSB, > + [STMPE_IDX_ISGPIOR_LSB] = STMPE1600_REG_ISGPIOR_LSB, > +}; > + > +static struct stmpe_variant_block stmpe1600_blocks[] = { > + { > + .cell = &stmpe_gpio_cell, > + .irq = 0, > + .block = STMPE_BLOCK_GPIO, > + }, > +}; > + > +static int stmpe1600_enable(struct stmpe *stmpe, unsigned int blocks, > + bool enable) > +{ > + if (blocks & STMPE_BLOCK_GPIO) > + return 0; > + else > + return -EINVAL; > +} > + > +static struct stmpe_variant_info stmpe1600 = { > + .name = "stmpe1600", > + .id_val = STMPE1600_ID, > + .id_mask = 0xffff, > + .num_gpios = 16, > + .af_bits = 0, > + .regs = stmpe1600_regs, > + .blocks = stmpe1600_blocks, > + .num_blocks = ARRAY_SIZE(stmpe1600_blocks), > + .num_irqs = STMPE1600_NR_INTERNAL_IRQS, > + .enable = stmpe1600_enable, > +}; > + > +/* > * STMPE1601 > */ > > @@ -928,6 +981,7 @@ static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = { > [STMPE610] = &stmpe610, > [STMPE801] = &stmpe801, > [STMPE811] = &stmpe811, > + [STMPE1600] = &stmpe1600, > [STMPE1601] = &stmpe1601, > [STMPE1801] = &stmpe1801, > [STMPE2401] = &stmpe2401, > @@ -954,7 +1008,8 @@ static irqreturn_t stmpe_irq(int irq, void *data) > int ret; > int i; > > - if (variant->id_val == STMPE801_ID) { > + if (variant->id_val == STMPE801_ID || > + variant->id_val == STMPE1600_ID) { > int base = irq_create_mapping(stmpe->domain, 0); > > handle_nested_irq(base); > @@ -1128,13 +1183,13 @@ static int stmpe_chip_init(struct stmpe *stmpe) > return ret; > > if (stmpe->irq >= 0) { > - if (id == STMPE801_ID) > + if (id == STMPE801_ID || id == STMPE1600_ID) > icr = STMPE_SYS_CTRL_INT_EN; > else > icr = STMPE_ICR_LSB_GIM; > > - /* STMPE801 doesn't support Edge interrupts */ > - if (id != STMPE801_ID) { > + /* STMPE801 and STMPE1600 don't support Edge interrupts */ > + if (id != STMPE801_ID && id != STMPE1600_ID) { > if (irq_trigger == IRQF_TRIGGER_FALLING || > irq_trigger == IRQF_TRIGGER_RISING) > icr |= STMPE_ICR_LSB_EDGE; > @@ -1142,7 +1197,7 @@ static int stmpe_chip_init(struct stmpe *stmpe) > > if (irq_trigger == IRQF_TRIGGER_RISING || > irq_trigger == IRQF_TRIGGER_HIGH) { > - if (id == STMPE801_ID) > + if (id == STMPE801_ID || id == STMPE1600_ID) > icr |= STMPE_SYS_CTRL_INT_HI; > else > icr |= STMPE_ICR_LSB_HIGH; > diff --git a/drivers/mfd/stmpe.h b/drivers/mfd/stmpe.h > index f127342..f7efdd8 100644 > --- a/drivers/mfd/stmpe.h > +++ b/drivers/mfd/stmpe.h > @@ -164,6 +164,27 @@ int stmpe_remove(struct stmpe *stmpe); > #define STMPE811_SYS_CTRL2_TS_OFF (1 << 3) > > /* > + * STMPE1600 > + */ > +#define STMPE1600_ID 0x0016 > +#define STMPE1600_NR_INTERNAL_IRQS 16 > + > +#define STMPE1600_REG_CHIP_ID 0x00 > +#define STMPE1600_REG_SYS_CTRL 0x03 > +#define STMPE1600_REG_IEGPIOR_LSB 0x08 > +#define STMPE1600_REG_IEGPIOR_MSB 0x09 > +#define STMPE1600_REG_ISGPIOR_LSB 0x0A > +#define STMPE1600_REG_ISGPIOR_MSB 0x0B > +#define STMPE1600_REG_GPMR_LSB 0x10 > +#define STMPE1600_REG_GPMR_MSB 0x11 > +#define STMPE1600_REG_GPSR_LSB 0x12 > +#define STMPE1600_REG_GPSR_MSB 0x13 > +#define STMPE1600_REG_GPDR_LSB 0x14 > +#define STMPE1600_REG_GPDR_MSB 0x15 > +#define STMPE1600_REG_GPPIR_LSB 0x16 > +#define STMPE1600_REG_GPPIR_MSB 0x17 > + > +/* > * STMPE1601 > */ > > diff --git a/include/linux/mfd/stmpe.h b/include/linux/mfd/stmpe.h > index 3dced4a..0170bd6 100644 > --- a/include/linux/mfd/stmpe.h > +++ b/include/linux/mfd/stmpe.h > @@ -26,6 +26,7 @@ enum stmpe_partnum { > STMPE610, > STMPE801, > STMPE811, > + STMPE1600, > STMPE1601, > STMPE1801, > STMPE2401, -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org ? 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