diff for duplicates of <20160819173233.13260-4-thierry.reding@gmail.com>
diff --git a/a/1.txt b/N1/1.txt
index c3aa4ae..0f021c6 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,4 +1,4 @@
-From: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+From: Joseph Lo <josephl@nvidia.com>
The Boot and Power Management Processor (BPMP) is a co-processor found
in Tegra SoCs. It is designed to handle the early stages of the boot
@@ -9,11 +9,11 @@ The binding document defines the resources that are used by the BPMP
firmware, which implements the interprocessor communication (IPC)
between the CPU and the BPMP.
-Signed-off-by: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
-Acked-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
-Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
-Acked-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
-Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+Signed-off-by: Joseph Lo <josephl@nvidia.com>
+Acked-by: Stephen Warren <swarren@nvidia.com>
+Acked-by: Rob Herring <robh@kernel.org>
+Acked-by: Jon Hunter <jonathanh@nvidia.com>
+Signed-off-by: Thierry Reding <treding@nvidia.com>
---
.../bindings/firmware/nvidia,tegra186-bpmp.txt | 77 ++
include/dt-bindings/clock/tegra186-clock.h | 940 +++++++++++++++++++++
@@ -76,24 +76,24 @@ index 000000000000..14d7fd035562
+
+Example:
+
-+hsp_top0: hsp@03c00000 {
++hsp_top0: hsp at 03c00000 {
+ ...
+ #mbox-cells = <2>;
+};
+
-+sysram@30000000 {
++sysram at 30000000 {
+ compatible = "nvidia,tegra186-sysram", "mmio-sram";
+ reg = <0x0 0x30000000 0x0 0x50000>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0 0x0 0x0 0x30000000 0x0 0x50000>;
+
-+ cpu_bpmp_tx: bpmp_shmem@4e000 {
++ cpu_bpmp_tx: bpmp_shmem at 4e000 {
+ compatible = "nvidia,tegra186-bpmp-shmem";
+ reg = <0x0 0x4e000 0x0 0x1000>;
+ };
+
-+ cpu_bpmp_rx: bpmp_shmem@4f000 {
++ cpu_bpmp_rx: bpmp_shmem at 4f000 {
+ compatible = "nvidia,tegra186-bpmp-shmem";
+ reg = <0x0 0x4f000 0x0 0x1000>;
+ };
diff --git a/a/content_digest b/N1/content_digest
index efb7ee1..22fa6d7 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,10 +2,7 @@
"ref\00020160819173233.13260-1-thierry.reding\@gmail.com\0"
]
[
- "ref\00020160819173233.13260-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w\@public.gmane.org\0"
-]
-[
- "From\0Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w\@public.gmane.org>\0"
+ "From\0thierry.reding\@gmail.com (Thierry Reding)\0"
]
[
"Subject\0[PATCH v3 03/12] dt-bindings: firmware: Add bindings for Tegra BPMP\0"
@@ -14,16 +11,7 @@
"Date\0Fri, 19 Aug 2016 19:32:24 +0200\0"
]
[
- "To\0Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w\@public.gmane.org>\0"
-]
-[
- "Cc\0Timo Alho <talho-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>",
- " Peter De Schrijver <pdeschrijver-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>",
- " Sivaram Nair <sivaramn-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>",
- " Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>",
- " linux-tegra-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org",
- " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r\@public.gmane.org",
- " devicetree-u79uwXL29TY76Z2rM5mHXA\@public.gmane.org\0"
+ "To\0linux-arm-kernel\@lists.infradead.org\0"
]
[
"\0000:1\0"
@@ -32,7 +20,7 @@
"b\0"
]
[
- "From: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>\n",
+ "From: Joseph Lo <josephl\@nvidia.com>\n",
"\n",
"The Boot and Power Management Processor (BPMP) is a co-processor found\n",
"in Tegra SoCs. It is designed to handle the early stages of the boot\n",
@@ -43,11 +31,11 @@
"firmware, which implements the interprocessor communication (IPC)\n",
"between the CPU and the BPMP.\n",
"\n",
- "Signed-off-by: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>\n",
- "Acked-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>\n",
- "Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A\@public.gmane.org>\n",
- "Acked-by: Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>\n",
- "Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA\@public.gmane.org>\n",
+ "Signed-off-by: Joseph Lo <josephl\@nvidia.com>\n",
+ "Acked-by: Stephen Warren <swarren\@nvidia.com>\n",
+ "Acked-by: Rob Herring <robh\@kernel.org>\n",
+ "Acked-by: Jon Hunter <jonathanh\@nvidia.com>\n",
+ "Signed-off-by: Thierry Reding <treding\@nvidia.com>\n",
"---\n",
" .../bindings/firmware/nvidia,tegra186-bpmp.txt | 77 ++\n",
" include/dt-bindings/clock/tegra186-clock.h | 940 +++++++++++++++++++++\n",
@@ -110,24 +98,24 @@
"+\n",
"+Example:\n",
"+\n",
- "+hsp_top0: hsp\@03c00000 {\n",
+ "+hsp_top0: hsp at 03c00000 {\n",
"+\t...\n",
"+\t#mbox-cells = <2>;\n",
"+};\n",
"+\n",
- "+sysram\@30000000 {\n",
+ "+sysram at 30000000 {\n",
"+\tcompatible = \"nvidia,tegra186-sysram\", \"mmio-sram\";\n",
"+\treg = <0x0 0x30000000 0x0 0x50000>;\n",
"+\t#address-cells = <2>;\n",
"+\t#size-cells = <2>;\n",
"+\tranges = <0 0x0 0x0 0x30000000 0x0 0x50000>;\n",
"+\n",
- "+\tcpu_bpmp_tx: bpmp_shmem\@4e000 {\n",
+ "+\tcpu_bpmp_tx: bpmp_shmem at 4e000 {\n",
"+\t\tcompatible = \"nvidia,tegra186-bpmp-shmem\";\n",
"+\t\treg = <0x0 0x4e000 0x0 0x1000>;\n",
"+\t};\n",
"+\n",
- "+\tcpu_bpmp_rx: bpmp_shmem\@4f000 {\n",
+ "+\tcpu_bpmp_rx: bpmp_shmem at 4f000 {\n",
"+\t\tcompatible = \"nvidia,tegra186-bpmp-shmem\";\n",
"+\t\treg = <0x0 0x4f000 0x0 0x1000>;\n",
"+\t};\n",
@@ -1313,4 +1301,4 @@
"2.9.0"
]
-12752b89a32a83f645befd13bea99600e572cff5a47d6bd659883b16d60e477b
+829dfdedf6495eb57a37e379fe2c6a5a2d3e6b3b29ffbcf7182aafad363863ee
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