RFC: RTC v5

RFC: RTC v5

[Ben Dooks]

I've reworked the rtc patches, but have no way of testing them
until I get back from "holiday". Is anyone able to test so that
they can be submitted?

git at github.com:bendooks/amlogic-kenel.git bjdooks/v48-rc3/rtc-v5 

[PATCH 1/5] rtc: support for amlogic meson rtc

[Ben Dooks]

From: Ben Dooks <ben.dooks@codethink.co.uk>

Add support for the AMLogic meson8b/meson6 RTC block.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
Changes v5:
- fixed spacing error
- fixed spelling errors
- added MESON_STATIC_DEFAULT to reduce over 80-col lines
- fixed use of unsigned by moving to unsigned int
- remove unused meson_rtc_prep_bus() function
- moved to using time64_t

Changes since V3:
  <1467748122-14833-1-git-send-email-ben.dooks@codethink.co.uk>
- Added Kevin's tested by

Changes since V1:
  <1467039135-26588-1-git-send-email-ben.dooks@codethink.co.uk>

 - Fixed checkpatch and sparse errors
 - Fixed minor locking bug when writing static-control register
 - Updated the code ordering in the rtc-meson.c driver
 - Fixed alphanumeric ordering in on-cpu rtc block
 - Added Rob Hering's ack for the DT binding documentation
 - Added better description to the RTC driver header.
---
 drivers/rtc/Kconfig     |  11 ++
 drivers/rtc/Makefile    |   1 +
 drivers/rtc/rtc-meson.c | 341 ++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 353 insertions(+)
 create mode 100644 drivers/rtc/rtc-meson.c

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index e215f50..40faca1 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1228,6 +1228,17 @@ config RTC_DRV_IMXDI
 	   This driver can also be built as a module, if so, the module
 	   will be called "rtc-imxdi".
 
+config RTC_DRV_MESON
+	tristate "AMLogic Meson Real Time Clock"
+	depends on ARCH_MESON || COMPILE_TEST
+	help
+	   Support for AMLogic Meson RTC block in many of the Meson SoC
+	   devices. The driver supports basic read/write of the time.
+
+	   This driver can also be built as a module, if so, the module
+	   will be called "rtc-meson".
+
+
 config RTC_DRV_OMAP
 	tristate "TI OMAP Real Time Clock"
 	depends on ARCH_OMAP || ARCH_DAVINCI || COMPILE_TEST
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 7cf7ad5..e1bf77c 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -94,6 +94,7 @@ obj-$(CONFIG_RTC_DRV_MAX8997)	+= rtc-max8997.o
 obj-$(CONFIG_RTC_DRV_MAX8998)	+= rtc-max8998.o
 obj-$(CONFIG_RTC_DRV_MC13XXX)	+= rtc-mc13xxx.o
 obj-$(CONFIG_RTC_DRV_MCP795)	+= rtc-mcp795.o
+obj-$(CONFIG_RTC_DRV_MESON)	+= rtc-meson.o
 obj-$(CONFIG_RTC_DRV_MOXART)	+= rtc-moxart.o
 obj-$(CONFIG_RTC_DRV_MPC5121)	+= rtc-mpc5121.o
 obj-$(CONFIG_RTC_DRV_VRTC)	+= rtc-mrst.o
diff --git a/drivers/rtc/rtc-meson.c b/drivers/rtc/rtc-meson.c
new file mode 100644
index 0000000..07d8b8a
--- /dev/null
+++ b/drivers/rtc/rtc-meson.c
@@ -0,0 +1,341 @@
+/* drivers/rtc/rtc-meson.c
+ *
+ * Copyright (c) 2015 Codethink Ltd
+ *	 Ben Dooks <ben.dooks@codethink.co.uk>
+ * Based on origin by Carlo Caione <carlo@endlessm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/reset.h>
+#include <linux/rtc.h>
+#include <linux/io.h>
+#include <linux/of.h>
+
+/* registers accessed from cpu bus */
+#define RTC_REG(x)		((x) * 4)	/* rtc registers 0-4 */
+
+#define LINE_SDI		(1 << 2)
+#define LINE_SEN		(1 << 1)
+#define LINE_SCLK		(1 << 0)
+
+#define RTCREG0_START_SER	BIT(17)
+#define RTCREG0_WAIT_SER	BIT(22)
+#define RTC_REG0_DATA(__data)	((__data) << 24)
+
+#define RTCREG1_READY		BIT(1)
+
+/* rtc registers accessed via rtc-serial interface */
+#define RTC_COUNTER		(0)
+#define RTC_SEC_ADJ		(2)
+
+#define RTC_ADDR_BITS		(3)	/* number of address bits to send */
+#define RTC_DATA_BITS		(32)	/* number of data bits to tx/rx */
+
+#define MESON_STATIC_BIAS_CUR	(0x5 << 1)
+#define MESON_STATIC_VOLTAGE	(0x3 << 11)
+#define MESON_STATIC_DEFAULT	(MESON_STATIC_BIAS_CUR | MESON_STATIC_VOLTAGE)
+
+struct meson_rtc {
+	struct rtc_device	*rtc;	/* rtc device we created */
+	struct device		*dev;	/* device we bound from */
+	struct reset_control	*reset;	/* reset source */
+	struct mutex		lock;	/* rtc lock */
+	void __iomem		*regs;	/* rtc register access */
+};
+
+static void meson_rtc_setline(struct meson_rtc *rtc,
+			      unsigned int bit, unsigned int to)
+{
+	u32 reg0;
+
+	reg0 = readl(rtc->regs + RTC_REG(0));
+	if (to)
+		reg0 |= bit;
+	else
+		reg0 &= ~bit;
+	writel(reg0, rtc->regs + RTC_REG(0));
+}
+
+static void meson_rtc_sclk_pulse(struct meson_rtc *rtc)
+{
+	udelay(5);
+	meson_rtc_setline(rtc, LINE_SCLK, 0);
+	udelay(5);
+	meson_rtc_setline(rtc, LINE_SCLK, 1);
+}
+
+static void meson_rtc_send_bit(struct meson_rtc *rtc, unsigned int bit)
+{
+	meson_rtc_setline(rtc, LINE_SDI, bit ? 1 : 0);
+	meson_rtc_sclk_pulse(rtc);
+}
+
+static void meson_rtc_send_bits(struct meson_rtc *rtc, u32 data,
+				unsigned int nr)
+{
+	u32 bit = 1 << (nr - 1);
+
+	while (bit) {
+		meson_rtc_send_bit(rtc, data & bit);
+		bit >>= 1;
+	}
+}
+
+static void meson_rtc_set_dir(struct meson_rtc *rtc, u32 mode)
+{
+	meson_rtc_setline(rtc, LINE_SEN, 0);
+	meson_rtc_setline(rtc, LINE_SDI, 0);
+	meson_rtc_send_bit(rtc, mode);
+	meson_rtc_setline(rtc, LINE_SDI, 0);
+}
+
+static u32 meson_rtc_read_sdo(struct meson_rtc *rtc)
+{
+	return readl(rtc->regs + RTC_REG(1)) & BIT(0);
+}
+
+static u32 meson_rtc_get_data(struct meson_rtc *rtc)
+{
+	u32 val = 0;
+	int bit;
+
+	for (bit = 0; bit < RTC_DATA_BITS; bit++) {
+		meson_rtc_sclk_pulse(rtc);
+		val <<= 1;
+		val |= meson_rtc_read_sdo(rtc);
+	}
+
+	return val;
+}
+
+static int meson_rtc_wait_bus(struct meson_rtc *rtc, unsigned int timeout_ms)
+{
+	unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
+	u32 val;
+
+	while (time_before(jiffies, timeout)) {
+		val = readl(rtc->regs + RTC_REG(1));
+		if (val & RTCREG1_READY)
+			return 1;
+
+		dev_dbg(rtc->dev, "%s: reg0=%08x reg1=%08x\n",
+			__func__, readl(rtc->regs + RTC_REG(0)), val);
+		msleep(10);
+	}
+
+	return 0;
+}
+
+static int meson_rtc_get_bus(struct meson_rtc *rtc)
+{
+	int ret, retries = 3;
+	u32 val;
+
+	val = readl(rtc->regs + RTC_REG(0));
+	val &= ~(LINE_SDI | LINE_SEN | LINE_SCLK);
+	writel(val, rtc->regs + RTC_REG(0));
+
+	while (retries) {
+		if (meson_rtc_wait_bus(rtc, 300))
+			return 0;
+
+		dev_warn(rtc->dev, "failed to get bus, re-setting\n");
+
+		retries--;
+		ret = reset_control_reset(rtc->reset);
+		if (ret)
+			return ret;
+	}
+
+	dev_err(rtc->dev, "%s: bus is not ready\n", __func__);
+	return -ETIMEDOUT;
+}
+
+static int meson_rtc_read(struct meson_rtc *rtc, unsigned int reg, u32 *data)
+{
+	int ret;
+
+	ret = meson_rtc_get_bus(rtc);
+	if (ret)
+		return ret;
+
+	meson_rtc_setline(rtc, LINE_SEN, 1);
+	meson_rtc_send_bits(rtc, reg, RTC_ADDR_BITS);
+	meson_rtc_set_dir(rtc, 0);
+	*data = meson_rtc_get_data(rtc);
+
+	return 0;
+}
+
+static int meson_rtc_write(struct meson_rtc *rtc, unsigned int reg, u32 data)
+{
+	int ret;
+
+	dev_dbg(rtc->dev, "%s: reg %d val %08x)\n", __func__, reg, data);
+
+	ret = meson_rtc_get_bus(rtc);
+	if (ret)
+		return ret;
+
+	meson_rtc_setline(rtc, LINE_SEN, 1);
+	meson_rtc_send_bits(rtc, data, RTC_DATA_BITS);
+	meson_rtc_send_bits(rtc, reg, RTC_ADDR_BITS);
+	meson_rtc_set_dir(rtc, 1);
+
+	return 0;
+}
+
+static int meson_rtc_gettime(struct device *dev, struct rtc_time *tm)
+{
+	struct meson_rtc *rtc = dev_get_drvdata(dev);
+	int ret;
+	u32 time;
+
+	mutex_lock(&rtc->lock);
+
+	ret = meson_rtc_read(rtc, RTC_COUNTER, &time);
+	if (!ret) {
+		rtc_time64_to_tm(time, tm);
+		dev_dbg(dev, "read time %u\n", time);
+	}
+
+	mutex_unlock(&rtc->lock);
+	return ret;
+}
+
+static int meson_rtc_settime(struct device *dev, struct rtc_time *tm)
+{
+	struct meson_rtc *rtc = dev_get_drvdata(dev);
+	time64_t time;
+	int ret;
+
+	time = rtc_tm_to_time64(tm);
+	if (time >= ((time64_t)1 << 32)) {
+		dev_warn(dev, "%s: time is out of 32bit range\n", __func__);
+		return -ERANGE;
+	}
+
+	mutex_lock(&rtc->lock);
+	ret = meson_rtc_write(rtc, RTC_COUNTER, time);
+	mutex_unlock(&rtc->lock);
+	return ret;
+}
+
+static const struct rtc_class_ops meson_rtc_ops = {
+	.read_time	= meson_rtc_gettime,
+	.set_time	= meson_rtc_settime,
+};
+
+static int meson_rtc_wait_serialiser(struct meson_rtc *rtc)
+{
+	unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+	while (time_before(jiffies, timeout)) {
+		if (!(readl(rtc->regs + RTC_REG(0)) & RTCREG0_WAIT_SER))
+			return 0;
+		msleep(10);
+	}
+
+	return -ETIMEDOUT;
+}
+
+static int meson_rtc_write_static(struct meson_rtc *rtc, u32 data)
+{
+	u32 tmp;
+
+	mutex_lock(&rtc->lock);
+
+	writel(data >> 8, rtc->regs + RTC_REG(4));
+
+	tmp = readl(rtc->regs + RTC_REG(0));
+	tmp &= ~RTC_REG0_DATA(0xff);
+	tmp |= RTC_REG0_DATA(data);
+	tmp |= RTCREG0_START_SER;
+
+	writel(tmp, rtc->regs + RTC_REG(0));
+
+	if (meson_rtc_wait_serialiser(rtc))
+		return -ETIMEDOUT;
+
+	dev_dbg(rtc->dev, "rtc_reg0 = %08x\n", readl(rtc->regs + RTC_REG(0)));
+	mutex_unlock(&rtc->lock);
+
+	return 0;
+}
+
+static int meson_rtc_probe(struct platform_device *pdev)
+{
+	struct meson_rtc *rtc;
+	struct device *dev = &pdev->dev;
+	struct resource *res;
+	u32 tm;
+	int ret;
+
+	rtc = devm_kzalloc(dev, sizeof(struct meson_rtc), GFP_KERNEL);
+	if (!rtc)
+		return -ENOMEM;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	rtc->regs = devm_ioremap_resource(dev, res);
+	rtc->dev = dev;
+
+	if (IS_ERR(rtc->regs))
+		return PTR_ERR(rtc->regs);
+
+	mutex_init(&rtc->lock);
+	platform_set_drvdata(pdev, rtc);
+
+	ret = meson_rtc_write_static(rtc, MESON_STATIC_DEFAULT);
+	if (ret) {
+		dev_err(dev, "failed to set static values\n");
+		return ret;
+	}
+
+	rtc->reset = devm_reset_control_get(dev, NULL);
+	if (IS_ERR(rtc->reset))
+		dev_warn(dev, "no reset available, rtc may not work\n");
+
+	/* check if we can read RTC counter, if not then the RTC is probably
+	 * not functional. If it isn't probably best to not bind the device.
+	*/
+	ret = meson_rtc_read(rtc, RTC_COUNTER, &tm);
+	if (ret) {
+		dev_err(dev, "cannot read RTC counter, RTC not functional\n");
+		return ret;
+	}
+
+	rtc->rtc = devm_rtc_device_register(dev, "meson",
+					    &meson_rtc_ops, THIS_MODULE);
+	if (IS_ERR(rtc->rtc))
+		return PTR_ERR(rtc->rtc);
+
+	return 0;
+}
+
+static const struct of_device_id meson_rtc_dt_match[] = {
+	{ .compatible = "amlogic,meson6-rtc", },
+	{ .compatible = "amlogic,meson8-rtc", },
+	{ .compatible = "amlogic,meson8b-rtc", },
+	{ },
+};
+MODULE_DEVICE_TABLE(of, meson_rtc_dt_match);
+
+static struct platform_driver meson_rtc_driver = {
+	.probe		= meson_rtc_probe,
+	.driver		= {
+		.name	= "meson-rtc",
+		.of_match_table	= of_match_ptr(meson_rtc_dt_match),
+	},
+};
+module_platform_driver(meson_rtc_driver);
+
+MODULE_DESCRIPTION("AMLogic MESON RTC Driver");
+MODULE_AUTHOR("Ben Dooks <ben.doosk@codethink.co.uk>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:meson-rtc");
-- 
2.9.3

[PATCH 2/5] ARM: dts: amlogic: add rtc node for meson8b

[Ben Dooks]

From: Ben Dooks <ben.dooks@codethink.co.uk>

Add the DT node for the RTC support.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
 arch/arm/boot/dts/meson8b.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index fc4080d..15a9d8d 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -156,6 +156,13 @@
 			status = "disabled";
 		};
 
+		rtc: rtc at c8100740 {
+			compatible = "amlogic,meson8b-rtc";
+			reg = <0xc8100740 0x14>;
+			resets = <&reset RESET_RTC>;
+			status = "disabled";
+		};
+
 		clkc: clock-controller at c1104000 {
 			#clock-cells = <1>;
 			compatible = "amlogic,meson8b-clkc";
-- 
2.9.3

[PATCH 3/5] meson-rtc: add device-tree binding

[Ben Dooks]

From: Ben Dooks <ben.dooks@codethink.co.uk>

Add documentation for the AMLogic Meson RTC.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
---
 .../devicetree/bindings/rtc/rtc-amlogic.txt         | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rtc/rtc-amlogic.txt

diff --git a/Documentation/devicetree/bindings/rtc/rtc-amlogic.txt b/Documentation/devicetree/bindings/rtc/rtc-amlogic.txt
new file mode 100644
index 0000000..efc7672
--- /dev/null
+++ b/Documentation/devicetree/bindings/rtc/rtc-amlogic.txt
@@ -0,0 +1,21 @@
+* AMlogic Meson RTC
+
+Required properties:
+- compatible: should be one of the following describing the hardware:
+	* "amlogic,meson6-rtc"
+	* "amlogic,meson8-rtc"
+	* "amlogic,meson8b-rtc"
+
+- reg: physical register space for the controller's memory mapped registers.
+
+Optional properties:
+- resets: reset controller reference to allow reset of the controller
+- interrupts: single interrupt reference if interrupt support needed
+
+Example:
+
+	rtc: rtc at c8100740 {
+		compatible = "amlogic,meson6-rtc";
+		reg = <0xc8100740 0x14>;
+		status = "disabled";
+	};
-- 
2.9.3

[PATCH 4/5] ARM: meson: enable RTC for ODRoid-C1

[Ben Dooks]

From: Ben Dooks <ben.dooks@codethink.co.uk>

Now the RTC node has been added, enable it on the ODroid-C1
board.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
 arch/arm/boot/dts/meson8b-odroidc1.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
index e50f1a1..5c7826f 100644
--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -76,3 +76,8 @@
 	pinctrl-0 = <&uart_ao_a_pins>;
 	pinctrl-names = "default";
 };
+
+&rtc {
+	status = "okay";
+};
+
-- 
2.9.3

[PATCH 5/5] rtc: warn if rtc_tm_to_time64 overflows in rtc_tm_to_time

[Ben Dooks]

The addition of the compatibility layer for rtc_tm_to_time()
to bridge the move to rtc_tm_to_time64() does not check if
the value will overflow the old call's use of unsigned long
to restore the result.

This means that if the result is bigger than the arch's
use of unsigned long then the result will be silently
truncated to whatever the maximum value of the unsigned
long. Since the call does not have an option of returning
an error, at least have an WARN_ON() to show if the value
is out of range.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
---
 include/linux/rtc.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/include/linux/rtc.h b/include/linux/rtc.h
index b693ada..ef7bb2c 100644
--- a/include/linux/rtc.h
+++ b/include/linux/rtc.h
@@ -45,7 +45,10 @@ static inline void rtc_time_to_tm(unsigned long time, struct rtc_time *tm)
  */
 static inline int rtc_tm_to_time(struct rtc_time *tm, unsigned long *time)
 {
-	*time = rtc_tm_to_time64(tm);
+	time64_t tt = rtc_tm_to_time64(tm);
+
+	WARN_ON(tt > ~(0UL));
+	*time = tt;
 
 	return 0;
 }
-- 
2.9.3

RFC: RTC v5

[Kevin Hilman]

Ben Dooks <ben-linux@fluff.org> writes:

> I've reworked the rtc patches, but have no way of testing them
> until I get back from "holiday". Is anyone able to test so that
> they can be submitted?
>
> git at github.com:bendooks/amlogic-kenel.git bjdooks/v48-rc3/rtc-v5 

Just gave it a quick test on meson8b-odroidc1. Something's not right,
but didn't debug further:

/ # ./rtctest

                        RTC Driver Test Example.


...Update IRQs not supported.


Current RTC date/time is 7-9-2016, 21:05:06.
RTC_ALM_READ ioctl: Invalid argument


Kevin

RFC: RTC v5

[Ben Dooks]

On 07/09/16 22:06, Kevin Hilman wrote:
> Ben Dooks <ben-linux@fluff.org> writes:
>
>> I've reworked the rtc patches, but have no way of testing them
>> until I get back from "holiday". Is anyone able to test so that
>> they can be submitted?
>>
>> git at github.com:bendooks/amlogic-kenel.git bjdooks/v48-rc3/rtc-v5
>
> Just gave it a quick test on meson8b-odroidc1. Something's not right,
> but didn't debug further:

Thanks, I'll try and get some time this week to see if this can be
fixed.

-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius