From mboxrd@z Thu Jan  1 00:00:00 1970
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Subject: Re: Defining polarity and trigger mode for static interrupts in _PRT
Date: Fri, 26 Aug 2016 10:08:13 +0100
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To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Duc Dang <dhdang@apm.com>, Bjorn Helgaas <helgaas@kernel.org>, Rafael Wysocki <rafael@kernel.org>, linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org, patches <patches@apm.com>, Bjorn Helgaas <bhelgaas@google.com>, Punit Agrawal <punit.agrawal@arm.com>, okaya@codeaurora.org
List-Id: linux-acpi@vger.kernel.org

[ +Sinan ]

On Thu, Aug 25, 2016 at 07:59:17PM +0100, Marc Zyngier wrote:

[...]

> > Thanks, Marc! It works, I tested on current X-Gene platforms that uses
> > GICv2 and GICv2m.
> > 
> > Will you commit this change? It will be a huge help as going with
> > interrupt link will require firmware change.
> 
> Not for the time being. We now have an understanding of *why* things do
> not work, but Lorenzo seems to have a good grasp on what we can do to
> address it correctly, and we should explore this first. If (and only if)
> there is a consensus that firmware already does all it should, then
> I'll turn this hack into a proper series.

For the records, it is a discussion that already took place:

https://lkml.org/lkml/2016/3/14/923

As I have said there are already ARM64 systems with ACPI tables
out there using PCI interrupt links; I doubt that Qualcomm systems
allow to reconfigure the GIC interrupt pin allocated to legacy PCI
IRQs through interrupt links _SRS (hey it is *empty* :)),
therefore:

a) Some (the above is just an example from the mailing lists I am not
   picking on anyone it is just for the sake of this discussion, I have
   not dumped all ARM partners _PRT from their ACPI tables to check)
   ACPI tables must be rewritten because they are not FW compliant

OR

b) We allow PCI interrupt links to be used for static interrupt
   configurations

OR

c) We ignore the polarity flag (only for PCI legacy IRQs ? I wonder
   how GIC code can detect from which part of the kernel the interrupt
   request is coming, unless we implement an ACPI-PCI-legacy-IRQ-special
   gem)

Comments ?

Lorenzo