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From: Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: Ritesh Harjani <riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Cc: adrian.hunter-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
	ulf.hansson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	shawn.lin-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
	linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	georgi.djakov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	alex.lemberg-XdAiOPVOjttBDgjK7y7TUQ@public.gmane.org,
	mateusz.nowak-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
	Yuliy.Izrailov-XdAiOPVOjttBDgjK7y7TUQ@public.gmane.org,
	asutoshd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	david.griego-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	stummala-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	venkatg-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	pramod.gurav-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v4 3/9] mmc: sdhci-msm: add pltfm_data support to get clk-rates from DT
Date: Wed, 7 Sep 2016 09:14:28 -0700	[thread overview]
Message-ID: <20160907161428.GY12510@codeaurora.org> (raw)
In-Reply-To: <1a44bb54-d88c-737d-7fb1-e7c3597ac03b-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>

On 08/30, Ritesh Harjani wrote:
> On 8/26/2016 3:57 AM, Stephen Boyd wrote:
> >On 08/24, Ritesh Harjani wrote:
> >>This adds support for sdhc-msm controllers to get supported
> >>clk-rates from DT. sdhci-msm would need it's own set_clock
> >>ops to be implemented. For this, supported clk-rates needs
> >>to be populated in sdhci_msm_pltfm_data.
> >>
> >>Signed-off-by: Ritesh Harjani <riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> >>---
> >
> >Please include the DT binding review list in binding updates.
> >
> >> .../devicetree/bindings/mmc/sdhci-msm.txt          |  1 +
> >> drivers/mmc/host/sdhci-msm.c                       | 60 ++++++++++++++++++++++
> >> 2 files changed, 61 insertions(+)
> >>
> >>diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> >>index 485483a..6a83b38 100644
> >>--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> >>+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> >>@@ -17,6 +17,7 @@ Required properties:
> >> 	"iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)
> >> 	"core"	- SDC MMC clock (MCLK) (required)
> >> 	"bus"	- SDCC bus voter clock (optional)
> >>+- clk-rates: Array of supported GCC clock frequencies for sdhc, Units - Hz.
> >>
> >
> >Why not use OPPv2 binding for this? We already have a way to
> >express frequencies for devices with that binding, and we'll need
> >to attach voltages to those frequencies at some point in the
> >future if we want to handle DVFS on these devices.
> >
> OPPv2 may not work out in this case. This was also discussed at [1].
> These clk-rates are not as per voltage points(or any OPP) but as per
> bus speed mode request from higher layer.
> 

That post you link to had a response from Andy that echoed the
same sentiment and then no reply.

Are they a set of frequencies the device can operate at? Yes. Do
they have associated voltages that aren't expressed in this
patch? Yes.

Perhaps I've missed something though and the index of the array
of rates corresponds to some bus speed mode? That isn't clearly
expressed in the binding. Do the frequencies come from some spec
for those bus speed modes? Either way, I'd like to understand why
we need to put frequency tables into DT (hint: the commit text
should explain that).

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  parent reply	other threads:[~2016-09-07 16:14 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-24 10:03 [PATCH v4 0/9] mmc: sdhci-msm: Add clk-rates and DDR support Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 1/9] mmc: sdhci-msm: Change poor style writel/readl of registers Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 2/9] mmc: sdhci-msm: Update DLL reset sequence Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 3/9] mmc: sdhci-msm: add pltfm_data support to get clk-rates from DT Ritesh Harjani
2016-08-25 22:27   ` Stephen Boyd
2016-08-30 14:12     ` Ritesh Harjani
     [not found]       ` <1a44bb54-d88c-737d-7fb1-e7c3597ac03b-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-09-07 16:14         ` Stephen Boyd [this message]
2016-09-12  6:17           ` Ritesh Harjani
2016-10-04  9:33             ` Ritesh Harjani
2016-09-12  7:33   ` Arnd Bergmann
2016-09-27  5:06     ` Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 4/9] ARM: dts: qcom: Add clk-rates to sdhc1 & sdhc2 Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 5/9] mmc: sdhci-msm: Add get_min_clock() and get_max_clock() callback Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 6/9] mmc: sdhci-msm: Enable few quirks Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 7/9] mmc: sdhci-msm: Implement set_clock callback for sdhci-msm Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 8/9] mmc: sdhci-msm: Add clock changes for DDR mode Ritesh Harjani
2016-08-29 13:17   ` Adrian Hunter
2016-08-30 14:16     ` Ritesh Harjani
2016-08-24 10:03 ` [PATCH v4 9/9] arm64: dts: qcom: msm8916: Add ddr support to sdhc1 Ritesh Harjani

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