From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christoffer Dall Subject: Re: [PATCH v4 09/10] ARM: gic-v3: Introduce 32-to-64-bit mappings for GICv3 cpu registers Date: Tue, 13 Sep 2016 10:52:09 +0200 Message-ID: <20160913085209.GI5680@cbox> References: <1473691764-29424-1-git-send-email-vladimir.murzin@arm.com> <1473691764-29424-10-git-send-email-vladimir.murzin@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 889EB49B75 for ; Tue, 13 Sep 2016 04:40:49 -0400 (EDT) Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 6N1l1VCP6BC4 for ; Tue, 13 Sep 2016 04:40:48 -0400 (EDT) Received: from mail-wm0-f43.google.com (mail-wm0-f43.google.com [74.125.82.43]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id B4D0249B6F for ; Tue, 13 Sep 2016 04:40:48 -0400 (EDT) Received: by mail-wm0-f43.google.com with SMTP id c131so99858361wmh.0 for ; Tue, 13 Sep 2016 01:49:32 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1473691764-29424-10-git-send-email-vladimir.murzin@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu To: Vladimir Murzin Cc: marc.zyngier@arm.com, andre.przywara@arm.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org List-Id: kvmarm@lists.cs.columbia.edu On Mon, Sep 12, 2016 at 03:49:23PM +0100, Vladimir Murzin wrote: > vgic-v3 save/restore routines are written in such way that they map > arm64 system register naming nicely, but it does not fit to arm > world. To keep virt/kvm/arm/hyp/vgic-v3-sr.c untouched we create a > mapping with a function for each register mapping the 32-bit to the > 64-bit accessors. > > Please, note that 64-bit wide ICH_LR is split in two 32-bit halves > (ICH_LR and ICH_LRC) accessed independently. > > Signed-off-by: Vladimir Murzin Acked-by: Christoffer Dall From mboxrd@z Thu Jan 1 00:00:00 1970 From: christoffer.dall@linaro.org (Christoffer Dall) Date: Tue, 13 Sep 2016 10:52:09 +0200 Subject: [PATCH v4 09/10] ARM: gic-v3: Introduce 32-to-64-bit mappings for GICv3 cpu registers In-Reply-To: <1473691764-29424-10-git-send-email-vladimir.murzin@arm.com> References: <1473691764-29424-1-git-send-email-vladimir.murzin@arm.com> <1473691764-29424-10-git-send-email-vladimir.murzin@arm.com> Message-ID: <20160913085209.GI5680@cbox> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Mon, Sep 12, 2016 at 03:49:23PM +0100, Vladimir Murzin wrote: > vgic-v3 save/restore routines are written in such way that they map > arm64 system register naming nicely, but it does not fit to arm > world. To keep virt/kvm/arm/hyp/vgic-v3-sr.c untouched we create a > mapping with a function for each register mapping the 32-bit to the > 64-bit accessors. > > Please, note that 64-bit wide ICH_LR is split in two 32-bit halves > (ICH_LR and ICH_LRC) accessed independently. > > Signed-off-by: Vladimir Murzin Acked-by: Christoffer Dall