From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Date: Thu, 15 Sep 2016 12:19:38 -0600 Subject: [U-Boot] [PATCH 2/3] ARM: tegra: fix USB controller aliases In-Reply-To: <20160915181939.12167-1-swarren@wwwdotorg.org> References: <20160915181939.12167-1-swarren@wwwdotorg.org> Message-ID: <20160915181939.12167-2-swarren@wwwdotorg.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Stephen Warren Some boards have a different set of USB controllers enabled in DT than the set referenced by /alias entries. This patch fixes that. For example, this avoids the following message while booting on Ventana, which is caused by the fact that the USB0 controller had no alias, and defaulted to wanting a sequence number of 0, which was later explicitly requested by the alias for USB controller 2. USB2: Device 'usb at c5008000': seq 0 is in use by 'usb at c5000000' This didn't affect USB operation in any way though. Related, there's no need for the USB controller aliases to have an order that's different from the HW order, so re-order any aliases to match the HW ordering. This has the benefit that since USB controller 0 is the only one that supports device-mode in HW, and U-Boot only supports enabling device move on controller 0, there's now good synergy in the ordering! For Tegra20, that's not relevant at present since USB device mode doesn't work correctly on that SoC, but it will save some head-scratching later. This patch doesn't fix the colibri_t20 board, even though it has the same issue, since Marcel already sent a patch for that. Cc: Marcel Ziswiler Signed-off-by: Stephen Warren --- arch/arm/dts/tegra20-harmony.dts | 3 ++- arch/arm/dts/tegra20-seaboard.dts | 5 +++-- arch/arm/dts/tegra20-trimslice.dts | 3 +-- arch/arm/dts/tegra20-ventana.dts | 4 +++- 4 files changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/tegra20-harmony.dts b/arch/arm/dts/tegra20-harmony.dts index 5aec150b5e61..dcbde7c2ed7e 100644 --- a/arch/arm/dts/tegra20-harmony.dts +++ b/arch/arm/dts/tegra20-harmony.dts @@ -15,8 +15,9 @@ rtc0 = "/i2c at 7000d000/tps6586x at 34"; rtc1 = "/rtc at 7000e000"; serial0 = &uartd; - usb0 = "/usb at c5008000"; + usb0 = "/usb at c5000000"; usb1 = "/usb at c5004000"; + usb2 = "/usb at c5008000"; mmc0 = "/sdhci at c8000600"; mmc1 = "/sdhci at c8000200"; }; diff --git a/arch/arm/dts/tegra20-seaboard.dts b/arch/arm/dts/tegra20-seaboard.dts index 14210519a6c2..77f5bb51b027 100644 --- a/arch/arm/dts/tegra20-seaboard.dts +++ b/arch/arm/dts/tegra20-seaboard.dts @@ -9,8 +9,9 @@ aliases { /* This defines the order of our ports */ - usb0 = "/usb at c5008000"; - usb1 = "/usb at c5000000"; + usb0 = "/usb at c5000000"; + usb1 = "/usb at c5004000"; + usb2 = "/usb at c5008000"; i2c0 = "/i2c at 7000d000"; i2c1 = "/i2c at 7000c000"; i2c2 = "/i2c at 7000c400"; diff --git a/arch/arm/dts/tegra20-trimslice.dts b/arch/arm/dts/tegra20-trimslice.dts index be64e667cd5b..7fb7dd0b5815 100644 --- a/arch/arm/dts/tegra20-trimslice.dts +++ b/arch/arm/dts/tegra20-trimslice.dts @@ -11,8 +11,7 @@ }; aliases { - usb0 = "/usb at c5008000"; - usb1 = "/usb at c5000000"; + usb0 = "/usb at c5000000"; mmc0 = "/sdhci at c8000600"; mmc1 = "/sdhci at c8000000"; spi0 = "/spi at 7000c380"; diff --git a/arch/arm/dts/tegra20-ventana.dts b/arch/arm/dts/tegra20-ventana.dts index 371445622c1e..85cd1e39bda7 100644 --- a/arch/arm/dts/tegra20-ventana.dts +++ b/arch/arm/dts/tegra20-ventana.dts @@ -15,7 +15,9 @@ rtc0 = "/i2c at 7000d000/tps6586x at 34"; rtc1 = "/rtc at 7000e000"; serial0 = &uartd; - usb0 = "/usb at c5008000"; + usb0 = "/usb at c5000000"; + usb1 = "/usb at c5004000"; + usb2 = "/usb at c5008000"; mmc0 = "/sdhci at c8000600"; mmc1 = "/sdhci at c8000400"; }; -- 2.9.3