From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45388) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1brrwR-00084F-KW for qemu-devel@nongnu.org; Wed, 05 Oct 2016 15:33:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1brrwM-00056P-Fp for qemu-devel@nongnu.org; Wed, 05 Oct 2016 15:33:22 -0400 Received: from 6.mo6.mail-out.ovh.net ([87.98.177.69]:43927) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1brrwM-00055T-9u for qemu-devel@nongnu.org; Wed, 05 Oct 2016 15:33:18 -0400 Received: from player738.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo6.mail-out.ovh.net (Postfix) with ESMTP id 05E842C740 for ; Wed, 5 Oct 2016 21:33:16 +0200 (CEST) Date: Wed, 5 Oct 2016 21:33:06 +0200 From: Greg Kurz Message-ID: <20161005213306.2cfd30d5@bahia> In-Reply-To: <20161005093405.3c0f769f@bahia> References: <1475088693-29091-1-git-send-email-lvivier@redhat.com> <1475088693-29091-2-git-send-email-lvivier@redhat.com> <20160929052745.GQ8390@umbus.fritz.box> <08ecf131-8749-c468-58ea-3f9369fece07@kaod.org> <20161003160314.54771281@bahia> <20161004002454.GC18648@umbus.fritz.box> <20161004085835.29402918@bahia> <20161005011405.GG18648@umbus.fritz.box> <20161005093405.3c0f769f@bahia> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; boundary="Sig_/uXiI5QxXafaGj.bO=48Ll_9"; protocol="application/pgp-signature" Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 1/6] libqos: add PPC64 PCI support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson Cc: =?UTF-8?B?Q8OpZHJpYw==?= Le Goater , Laurent Vivier , thuth@redhat.com, qemu-devel@nongnu.org, qemu-ppc@nongnu.org, Gerd Hoffmann , dgibson@redhat.com --Sig_/uXiI5QxXafaGj.bO=48Ll_9 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable On Wed, 5 Oct 2016 09:34:05 +0200 Greg Kurz wrote: > On Wed, 5 Oct 2016 12:14:05 +1100 > David Gibson wrote: > [...] > You convinced me. The tswaps in qtest.c are toxic and should be removed. >=20 > Thanks for the clarification. >=20 Rewind. Cedric and I spent the whole day thinking about that, based on Peter's inputs. The conclusion is: the qtest accelerator replaces the real world CPU and and the test program simulates what the CPU actually does when running the guest driver code in a specific situation. If the guest driver performs a store to the device, and the CPU and device have different endianness, cpu_to_xxYY() in the driver code boils down to bswapYY(). Doing things like writel(cpu_to_beYY()) in the test program is thus wrong since it involves the host endianness, and the test program no longer simulates what the real CPU would do. The test program must hence do writel(bswapYY()) and send that to qtest. If the host endianness differs from the simulated CPU, the value is in wrong order and must be byteswapped before being handed over to the memory layer. This explains why qtest calls tswapYY() before cpu_physical_memory_write(). Cheers. -- Greg --Sig_/uXiI5QxXafaGj.bO=48Ll_9 Content-Type: application/pgp-signature Content-Description: OpenPGP digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iEYEARECAAYFAlf1VXIACgkQAvw66wEB28Lj2wCfZenL1tFpW545gNmZvT+zVRMb 48sAmwYAcJeJZXhbyhYGA3WmB3H57wUq =UO+p -----END PGP SIGNATURE----- --Sig_/uXiI5QxXafaGj.bO=48Ll_9--