From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752601AbcJKJCT (ORCPT ); Tue, 11 Oct 2016 05:02:19 -0400 Received: from mail-lf0-f68.google.com ([209.85.215.68]:36238 "EHLO mail-lf0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752463AbcJKJCQ (ORCPT ); Tue, 11 Oct 2016 05:02:16 -0400 Date: Tue, 11 Oct 2016 11:02:01 +0200 From: LABBE Corentin To: Icenowy Zheng Cc: Thierry Reding , Rob Herring , Maxime Ripard , Chen-Yu Tsai , Russell King , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: Re: [linux-sunxi] [PATCH 2/5] pwm: Add Allwinner A31 SoC support Message-ID: <20161011090201.GA5736@Red> References: <20161011063449.54775-1-icenowy@aosc.xyz> <20161011063449.54775-2-icenowy@aosc.xyz> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20161011063449.54775-2-icenowy@aosc.xyz> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello I have a minor comment below On Tue, Oct 11, 2016 at 02:34:46PM +0800, Icenowy Zheng wrote: > This adds a generic PWM framework driver for the PWM controller found > on Allwinner A31 and A31s SoCs. > > The PWM controller is different with other Allwinner SoCs, with a > control register per channel (in other SoCs the control register is > shared), and each channel are allocated 16 bytes of address (but only 8 > bytes are used.) > > In order to use the driver for all channels, device nodes should be > created per channel. > > Signed-off-by: Icenowy Zheng > --- > drivers/pwm/Kconfig | 10 ++ > drivers/pwm/Makefile | 1 + > drivers/pwm/pwm-sun6i.c | 323 ++++++++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 334 insertions(+) > create mode 100644 drivers/pwm/pwm-sun6i.c > > + > +static int sun6i_pwm_probe(struct platform_device *pdev) > +{ > + struct sun6i_pwm_chip *pwm; > + struct resource *res; > + u32 val; > + int ret; > + const struct of_device_id *match; > + > + match = of_match_device(sun6i_pwm_dt_ids, &pdev->dev); match is not used after. Regards Corentin Labbe From mboxrd@z Thu Jan 1 00:00:00 1970 From: LABBE Corentin Subject: Re: [PATCH 2/5] pwm: Add Allwinner A31 SoC support Date: Tue, 11 Oct 2016 11:02:01 +0200 Message-ID: <20161011090201.GA5736@Red> References: <20161011063449.54775-1-icenowy@aosc.xyz> <20161011063449.54775-2-icenowy@aosc.xyz> Reply-To: clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <20161011063449.54775-2-icenowy-ymACFijhrKM@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Icenowy Zheng Cc: Thierry Reding , Rob Herring , Maxime Ripard , Chen-Yu Tsai , Russell King , linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org Hello I have a minor comment below On Tue, Oct 11, 2016 at 02:34:46PM +0800, Icenowy Zheng wrote: > This adds a generic PWM framework driver for the PWM controller found > on Allwinner A31 and A31s SoCs. > > The PWM controller is different with other Allwinner SoCs, with a > control register per channel (in other SoCs the control register is > shared), and each channel are allocated 16 bytes of address (but only 8 > bytes are used.) > > In order to use the driver for all channels, device nodes should be > created per channel. > > Signed-off-by: Icenowy Zheng > --- > drivers/pwm/Kconfig | 10 ++ > drivers/pwm/Makefile | 1 + > drivers/pwm/pwm-sun6i.c | 323 ++++++++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 334 insertions(+) > create mode 100644 drivers/pwm/pwm-sun6i.c > > + > +static int sun6i_pwm_probe(struct platform_device *pdev) > +{ > + struct sun6i_pwm_chip *pwm; > + struct resource *res; > + u32 val; > + int ret; > + const struct of_device_id *match; > + > + match = of_match_device(sun6i_pwm_dt_ids, &pdev->dev); match is not used after. Regards Corentin Labbe