From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37266) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bwsh3-0006qk-Il for qemu-devel@nongnu.org; Wed, 19 Oct 2016 11:22:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bwsgy-0003a7-GL for qemu-devel@nongnu.org; Wed, 19 Oct 2016 11:22:13 -0400 Received: from mx1.redhat.com ([209.132.183.28]:29855) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bwsgy-0003ZN-CD for qemu-devel@nongnu.org; Wed, 19 Oct 2016 11:22:08 -0400 Date: Wed, 19 Oct 2016 17:22:03 +0200 From: Igor Mammedov Message-ID: <20161019172203.72814b65@nial.brq.redhat.com> In-Reply-To: <20161019132922.GW11194@redhat.com> References: <1476878743-144953-1-git-send-email-imammedo@redhat.com> <20161019132922.GW11194@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v4 00/13] pc: q35: x2APIC support in kvm_apic mode List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Daniel P. Berrange" Cc: qemu-devel@nongnu.org, ehabkost@redhat.com, liuxiaojian6@huawei.com, mst@redhat.com, rkrcmar@redhat.com, peterx@redhat.com, kevin@koconnor.net, kraxel@redhat.com, pbonzini@redhat.com, lersek@redhat.com, chao.gao@intel.com On Wed, 19 Oct 2016 14:29:22 +0100 "Daniel P. Berrange" wrote: > On Wed, Oct 19, 2016 at 02:05:30PM +0200, Igor Mammedov wrote: > > > > Changes since v3: > > - fix endianness issues when filling MADT/SRAT entries (Eduardo) > > - squash "acpi: cphp: support x2APIC entry in cpu._MAT" into > > "pc: acpi: x2APIC support for MADT table and _MAT method" (Eduardo) > > - keep assert() as it doesn't affect x2APIC cpus in bochs_bios_init() (Eduardo) > > - restore kvm_has_x2apic_api() and use it to avoid side-effects > > of kvm_enable_x2apic(). x2APIC API will be enabled by iommu > > if it's present or not enabled at all. (Radim) > > - add intel iommu example to error message (Eduardo) > > > > Changes since v2: > > - rebase on top of EIM fixes > > - drop kvm_has_x2apic_ids() and reuse kvm_enable_x2apic() > > from Radim's EIM fixes > > - fix hang on reboot in BIOS due to not updated 'etc/boot-cpus' fwcfg file > > after CPU hotplug > > - drop not used anymore pc_present_cpus_count() and incrementally count > > present VCPUs as they are added/removed at (un)plug callbacks time > > > > Changes since v1: > > - rebase on top of 2.7 > > - drop add 2.8 machine and linux headers update patches > > - drop numa related patches (will post separately as unrelated) > > - change default mc->maxcpus only for q35 > > > > Changes since RFC: > > - use new KVM_CAP_X2APIC_API to detect x2APIC IDs support > > - rebase on top of 2.7-rc1, since many deps were merged > > - fix etc/boot-cpus to account for -device provided cpus > > - include not yet merged _PXM fix as prereq > > - add 2.8 machine type and bump up maxcpus count since it > > > > Series extends current CPU/kvm_apic/Q35 machine > > code to support x2APIC and upto 288 VCPUs when QEMU > > is used with KVM's lapic. > > > > Due to FW_CFG_MAX_CPUS (which is actually apic_id_limit) > > being limited to uint16_t, the max possible APIC ID is > > limitted to 2^16 with this series but that should > > be sufficient for bumping VCPUs number for quite a while. > > Not a problem, just curiosity - 2^16 gives us 65536, so where > is the 288 limit coming from ? It comes from KVM but it basically limited to HW we can test it on (even though it might need a little bit of extra work to handle large number of CPUs). > > Regards, > Daniel