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Date: Wed, 19 Oct 2016 10:49:07 -0700
From: Andi Kleen <andi@firstfloor.org>
To: Andi Kleen <andi@firstfloor.org>
Cc: Ingo Molnar <mingo@kernel.org>,
        Arnaldo Carvalho de Melo <acme@kernel.org>,
        Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>,
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        Namhyung Kim <namhyung@kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [GIT PULL] Vendor events file/dir names
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On Wed, Oct 19, 2016 at 09:41:37AM -0700, Andi Kleen wrote:
> > How do I query individual hw event groups?
> > 
> > 'perf list' output is really long now, and for example it gives me:
> > 
> >  cache:
> >    l1d.replacement                                   
> >         [L1D data line replacements]
> >  ...
> > 
> > If I knew that I'm interested in cache related events, I'd have expected to be 
> > able to do:
> > 
> > 	perf list cache
> > 
> > or at least:
> > 
> > 	perf list cache:
> > 
> > or something similar to list just - but it does not seem to do the right thing.
> 
> perf list doesn't support topic matching, only event name
> matching. I'll send a patch to add topic matching too.
> 
> >   triton:~/tip> perf list longest_lat_cache.miss
> > 
> >   List of pre-defined events (to be used in -e):
> > 
> >   cache:
> >     longest_lat_cache.miss                            
> >          [Core-originated cacheable demand requests missed LLC]
> > 
> > But the event table actually includes the following as well:
> > 
> >         "PublicDescription": "This event counts each cache miss condition for references to the last level cache.",
> > 
> > which is not printed anywhere. I tried the obvious 'perf list -v longest_lat_cache.miss'.
> 
> -v (or --long-desc) should work and it did at some point. I'll investigate.

I tested this and it works here with -v


% PERF_CPUID=GenuineIntel-6-4E perf list -v longest_lat_cache.miss

List of pre-defined events (to be used in -e):


cache:
  longest_lat_cache.miss                            
       [This event counts core-originated cacheable demand requests that miss the last level cache
        (LLC). Demand requests include loads, RFOs, and hardware prefetches from L1D, and instruction
        fetches from IFU Spec update: SKL057]

% PERF_CPUID=GenuineIntel-6-4E perf list  longest_lat_cache.miss

List of pre-defined events (to be used in -e):


cache:
  longest_lat_cache.miss                            
       [Core-originated cacheable demand requests missed L3 Spec update: SKL057]




-Andi