>From cd8989fa11255d0bf21d46051a65c3b073a182e6 Mon Sep 17 00:00:00 2001 From: Andrew Jones Date: Fri, 21 Oct 2016 13:22:38 +0200 Subject: [kvm-unit-tests PATCH] arm64: gic: write bpr1 --- lib/arm/gic.c | 1 + lib/arm64/asm/arch_gicv3.h | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/lib/arm/gic.c b/lib/arm/gic.c index bb62407f7286..c44f7614be4d 100644 --- a/lib/arm/gic.c +++ b/lib/arm/gic.c @@ -137,6 +137,7 @@ void gicv3_enable_defaults(void) gicv3_redist_wait_for_rwp(); gicv3_write_pmr(0xf0); + gicv3_write_bpr1(0); gicv3_write_ctlr(ICC_CTLR_EL1_EOImode_drop_dir); gicv3_write_grpen1(1); } diff --git a/lib/arm64/asm/arch_gicv3.h b/lib/arm64/asm/arch_gicv3.h index eff2efdfe2d4..cd9d8c95ef0d 100644 --- a/lib/arm64/asm/arch_gicv3.h +++ b/lib/arm64/asm/arch_gicv3.h @@ -18,6 +18,7 @@ #define ICC_CTLR_EL1 sys_reg(3, 0, 12, 12, 4) #define ICC_SRE_EL1 sys_reg(3, 0, 12, 12, 5) #define ICC_GRPEN1_EL1 sys_reg(3, 0, 12, 12, 7) +#define ICC_BPR1_EL1 sys_reg(3, 0, 12, 12, 3) #define ICC_SRE_EL2 sys_reg(3, 4, 12, 9, 5) @@ -162,6 +163,11 @@ static inline void gicv3_write_sre(u32 val) isb(); } +static inline void gicv3_write_bpr1(u32 val) +{ + asm volatile("msr_s " __stringify(ICC_BPR1_EL1) ", %0" : : "r" (val)); +} + #define gicv3_read_typer(c) readq(c) #define gicv3_write_irouter(v, c) writeq(v, c) -- 2.7.4