From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48592) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1byXxR-0006tN-Hr for qemu-devel@nongnu.org; Mon, 24 Oct 2016 01:38:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1byXxN-00008Q-Oj for qemu-devel@nongnu.org; Mon, 24 Oct 2016 01:38:01 -0400 Date: Mon, 24 Oct 2016 16:33:33 +1100 From: David Gibson Message-ID: <20161024053333.GA11052@umbus.fritz.box> References: <1477129610-31353-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="PNTmBPCT7hxwcZjr" Content-Disposition: inline In-Reply-To: <1477129610-31353-1-git-send-email-clg@kaod.org> Subject: Re: [Qemu-devel] [PATCH v5 00/17] ppc/pnv: booting the kernel and reaching user space List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?iso-8859-1?Q?C=E9dric?= Le Goater Cc: qemu-ppc@nongnu.org, Benjamin Herrenschmidt , qemu-devel@nongnu.org, Alexander Graf --PNTmBPCT7hxwcZjr Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sat, Oct 22, 2016 at 11:46:33AM +0200, C=E9dric Le Goater wrote: > Hello, >=20 > Here is the latest version of the ppc/pnv platform patchset. PowerNV > (as Non-Virtualized) is the "baremetal" platform using the OPAL > firmware. It runs Linux on IBM and Open Power systems and it can be > used as an hypervisor OS, to run KVM guests, or simply as a host OS. > The goal here is to add support for the baremetal platform and > possibly later also for the KVM PR guests but not for HV guests. >=20 > In v5, all the comments from v4 should have been addressed. Most of > the differences are cleanups suggested by David but there a couple of > important changes : >=20 > - an addition of a new firmware to qemu : skiboot 5.3.7. > - a rework of the native Interrupt Presentation Controller model > which now uses memory subregions instead of a hash table. =20 > - a removal of the Power9 LPC Controller. This is still in the plans > but the models need a little more work. >=20 >=20 > The initial patches provide a minimal platform with some RAM to load > the ROMs : firmware, kernel and initrd. The device tree is built with > what is available at reset time. Then, comes the PnvChip object acting > as a container for other devices required to run a system. The cores > are added to each chip with some restrictions on the number and the > ids. Next is the XSCOM model, the sideband bus which gives controls to > all the units in the POWER8 chip, the LPC controller for the console, > the native interrupt controller and the PSI HB model to handle the > external interrupt. >=20 >=20 > The next step should be IPMI support which adds a BT device on the ISA > bus and some device tree extensions to read sensors and FRUs. This is > relatively straight forward and most of the IPMI code has been > discussed already on the list. Then should come a PHB3 model to > include some PCI devices. This is big and it needs a few helpers in > the PCI core. I've merged 1-6 into ppc-for-2.8. The rest I'm still reviewing. >=20 > If you feel adventurous, you can grab kernel and rootfs images : >=20 > https://openpower.xyz/job/openpower-op-build/distro=3Dubuntu,target=3Dp= almetto/lastSuccessfulBuild/artifact/images/zImage.epapr > https://openpower.xyz/job/openpower-op-build/distro=3Dubuntu,target=3Dp= almetto/lastSuccessfulBuild/artifact/images/rootfs.cpio.xz >=20 > and give it a try. The full patchset is available here : >=20 > https://github.com/legoater/qemu/commits/powernv-ipmi-2.8 >=20 > This is a wip branch, which I stabilize when the qemu version, on > which it is based, is released. >=20 > Thanks, >=20 > C.=20 >=20 > Benjamin Herrenschmidt (5): > ppc/pnv: add skeleton PowerNV platform > ppc/pnv: add a LPC controller > ppc/pnv: Add cut down PSI bridge model and hookup external interrupt > ppc/pnv: Add OCC model stub with interrupt support > ppc/pnv: Add Naples chip support for LPC interrupts >=20 > C=E9dric Le Goater (12): > ppc: add skiboot firmware for the pnv platform > ppc/pnv: add a PnvChip object > ppc/pnv: add a core mask to PnvChip > ppc/pnv: add a PIR handler to PnvChip > ppc/pnv: add a PnvCore object > ppc/pnv: add XSCOM infrastructure > ppc/pnv: add XSCOM handlers to PnvCore > ppc/pnv: add a ISA bus > ppc/xics: Add "native" XICS subclass > ppc/pnv: add a XICS native to each PowerNV chip > ppc/xics: add a xics_get_cpu_index_by_pir helper > ppc/xics: introduce a helper to insert a new ics >=20 > .gitmodules | 3 + > MAINTAINERS | 1 + > Makefile | 2 +- > default-configs/ppc64-softmmu.mak | 4 +- > hw/intc/Makefile.objs | 1 + > hw/intc/xics.c | 6 + > hw/intc/xics_native.c | 323 ++++++++++++++ > hw/ppc/Makefile.objs | 2 + > hw/ppc/pnv.c | 888 ++++++++++++++++++++++++++++++++= ++++++ > hw/ppc/pnv_core.c | 248 +++++++++++ > hw/ppc/pnv_lpc.c | 514 ++++++++++++++++++++++ > hw/ppc/pnv_occ.c | 135 ++++++ > hw/ppc/pnv_psi.c | 615 ++++++++++++++++++++++++++ > hw/ppc/pnv_xscom.c | 277 ++++++++++++ > include/hw/ppc/pnv.h | 159 +++++++ > include/hw/ppc/pnv_core.h | 50 +++ > include/hw/ppc/pnv_lpc.h | 76 ++++ > include/hw/ppc/pnv_occ.h | 38 ++ > include/hw/ppc/pnv_psi.h | 64 +++ > include/hw/ppc/pnv_xscom.h | 84 ++++ > include/hw/ppc/xics.h | 26 ++ > pc-bios/README | 5 + > pc-bios/skiboot.lid | Bin 0 -> 983893 bytes > roms/Makefile | 8 +- > roms/skiboot | 1 + > 25 files changed, 3527 insertions(+), 3 deletions(-) > create mode 100644 hw/intc/xics_native.c > create mode 100644 hw/ppc/pnv.c > create mode 100644 hw/ppc/pnv_core.c > create mode 100644 hw/ppc/pnv_lpc.c > create mode 100644 hw/ppc/pnv_occ.c > create mode 100644 hw/ppc/pnv_psi.c > create mode 100644 hw/ppc/pnv_xscom.c > create mode 100644 include/hw/ppc/pnv.h > create mode 100644 include/hw/ppc/pnv_core.h > create mode 100644 include/hw/ppc/pnv_lpc.h > create mode 100644 include/hw/ppc/pnv_occ.h > create mode 100644 include/hw/ppc/pnv_psi.h > create mode 100644 include/hw/ppc/pnv_xscom.h > create mode 100644 pc-bios/skiboot.lid > create mode 160000 roms/skiboot >=20 --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --PNTmBPCT7hxwcZjr Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAEBCAAGBQJYDZ0qAAoJEGw4ysog2bOSgfMP/3G1FR30C0jgNYZGkkOErg0T 9lNhD7LS72pj2AkdqqOE5j9PicrfMrc3cW7IfV+YUSBatvCWhsdup4zgm7p+hZS/ a9GMrftEdT1dbKLKGvdqDzOXNiud6fiCJTChLPbY3GHdQLVPfcIUoHXcrw8F6pIt fGiXmaDdvPNCSJ/cIAb+oCWhVE22wnSvHWPM379bFcag/ZAEAPgcPHt1Y4ihgSaU wyWNUX4uXxo2iLKXfe3prU0upL2gxuN9vqup3Law4YcmIDg6GKTL6R5I9xKjbveb gd88b6+hyOWuOXmexbC+Jm1eob8JKLK+cM5F26jQM8jpnAk6LABxUmrg44IsWO+/ SWMLlylPyg91fSkRjqRtrM30d4s0WuYDevUL0PxeBf8/ibOg3nvkf45MX5zVL2SX 2YZlO3xN7PnQDYtY6UKxUSFKG9zdrmIy7aqTDXVSpqG67MsWs351T4WFUYwOA1wI gL04NI1p0ux9KSgSwdU28OHfOcu3uHcr1NoAEace9tBKNZeip+ZlvQ108MtT9bdy P4u0tg5HXH3rZuIktviEQE1oX0IPEENreNemnRU0vBlZtokjThXnslsBNKiZ1DSO SF7UyvNj29aOXtg1GvHJ+8VzeX4DYD2kzahspu2+oN2wS9CNjujkbYBiXsJeesD5 EsfI9wJqtWYW7qUoDlH5 =F9b9 -----END PGP SIGNATURE----- --PNTmBPCT7hxwcZjr--