From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760286AbcJ1KMM (ORCPT ); Fri, 28 Oct 2016 06:12:12 -0400 Received: from mirror2.csie.ntu.edu.tw ([140.112.30.76]:60058 "EHLO wens.csie.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752920AbcJ1KMB (ORCPT ); Fri, 28 Oct 2016 06:12:01 -0400 From: Chen-Yu Tsai To: Maxime Ripard Cc: Chen-Yu Tsai , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] ARM: dts: sun9i: a80-optimus: Enable AP6330 WiFi Date: Fri, 28 Oct 2016 18:11:53 +0800 Message-Id: <20161028101154.7350-3-wens@csie.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20161028101154.7350-1-wens@csie.org> References: <20161028101154.7350-1-wens@csie.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The board has a Ampak AP6330 WiFi/BT/FM module. Inside it is a Broadcom BCM4330 WiFi/BT/FM combo IC. The WiFi portion is connected to mmc1, with the enabling pin connected to PL2. The AC100 RTC provides a low power clock signal. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun9i-a80-optimus.dts | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts index ceb6ef15d669..7e036b2be762 100644 --- a/arch/arm/boot/dts/sun9i-a80-optimus.dts +++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts @@ -105,6 +105,14 @@ enable-active-high; gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&ac100_rtc 1>; + clock-names = "ext_clock"; + /* enables internal regulator and de-asserts reset */ + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */ + }; }; &ehci0 { @@ -130,6 +138,21 @@ status = "okay"; }; +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>, <&wifi_en_pin_optimus>; + vmmc-supply = <®_dldo1>; + vqmmc-supply = <®_cldo3>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; +}; + +&mmc1_pins { + allwinner,pull = ; +}; + &mmc2 { pinctrl-names = "default"; pinctrl-0 = <&mmc2_8bit_pins>; @@ -199,6 +222,13 @@ allwinner,drive = ; allwinner,pull = ; }; + + wifi_en_pin_optimus: wifi_en_pin@0 { + allwinner,pins = "PL2"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; }; &r_rsb { -- 2.9.3 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chen-Yu Tsai Subject: [PATCH 2/3] ARM: dts: sun9i: a80-optimus: Enable AP6330 WiFi Date: Fri, 28 Oct 2016 18:11:53 +0800 Message-ID: <20161028101154.7350-3-wens@csie.org> References: <20161028101154.7350-1-wens@csie.org> Return-path: In-Reply-To: <20161028101154.7350-1-wens-jdAy2FN1RRM@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Maxime Ripard Cc: Chen-Yu Tsai , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org The board has a Ampak AP6330 WiFi/BT/FM module. Inside it is a Broadcom BCM4330 WiFi/BT/FM combo IC. The WiFi portion is connected to mmc1, with the enabling pin connected to PL2. The AC100 RTC provides a low power clock signal. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun9i-a80-optimus.dts | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts index ceb6ef15d669..7e036b2be762 100644 --- a/arch/arm/boot/dts/sun9i-a80-optimus.dts +++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts @@ -105,6 +105,14 @@ enable-active-high; gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&ac100_rtc 1>; + clock-names = "ext_clock"; + /* enables internal regulator and de-asserts reset */ + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */ + }; }; &ehci0 { @@ -130,6 +138,21 @@ status = "okay"; }; +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>, <&wifi_en_pin_optimus>; + vmmc-supply = <®_dldo1>; + vqmmc-supply = <®_cldo3>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; +}; + +&mmc1_pins { + allwinner,pull = ; +}; + &mmc2 { pinctrl-names = "default"; pinctrl-0 = <&mmc2_8bit_pins>; @@ -199,6 +222,13 @@ allwinner,drive = ; allwinner,pull = ; }; + + wifi_en_pin_optimus: wifi_en_pin@0 { + allwinner,pins = "PL2"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; }; &r_rsb { -- 2.9.3 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: wens@csie.org (Chen-Yu Tsai) Date: Fri, 28 Oct 2016 18:11:53 +0800 Subject: [PATCH 2/3] ARM: dts: sun9i: a80-optimus: Enable AP6330 WiFi In-Reply-To: <20161028101154.7350-1-wens@csie.org> References: <20161028101154.7350-1-wens@csie.org> Message-ID: <20161028101154.7350-3-wens@csie.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org The board has a Ampak AP6330 WiFi/BT/FM module. Inside it is a Broadcom BCM4330 WiFi/BT/FM combo IC. The WiFi portion is connected to mmc1, with the enabling pin connected to PL2. The AC100 RTC provides a low power clock signal. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun9i-a80-optimus.dts | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts index ceb6ef15d669..7e036b2be762 100644 --- a/arch/arm/boot/dts/sun9i-a80-optimus.dts +++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts @@ -105,6 +105,14 @@ enable-active-high; gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&ac100_rtc 1>; + clock-names = "ext_clock"; + /* enables internal regulator and de-asserts reset */ + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */ + }; }; &ehci0 { @@ -130,6 +138,21 @@ status = "okay"; }; +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>, <&wifi_en_pin_optimus>; + vmmc-supply = <®_dldo1>; + vqmmc-supply = <®_cldo3>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; +}; + +&mmc1_pins { + allwinner,pull = ; +}; + &mmc2 { pinctrl-names = "default"; pinctrl-0 = <&mmc2_8bit_pins>; @@ -199,6 +222,13 @@ allwinner,drive = ; allwinner,pull = ; }; + + wifi_en_pin_optimus: wifi_en_pin at 0 { + allwinner,pins = "PL2"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; }; &r_rsb { -- 2.9.3